1 /* Target-dependent code for the S12Z, for the GDB.
2 Copyright (C) 2018-2021 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 /* Much of this file is shamelessly copied from or1k-tdep.c and others. */
23 #include "arch-utils.h"
24 #include "dwarf2/frame.h"
25 #include "gdbsupport/errors.h"
26 #include "frame-unwind.h"
30 #include "opcode/s12z.h"
31 #include "trad-frame.h"
33 #include "opcodes/s12z-opc.h"
36 /* Two of the registers included in S12Z_N_REGISTERS are
37 the CCH and CCL "registers" which are just views into
39 #define N_PHYSICAL_REGISTERS (S12Z_N_REGISTERS - 2)
42 /* A permutation of all the physical registers. Indexing this array
43 with an integer from gdb's internal representation will return the
45 static const int reg_perm
[N_PHYSICAL_REGISTERS
] =
62 /* The inverse of the above permutation. Indexing this
63 array with a register enum (e.g. REG_D2) will return the register
64 number in gdb's internal representation. */
65 static const int inv_reg_perm
[N_PHYSICAL_REGISTERS
] =
67 2, 3, 4, 5, /* d2, d3, d4, d5 */
70 8, 9, 10, 11, 12 /* x, y, s, p, ccw */
73 /* Return the name of the register REGNUM. */
75 s12z_register_name (struct gdbarch
*gdbarch
, int regnum
)
77 /* Registers is declared in opcodes/s12z.h. */
78 return registers
[reg_perm
[regnum
]].name
;
82 s12z_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
84 CORE_ADDR start_pc
= 0;
86 if (find_pc_partial_function (pc
, NULL
, &start_pc
, NULL
))
88 CORE_ADDR prologue_end
= skip_prologue_using_sal (gdbarch
, pc
);
90 if (prologue_end
!= 0)
94 warning (_("%s Failed to find end of prologue PC = %08x"),
95 __FUNCTION__
, (unsigned int) pc
);
101 s12z_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
103 switch (registers
[reg_perm
[reg_nr
]].bytes
)
106 return builtin_type (gdbarch
)->builtin_uint8
;
108 return builtin_type (gdbarch
)->builtin_uint16
;
110 return builtin_type (gdbarch
)->builtin_uint24
;
112 return builtin_type (gdbarch
)->builtin_uint32
;
114 return builtin_type (gdbarch
)->builtin_uint32
;
116 return builtin_type (gdbarch
)->builtin_int0
;
121 s12z_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int num
)
125 case 15: return REG_S
;
126 case 7: return REG_X
;
127 case 8: return REG_Y
;
128 case 42: return REG_D0
;
129 case 43: return REG_D1
;
130 case 44: return REG_D2
;
131 case 45: return REG_D3
;
132 case 46: return REG_D4
;
133 case 47: return REG_D5
;
134 case 48: return REG_D6
;
135 case 49: return REG_D7
;
141 /* Support functions for frame handling. */
143 /* Copy of gdb_buffered_insn_length_fprintf from disasm.c. */
145 static int ATTRIBUTE_PRINTF (2, 3)
146 s12z_fprintf_disasm (void *stream
, const char *format
, ...)
151 static struct disassemble_info
152 s12z_disassemble_info (struct gdbarch
*gdbarch
)
154 struct disassemble_info di
;
155 init_disassemble_info (&di
, &null_stream
, s12z_fprintf_disasm
);
156 di
.arch
= gdbarch_bfd_arch_info (gdbarch
)->arch
;
157 di
.mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
158 di
.endian
= gdbarch_byte_order (gdbarch
);
159 di
.read_memory_func
= [](bfd_vma memaddr
, gdb_byte
*myaddr
,
160 unsigned int len
, struct disassemble_info
*info
)
162 return target_read_code (memaddr
, myaddr
, len
);
168 /* A struct (based on mem_read_abstraction_base) to read memory
169 through the disassemble_info API. */
170 struct mem_read_abstraction
172 struct mem_read_abstraction_base base
; /* The parent struct. */
173 bfd_vma memaddr
; /* Where to read from. */
174 struct disassemble_info
* info
; /* The disassembler to use for reading. */
177 /* Advance the reader by one byte. */
179 advance (struct mem_read_abstraction_base
*b
)
181 struct mem_read_abstraction
*mra
= (struct mem_read_abstraction
*) b
;
185 /* Return the current position of the reader. */
187 posn (struct mem_read_abstraction_base
*b
)
189 struct mem_read_abstraction
*mra
= (struct mem_read_abstraction
*) b
;
193 /* Read the N bytes at OFFSET using B. The bytes read are stored in BYTES.
194 It is the caller's responsibility to ensure that this is of at least N
197 abstract_read_memory (struct mem_read_abstraction_base
*b
,
199 size_t n
, bfd_byte
*bytes
)
201 struct mem_read_abstraction
*mra
= (struct mem_read_abstraction
*) b
;
204 (*mra
->info
->read_memory_func
) (mra
->memaddr
+ offset
,
205 bytes
, n
, mra
->info
);
209 (*mra
->info
->memory_error_func
) (status
, mra
->memaddr
, mra
->info
);
217 /* Return the stack adjustment caused by a push or pull instruction. */
219 push_pull_get_stack_adjustment (int n_operands
,
220 struct operand
*const *operands
)
222 int stack_adjustment
= 0;
223 gdb_assert (n_operands
> 0);
224 if (operands
[0]->cl
== OPND_CL_REGISTER_ALL
)
225 stack_adjustment
= 26; /* All the regs are involved. */
226 else if (operands
[0]->cl
== OPND_CL_REGISTER_ALL16
)
227 stack_adjustment
= 4 * 2; /* All four 16 bit regs are involved. */
229 for (int i
= 0; i
< n_operands
; ++i
)
231 if (operands
[i
]->cl
!= OPND_CL_REGISTER
)
232 continue; /* I don't think this can ever happen. */
233 const struct register_operand
*op
234 = (const struct register_operand
*) operands
[i
];
239 stack_adjustment
+= 3;
243 stack_adjustment
+= 4;
249 stack_adjustment
+= 2;
255 stack_adjustment
+= 1;
258 gdb_assert_not_reached ("Invalid register in push/pull operation.");
262 return stack_adjustment
;
265 /* Initialize a prologue cache. */
267 static struct trad_frame_cache
*
268 s12z_frame_cache (struct frame_info
*this_frame
, void **prologue_cache
)
270 struct trad_frame_cache
*info
;
273 CORE_ADDR this_sp_for_id
;
275 CORE_ADDR start_addr
;
278 /* Nothing to do if we already have this info. */
279 if (NULL
!= *prologue_cache
)
280 return (struct trad_frame_cache
*) *prologue_cache
;
282 /* Get a new prologue cache and populate it with default values. */
283 info
= trad_frame_cache_zalloc (this_frame
);
284 *prologue_cache
= info
;
286 /* Find the start address of this function (which is a normal frame, even
287 if the next frame is the sentinel frame) and the end of its prologue. */
288 CORE_ADDR this_pc
= get_frame_pc (this_frame
);
289 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
290 find_pc_partial_function (this_pc
, NULL
, &start_addr
, NULL
);
292 /* Get the stack pointer if we have one (if there's no process executing
293 yet we won't have a frame. */
294 this_sp
= (NULL
== this_frame
) ? 0 :
295 get_frame_register_unsigned (this_frame
, REG_S
);
297 /* Return early if GDB couldn't find the function. */
300 warning (_("Couldn't find function including address %s SP is %s"),
301 paddress (gdbarch
, this_pc
),
302 paddress (gdbarch
, this_sp
));
304 /* JPB: 28-Apr-11. This is a temporary patch, to get round GDB
305 crashing right at the beginning. Build the frame ID as best we
307 trad_frame_set_id (info
, frame_id_build (this_sp
, this_pc
));
312 /* The default frame base of this frame (for ID purposes only - frame
313 base is an overloaded term) is its stack pointer. For now we use the
314 value of the SP register in this frame. However if the PC is in the
315 prologue of this frame, before the SP has been set up, then the value
316 will actually be that of the prev frame, and we'll need to adjust it
318 trad_frame_set_this_base (info
, this_sp
);
319 this_sp_for_id
= this_sp
;
321 /* We should only examine code that is in the prologue. This is all code
322 up to (but not including) end_addr. We should only populate the cache
323 while the address is up to (but not including) the PC or end_addr,
324 whichever is first. */
325 end_addr
= s12z_skip_prologue (gdbarch
, start_addr
);
327 /* All the following analysis only occurs if we are in the prologue and
328 have executed the code. Check we have a sane prologue size, and if
329 zero we are frameless and can give up here. */
330 if (end_addr
< start_addr
)
331 error (_("end addr %s is less than start addr %s"),
332 paddress (gdbarch
, end_addr
), paddress (gdbarch
, start_addr
));
334 CORE_ADDR addr
= start_addr
; /* Where we have got to? */
336 int saved_frame_size
= 0;
338 struct disassemble_info di
= s12z_disassemble_info (gdbarch
);
341 struct mem_read_abstraction mra
;
342 mra
.base
.read
= (int (*)(mem_read_abstraction_base
*,
343 int, size_t, bfd_byte
*)) abstract_read_memory
;
344 mra
.base
.advance
= advance
;
345 mra
.base
.posn
= posn
;
348 while (this_pc
> addr
)
350 enum optr optr
= OP_INVALID
;
353 struct operand
*operands
[6];
356 decode_s12z (&optr
, &osize
, &n_operands
, operands
,
357 (mem_read_abstraction_base
*) &mra
);
372 /* Conditional Branches. If any of these are encountered, then
373 it is likely that a RTS will terminate it. So we need to save
374 the frame size so it can be restored. */
375 saved_frame_size
= frame_size
;
378 /* Restore the frame size from a previously saved value. */
379 frame_size
= saved_frame_size
;
382 frame_size
+= push_pull_get_stack_adjustment (n_operands
, operands
);
385 frame_size
-= push_pull_get_stack_adjustment (n_operands
, operands
);
388 if (operands
[0]->cl
== OPND_CL_REGISTER
)
390 int reg
= ((struct register_operand
*) (operands
[0]))->reg
;
391 if ((reg
== REG_S
) && (operands
[1]->cl
== OPND_CL_MEMORY
))
393 const struct memory_operand
*mo
394 = (const struct memory_operand
* ) operands
[1];
395 if (mo
->n_regs
== 1 && !mo
->indirect
396 && mo
->regs
[0] == REG_S
397 && mo
->mutation
== OPND_RM_NONE
)
399 /* LEA S, (xxx, S) -- Decrement the stack. This is
400 almost certainly the start of a frame. */
401 int simm
= (signed char) mo
->base_offset
;
411 for (int o
= 0; o
< n_operands
; ++o
)
415 /* If the PC has not actually got to this point, then the frame
416 base will be wrong, and we adjust it. */
419 /* Only do if executing. */
422 this_sp_for_id
= this_sp
- frame_size
;
423 trad_frame_set_this_base (info
, this_sp_for_id
);
425 trad_frame_set_reg_value (info
, REG_S
, this_sp
+ 3);
426 trad_frame_set_reg_addr (info
, REG_P
, this_sp
);
430 gdb_assert (this_sp
== this_sp_for_id
);
431 /* The stack pointer of the prev frame is frame_size greater
432 than the stack pointer of this frame plus one address
433 size (caused by the JSR or BSR). */
434 trad_frame_set_reg_value (info
, REG_S
,
435 this_sp
+ frame_size
+ 3);
436 trad_frame_set_reg_addr (info
, REG_P
, this_sp
+ frame_size
);
440 /* Build the frame ID. */
441 trad_frame_set_id (info
, frame_id_build (this_sp_for_id
, start_addr
));
446 /* Implement the this_id function for the stub unwinder. */
448 s12z_frame_this_id (struct frame_info
*this_frame
,
449 void **prologue_cache
, struct frame_id
*this_id
)
451 struct trad_frame_cache
*info
= s12z_frame_cache (this_frame
,
454 trad_frame_get_id (info
, this_id
);
458 /* Implement the prev_register function for the stub unwinder. */
459 static struct value
*
460 s12z_frame_prev_register (struct frame_info
*this_frame
,
461 void **prologue_cache
, int regnum
)
463 struct trad_frame_cache
*info
= s12z_frame_cache (this_frame
,
466 return trad_frame_get_register (info
, this_frame
, regnum
);
469 /* Data structures for the normal prologue-analysis-based unwinder. */
470 static const struct frame_unwind s12z_frame_unwind
= {
473 default_frame_unwind_stop_reason
,
475 s12z_frame_prev_register
,
477 default_frame_sniffer
,
482 constexpr gdb_byte s12z_break_insn
[] = {0x00};
484 typedef BP_MANIPULATION (s12z_break_insn
) s12z_breakpoint
;
486 struct s12z_gdbarch_tdep
: gdbarch_tdep
490 /* A vector of human readable characters representing the
491 bits in the CCW register. Unused bits are represented as '-'.
492 Lowest significant bit comes first. */
493 static const char ccw_bits
[] =
496 'V', /* Two's Complement Overflow */
501 'X', /* Non-Maskable Interrupt */
502 'S', /* STOP Disable */
503 '0', /* Interrupt priority level */
510 'U' /* User/Supervisor State. */
513 /* Print a human readable representation of the CCW register.
514 For example: "u----000SX-Inzvc" corresponds to the value
517 s12z_print_ccw_info (struct gdbarch
*gdbarch
,
518 struct ui_file
*file
,
519 struct frame_info
*frame
,
522 struct value
*v
= value_of_register (reg
, frame
);
523 const char *name
= gdbarch_register_name (gdbarch
, reg
);
524 uint32_t ccw
= value_as_long (v
);
525 fputs_filtered (name
, file
);
526 size_t len
= strlen (name
);
527 const int stop_1
= 15;
528 const int stop_2
= 17;
529 for (int i
= 0; i
< stop_1
- len
; ++i
)
530 fputc_filtered (' ', file
);
531 fprintf_filtered (file
, "0x%04x", ccw
);
532 for (int i
= 0; i
< stop_2
- len
; ++i
)
533 fputc_filtered (' ', file
);
534 for (int b
= 15; b
>= 0; --b
)
536 if (ccw
& (0x1u
<< b
))
538 if (ccw_bits
[b
] == 0)
539 fputc_filtered ('1', file
);
541 fputc_filtered (ccw_bits
[b
], file
);
544 fputc_filtered (tolower (ccw_bits
[b
]), file
);
546 fputc_filtered ('\n', file
);
550 s12z_print_registers_info (struct gdbarch
*gdbarch
,
551 struct ui_file
*file
,
552 struct frame_info
*frame
,
553 int regnum
, int print_all
)
555 const int numregs
= (gdbarch_num_regs (gdbarch
)
556 + gdbarch_num_pseudo_regs (gdbarch
));
560 for (int reg
= 0; reg
< numregs
; reg
++)
562 if (REG_CCW
== reg_perm
[reg
])
564 s12z_print_ccw_info (gdbarch
, file
, frame
, reg
);
567 default_print_registers_info (gdbarch
, file
, frame
, reg
, print_all
);
570 else if (REG_CCW
== reg_perm
[regnum
])
571 s12z_print_ccw_info (gdbarch
, file
, frame
, regnum
);
573 default_print_registers_info (gdbarch
, file
, frame
, regnum
, print_all
);
580 s12z_extract_return_value (struct type
*type
, struct regcache
*regcache
,
585 switch (TYPE_LENGTH (type
))
587 case 0: /* Nothing to do */
607 error (_("bad size for return value"));
611 regcache
->cooked_read (inv_reg_perm
[reg
], (gdb_byte
*) valbuf
);
614 static enum return_value_convention
615 s12z_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
616 struct type
*type
, struct regcache
*regcache
,
617 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
619 if (type
->code () == TYPE_CODE_STRUCT
620 || type
->code () == TYPE_CODE_UNION
621 || type
->code () == TYPE_CODE_ARRAY
622 || TYPE_LENGTH (type
) > 4)
623 return RETURN_VALUE_STRUCT_CONVENTION
;
626 s12z_extract_return_value (type
, regcache
, readbuf
);
628 return RETURN_VALUE_REGISTER_CONVENTION
;
633 show_bdccsr_command (const char *args
, int from_tty
)
635 struct string_file output
;
636 target_rcmd ("bdccsr", &output
);
638 printf_unfiltered ("The current BDCCSR value is %s\n", output
.string().c_str());
641 static struct gdbarch
*
642 s12z_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
644 s12z_gdbarch_tdep
*tdep
= new s12z_gdbarch_tdep
;
645 struct gdbarch
*gdbarch
= gdbarch_alloc (&info
, tdep
);
647 add_cmd ("bdccsr", class_support
, show_bdccsr_command
,
648 _("Show the current value of the microcontroller's BDCCSR."),
649 &maintenanceinfolist
);
651 /* Target data types. */
652 set_gdbarch_short_bit (gdbarch
, 16);
653 set_gdbarch_int_bit (gdbarch
, 16);
654 set_gdbarch_long_bit (gdbarch
, 32);
655 set_gdbarch_long_long_bit (gdbarch
, 32);
656 set_gdbarch_ptr_bit (gdbarch
, 24);
657 set_gdbarch_addr_bit (gdbarch
, 24);
658 set_gdbarch_char_signed (gdbarch
, 0);
660 set_gdbarch_ps_regnum (gdbarch
, REG_CCW
);
661 set_gdbarch_pc_regnum (gdbarch
, REG_P
);
662 set_gdbarch_sp_regnum (gdbarch
, REG_S
);
665 set_gdbarch_print_registers_info (gdbarch
, s12z_print_registers_info
);
667 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
668 s12z_breakpoint::kind_from_pc
);
669 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
670 s12z_breakpoint::bp_from_kind
);
672 set_gdbarch_num_regs (gdbarch
, N_PHYSICAL_REGISTERS
);
673 set_gdbarch_register_name (gdbarch
, s12z_register_name
);
674 set_gdbarch_skip_prologue (gdbarch
, s12z_skip_prologue
);
675 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
676 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, s12z_dwarf_reg_to_regnum
);
678 set_gdbarch_register_type (gdbarch
, s12z_register_type
);
680 frame_unwind_append_unwinder (gdbarch
, &s12z_frame_unwind
);
681 /* Currently, the only known producer for this architecture, produces buggy
682 dwarf CFI. So don't append a dwarf unwinder until the situation is
683 better understood. */
685 set_gdbarch_return_value (gdbarch
, s12z_return_value
);
690 void _initialize_s12z_tdep ();
692 _initialize_s12z_tdep ()
694 gdbarch_register (bfd_arch_s12z
, s12z_gdbarch_init
, NULL
);