1 /* Target-dependent code for the S12Z, for the GDB.
2 Copyright (C) 2018 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 /* Much of this file is shamelessly copied from or1k-tdep.c and others. */
23 #include "arch-utils.h"
24 #include "dwarf2-frame.h"
26 #include "frame-unwind.h"
30 #include "opcode/s12z.h"
31 #include "trad-frame.h"
34 /* Two of the registers included in S12Z_N_REGISTERS are
35 the CCH and CCL "registers" which are just views into
37 #define N_PHYSICAL_REGISTERS (S12Z_N_REGISTERS - 2)
40 /* A permutation of all the physical registers. */
41 static const int reg_perm
[N_PHYSICAL_REGISTERS
] =
59 /* Return the name of the register REGNUM. */
61 s12z_register_name (struct gdbarch
*gdbarch
, int regnum
)
63 /* Registers is declared in opcodes/s12z.h. */
64 return registers
[reg_perm
[regnum
]].name
;
68 s12z_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
70 CORE_ADDR start_pc
= 0;
72 if (find_pc_partial_function (pc
, NULL
, &start_pc
, NULL
))
74 CORE_ADDR prologue_end
= skip_prologue_using_sal (gdbarch
, pc
);
76 if (prologue_end
!= 0)
80 warning (_("%s Failed to find end of prologue PC = %08x\n"),
81 __FUNCTION__
, (unsigned int) pc
);
86 /* Implement the unwind_pc gdbarch method. */
88 s12z_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
90 return frame_unwind_register_unsigned (next_frame
, REG_P
);
93 /* Implement the unwind_sp gdbarch method. */
95 s12z_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
97 return frame_unwind_register_unsigned (next_frame
, REG_S
);
101 s12z_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
103 switch (registers
[reg_perm
[reg_nr
]].bytes
)
106 return builtin_type (gdbarch
)->builtin_uint8
;
108 return builtin_type (gdbarch
)->builtin_uint16
;
110 return builtin_type (gdbarch
)->builtin_uint24
;
112 return builtin_type (gdbarch
)->builtin_uint32
;
114 return builtin_type (gdbarch
)->builtin_uint32
;
116 return builtin_type (gdbarch
)->builtin_int0
;
121 s12z_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int num
)
125 case 15: return REG_S
;
126 case 7: return REG_X
;
127 case 8: return REG_Y
;
128 case 42: return REG_D0
;
129 case 43: return REG_D1
;
130 case 44: return REG_D2
;
131 case 45: return REG_D3
;
132 case 46: return REG_D4
;
133 case 47: return REG_D5
;
134 case 48: return REG_D6
;
135 case 49: return REG_D7
;
141 /* Support functions for frame handling. */
143 /* Copy of gdb_buffered_insn_length_fprintf from disasm.c. */
145 static int ATTRIBUTE_PRINTF (2, 3)
146 s12z_fprintf_disasm (void *stream
, const char *format
, ...)
151 struct disassemble_info
152 s12z_disassemble_info (struct gdbarch
*gdbarch
)
154 struct disassemble_info di
;
155 init_disassemble_info (&di
, &null_stream
, s12z_fprintf_disasm
);
156 di
.arch
= gdbarch_bfd_arch_info (gdbarch
)->arch
;
157 di
.mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
158 di
.endian
= gdbarch_byte_order (gdbarch
);
159 di
.read_memory_func
= [](bfd_vma memaddr
, gdb_byte
*myaddr
,
160 unsigned int len
, struct disassemble_info
*info
)
162 return target_read_code (memaddr
, myaddr
, len
);
167 /* Initialize a prologue cache. */
169 static struct trad_frame_cache
*
170 s12z_frame_cache (struct frame_info
*this_frame
, void **prologue_cache
)
172 struct trad_frame_cache
*info
;
175 CORE_ADDR this_sp_for_id
;
177 CORE_ADDR start_addr
;
180 /* Nothing to do if we already have this info. */
181 if (NULL
!= *prologue_cache
)
182 return (struct trad_frame_cache
*) *prologue_cache
;
184 /* Get a new prologue cache and populate it with default values. */
185 info
= trad_frame_cache_zalloc (this_frame
);
186 *prologue_cache
= info
;
188 /* Find the start address of this function (which is a normal frame, even
189 if the next frame is the sentinel frame) and the end of its prologue. */
190 CORE_ADDR this_pc
= get_frame_pc (this_frame
);
191 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
192 find_pc_partial_function (this_pc
, NULL
, &start_addr
, NULL
);
194 /* Get the stack pointer if we have one (if there's no process executing
195 yet we won't have a frame. */
196 this_sp
= (NULL
== this_frame
) ? 0 :
197 get_frame_register_unsigned (this_frame
, REG_S
);
199 /* Return early if GDB couldn't find the function. */
202 warning (_("Couldn't find function including address %s SP is %s\n"),
203 paddress (gdbarch
, this_pc
),
204 paddress (gdbarch
, this_sp
));
206 /* JPB: 28-Apr-11. This is a temporary patch, to get round GDB
207 crashing right at the beginning. Build the frame ID as best we
209 trad_frame_set_id (info
, frame_id_build (this_sp
, this_pc
));
214 /* The default frame base of this frame (for ID purposes only - frame
215 base is an overloaded term) is its stack pointer. For now we use the
216 value of the SP register in this frame. However if the PC is in the
217 prologue of this frame, before the SP has been set up, then the value
218 will actually be that of the prev frame, and we'll need to adjust it
220 trad_frame_set_this_base (info
, this_sp
);
221 this_sp_for_id
= this_sp
;
223 /* We should only examine code that is in the prologue. This is all code
224 up to (but not including) end_addr. We should only populate the cache
225 while the address is up to (but not including) the PC or end_addr,
226 whichever is first. */
227 end_addr
= s12z_skip_prologue (gdbarch
, start_addr
);
229 /* All the following analysis only occurs if we are in the prologue and
230 have executed the code. Check we have a sane prologue size, and if
231 zero we are frameless and can give up here. */
232 if (end_addr
< start_addr
)
233 error (_("end addr %s is less than start addr %s"),
234 paddress (gdbarch
, end_addr
), paddress (gdbarch
, start_addr
));
236 CORE_ADDR addr
= start_addr
; /* Where we have got to? */
238 int saved_frame_size
= 0;
239 while (this_pc
> addr
)
241 struct disassemble_info di
= s12z_disassemble_info (gdbarch
);
243 /* No instruction can be more than 11 bytes long, I think. */
246 int nb
= print_insn_s12z (addr
, &di
);
247 gdb_assert (nb
<= 11);
249 if (0 != target_read_code (addr
, buf
, nb
))
250 memory_error (TARGET_XFER_E_IO
, addr
);
252 if (buf
[0] == 0x05) /* RTS */
254 frame_size
= saved_frame_size
;
256 /* Conditional Branches. If any of these are encountered, then
257 it is likely that a RTS will terminate it. So we need to save
258 the frame size so it can be restored. */
259 else if ( (buf
[0] == 0x02) /* BRSET */
260 || (buf
[0] == 0x0B) /* DBcc / TBcc */
261 || (buf
[0] == 0x03)) /* BRCLR */
263 saved_frame_size
= frame_size
;
265 else if (buf
[0] == 0x04) /* PUL/ PSH .. */
267 bool pull
= buf
[1] & 0x80;
268 int stack_adjustment
= 0;
271 if (buf
[1] & 0x01) stack_adjustment
+= 3; /* Y */
272 if (buf
[1] & 0x02) stack_adjustment
+= 3; /* X */
273 if (buf
[1] & 0x04) stack_adjustment
+= 4; /* D7 */
274 if (buf
[1] & 0x08) stack_adjustment
+= 4; /* D6 */
275 if (buf
[1] & 0x10) stack_adjustment
+= 2; /* D5 */
276 if (buf
[1] & 0x20) stack_adjustment
+= 2; /* D4 */
280 if (buf
[1] & 0x01) stack_adjustment
+= 2; /* D3 */
281 if (buf
[1] & 0x02) stack_adjustment
+= 2; /* D2 */
282 if (buf
[1] & 0x04) stack_adjustment
+= 1; /* D1 */
283 if (buf
[1] & 0x08) stack_adjustment
+= 1; /* D0 */
284 if (buf
[1] & 0x10) stack_adjustment
+= 1; /* CCL */
285 if (buf
[1] & 0x20) stack_adjustment
+= 1; /* CCH */
289 stack_adjustment
= -stack_adjustment
;
290 frame_size
-= stack_adjustment
;
292 else if (buf
[0] == 0x0a) /* LEA S, (xxx, S) */
294 if (0x06 == (buf
[1] >> 4))
296 int simm
= (signed char) (buf
[1] & 0x0F);
300 else if (buf
[0] == 0x1a) /* LEA S, (S, xxxx) */
302 int simm
= (signed char) buf
[1];
308 /* If the PC has not actually got to this point, then the frame
309 base will be wrong, and we adjust it. */
312 /* Only do if executing. */
315 this_sp_for_id
= this_sp
- frame_size
;
316 trad_frame_set_this_base (info
, this_sp_for_id
);
318 trad_frame_set_reg_value (info
, REG_S
, this_sp
+ 3);
319 trad_frame_set_reg_addr (info
, REG_P
, this_sp
);
323 gdb_assert (this_sp
== this_sp_for_id
);
324 /* The stack pointer of the prev frame is frame_size greater
325 than the stack pointer of this frame plus one address
326 size (caused by the JSR or BSR). */
327 trad_frame_set_reg_value (info
, REG_S
,
328 this_sp
+ frame_size
+ 3);
329 trad_frame_set_reg_addr (info
, REG_P
, this_sp
+ frame_size
);
333 /* Build the frame ID. */
334 trad_frame_set_id (info
, frame_id_build (this_sp_for_id
, start_addr
));
339 /* Implement the this_id function for the stub unwinder. */
341 s12z_frame_this_id (struct frame_info
*this_frame
,
342 void **prologue_cache
, struct frame_id
*this_id
)
344 struct trad_frame_cache
*info
= s12z_frame_cache (this_frame
,
347 trad_frame_get_id (info
, this_id
);
351 /* Implement the prev_register function for the stub unwinder. */
352 static struct value
*
353 s12z_frame_prev_register (struct frame_info
*this_frame
,
354 void **prologue_cache
, int regnum
)
356 struct trad_frame_cache
*info
= s12z_frame_cache (this_frame
,
359 return trad_frame_get_register (info
, this_frame
, regnum
);
362 /* Data structures for the normal prologue-analysis-based unwinder. */
363 static const struct frame_unwind s12z_frame_unwind
= {
365 default_frame_unwind_stop_reason
,
367 s12z_frame_prev_register
,
369 default_frame_sniffer
,
374 constexpr gdb_byte s12z_break_insn
[] = {0x00};
376 typedef BP_MANIPULATION (s12z_break_insn
) s12z_breakpoint
;
382 /* A vector of human readable characters representing the
383 bits in the CCW register. Unused bits are represented as '-'.
384 Lowest significant bit comes first. */
385 static const char ccw_bits
[] =
388 'V', /* Two's Complement Overflow */
393 'X', /* Non-Maskable Interrupt */
394 'S', /* STOP Disable */
395 '0', /* Interrupt priority level */
402 'U' /* User/Supervisor State. */
405 /* Print a human readable representation of the CCW register.
406 For example: "u----000SX-Inzvc" corresponds to the value
409 s12z_print_ccw_info (struct gdbarch
*gdbarch
,
410 struct ui_file
*file
,
411 struct frame_info
*frame
,
414 struct value
*v
= value_of_register (reg
, frame
);
415 const char *name
= gdbarch_register_name (gdbarch
, reg
);
416 uint32_t ccw
= value_as_long (v
);
417 fputs_filtered (name
, file
);
418 size_t len
= strlen (name
);
419 const int stop_1
= 15;
420 const int stop_2
= 17;
421 for (int i
= 0; i
< stop_1
- len
; ++i
)
422 fputc_filtered (' ', file
);
423 fprintf_filtered (file
, "0x%04x", ccw
);
424 for (int i
= 0; i
< stop_2
- len
; ++i
)
425 fputc_filtered (' ', file
);
426 for (int b
= 15; b
>= 0; --b
)
428 if (ccw
& (0x1u
<< b
))
430 if (ccw_bits
[b
] == 0)
431 fputc_filtered ('1', file
);
433 fputc_filtered (ccw_bits
[b
], file
);
436 fputc_filtered (tolower (ccw_bits
[b
]), file
);
438 fputc_filtered ('\n', file
);
442 s12z_print_registers_info (struct gdbarch
*gdbarch
,
443 struct ui_file
*file
,
444 struct frame_info
*frame
,
445 int regnum
, int print_all
)
447 const int numregs
= (gdbarch_num_regs (gdbarch
)
448 + gdbarch_num_pseudo_regs (gdbarch
));
452 for (int reg
= 0; reg
< numregs
; reg
++)
454 if (REG_CCW
== reg_perm
[reg
])
456 s12z_print_ccw_info (gdbarch
, file
, frame
, reg
);
459 default_print_registers_info (gdbarch
, file
, frame
, reg
, print_all
);
462 else if (REG_CCW
== reg_perm
[regnum
])
463 s12z_print_ccw_info (gdbarch
, file
, frame
, regnum
);
465 default_print_registers_info (gdbarch
, file
, frame
, regnum
, print_all
);
470 static enum return_value_convention
471 s12z_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
472 struct type
*type
, struct regcache
*regcache
,
473 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
475 return RETURN_VALUE_REGISTER_CONVENTION
;
480 show_bdccsr_command (const char *args
, int from_tty
)
482 struct string_file output
;
483 target_rcmd ("bdccsr", &output
);
485 printf_unfiltered ("The current BDCCSR value is %s\n", output
.string().c_str());
488 static struct gdbarch
*
489 s12z_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
491 struct gdbarch_tdep
*tdep
= XNEW (struct gdbarch_tdep
);
492 struct gdbarch
*gdbarch
= gdbarch_alloc (&info
, tdep
);
494 add_cmd ("bdccsr", class_support
, show_bdccsr_command
,
495 _("Show the current value of the microcontroller's BDCCSR."),
496 &maintenanceinfolist
);
498 /* Target data types. */
499 set_gdbarch_short_bit (gdbarch
, 16);
500 set_gdbarch_int_bit (gdbarch
, 16);
501 set_gdbarch_long_bit (gdbarch
, 32);
502 set_gdbarch_long_long_bit (gdbarch
, 32);
503 set_gdbarch_ptr_bit (gdbarch
, 24);
504 set_gdbarch_addr_bit (gdbarch
, 24);
505 set_gdbarch_char_signed (gdbarch
, 0);
507 set_gdbarch_ps_regnum (gdbarch
, REG_CCW
);
508 set_gdbarch_pc_regnum (gdbarch
, REG_P
);
509 set_gdbarch_sp_regnum (gdbarch
, REG_S
);
512 set_gdbarch_print_registers_info (gdbarch
, s12z_print_registers_info
);
514 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
515 s12z_breakpoint::kind_from_pc
);
516 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
517 s12z_breakpoint::bp_from_kind
);
519 set_gdbarch_num_regs (gdbarch
, N_PHYSICAL_REGISTERS
);
520 set_gdbarch_register_name (gdbarch
, s12z_register_name
);
521 set_gdbarch_skip_prologue (gdbarch
, s12z_skip_prologue
);
522 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
523 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, s12z_dwarf_reg_to_regnum
);
525 set_gdbarch_register_type (gdbarch
, s12z_register_type
);
527 /* Functions to access frame data. */
528 set_gdbarch_unwind_pc (gdbarch
, s12z_unwind_pc
);
529 set_gdbarch_unwind_sp (gdbarch
, s12z_unwind_sp
);
531 frame_unwind_append_unwinder (gdbarch
, &s12z_frame_unwind
);
532 /* Currently, the only known producer for this archtecture, produces buggy
533 dwarf CFI. So don't append a dwarf unwinder until the situation is
534 better understood. */
536 set_gdbarch_return_value (gdbarch
, s12z_return_value
);
542 _initialize_s12z_tdep (void)
544 gdbarch_register (bfd_arch_s12z
, s12z_gdbarch_init
, NULL
);