1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 Contributed by Steve Chamberlain
37 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
38 #include "gdb_string.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
43 #include "solib-svr4.h"
46 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
48 void (*sh_show_regs
) (void);
49 int (*print_sh_insn
) (bfd_vma
, disassemble_info
*);
51 /* Define other aspects of the stack frame.
52 we keep a copy of the worked out return pc lying around, since it
53 is a useful bit of info */
55 struct frame_extra_info
63 sh_generic_register_name (int reg_nr
)
65 static char *register_names
[] =
67 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
68 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
69 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
71 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
72 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
74 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
75 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
79 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
81 return register_names
[reg_nr
];
85 sh_sh_register_name (int reg_nr
)
87 static char *register_names
[] =
89 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
90 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
91 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
93 "", "", "", "", "", "", "", "",
94 "", "", "", "", "", "", "", "",
96 "", "", "", "", "", "", "", "",
97 "", "", "", "", "", "", "", "",
101 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
103 return register_names
[reg_nr
];
107 sh_sh3_register_name (int reg_nr
)
109 static char *register_names
[] =
111 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
112 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
113 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
115 "", "", "", "", "", "", "", "",
116 "", "", "", "", "", "", "", "",
118 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
119 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
123 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
125 return register_names
[reg_nr
];
129 sh_sh3e_register_name (int reg_nr
)
131 static char *register_names
[] =
133 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
134 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
135 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
137 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
138 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
140 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
141 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
145 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
147 return register_names
[reg_nr
];
151 sh_sh_dsp_register_name (int reg_nr
)
153 static char *register_names
[] =
155 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
156 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
157 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
159 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
160 "y0", "y1", "", "", "", "", "", "mod",
162 "rs", "re", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "",
167 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
169 return register_names
[reg_nr
];
173 sh_sh3_dsp_register_name (int reg_nr
)
175 static char *register_names
[] =
177 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
178 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
179 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
181 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
182 "y0", "y1", "", "", "", "", "", "mod",
184 "rs", "re", "", "", "", "", "", "",
185 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
186 "", "", "", "", "", "", "", "",
190 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
192 return register_names
[reg_nr
];
196 sh_sh4_register_name (int reg_nr
)
198 static char *register_names
[] =
200 /* general registers 0-15 */
201 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
202 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
204 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
207 /* floating point registers 25 - 40 */
208 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
209 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
213 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
215 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
216 /* double precision (pseudo) 59 - 66 */
217 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
218 /* vectors (pseudo) 67 - 70 */
219 "fv0", "fv4", "fv8", "fv12",
220 /* FIXME: missing XF 71 - 86 */
221 /* FIXME: missing XD 87 - 94 */
225 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
227 return register_names
[reg_nr
];
230 static unsigned char *
231 sh_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
233 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
234 static unsigned char breakpoint
[] = {0xc3, 0xc3};
236 *lenptr
= sizeof (breakpoint
);
240 /* Prologue looks like
241 [mov.l <regs>,@-r15]...
246 Actually it can be more complicated than this. For instance, with
264 /* STS.L PR,@-r15 0100111100100010
265 r15-4-->r15, PR-->(r15) */
266 #define IS_STS(x) ((x) == 0x4f22)
268 /* MOV.L Rm,@-r15 00101111mmmm0110
269 r15-4-->r15, Rm-->(R15) */
270 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
272 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
274 /* MOV r15,r14 0110111011110011
276 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
278 /* ADD #imm,r15 01111111iiiiiiii
280 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
282 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
283 #define IS_SHLL_R3(x) ((x) == 0x4300)
285 /* ADD r3,r15 0011111100111100
287 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
289 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
290 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
291 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
292 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
294 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
295 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
296 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
297 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
298 #define IS_ARG_MOV(x) \
299 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
300 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
301 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
303 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
304 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
305 #define IS_MOV_R14(x) \
306 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
308 #define FPSCR_SZ (1 << 20)
310 /* Skip any prologue before the guts of a function */
312 /* Skip the prologue using the debug information. If this fails we'll
313 fall back on the 'guess' method below. */
315 after_prologue (CORE_ADDR pc
)
317 struct symtab_and_line sal
;
318 CORE_ADDR func_addr
, func_end
;
320 /* If we can not find the symbol in the partial symbol table, then
321 there is no hope we can determine the function's start address
323 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
326 /* Get the line associated with FUNC_ADDR. */
327 sal
= find_pc_line (func_addr
, 0);
329 /* There are only two cases to consider. First, the end of the source line
330 is within the function bounds. In that case we return the end of the
331 source line. Second is the end of the source line extends beyond the
332 bounds of the current function. We need to use the slow code to
333 examine instructions in that case. */
334 if (sal
.end
< func_end
)
340 /* Here we look at each instruction in the function, and try to guess
341 where the prologue ends. Unfortunately this is not always
344 skip_prologue_hard_way (CORE_ADDR start_pc
)
352 for (here
= start_pc
, end
= start_pc
+ (2 * 28); here
< end
;)
354 int w
= read_memory_integer (here
, 2);
356 if (IS_FMOV (w
) || IS_PUSH (w
) || IS_STS (w
) || IS_MOV_R3 (w
)
357 || IS_ADD_R3SP (w
) || IS_ADD_SP (w
) || IS_SHLL_R3 (w
)
358 || IS_ARG_MOV (w
) || IS_MOV_R14 (w
))
362 else if (IS_MOV_SP_FP (w
))
368 /* Don't bail out yet, if we are before the copy of sp. */
377 sh_skip_prologue (CORE_ADDR pc
)
379 CORE_ADDR post_prologue_pc
;
381 /* See if we can determine the end of the prologue via the symbol table.
382 If so, then return either PC, or the PC after the prologue, whichever
385 post_prologue_pc
= after_prologue (pc
);
387 /* If after_prologue returned a useful address, then use it. Else
388 fall back on the instruction skipping code. */
389 if (post_prologue_pc
!= 0)
390 return max (pc
, post_prologue_pc
);
392 return (skip_prologue_hard_way (pc
));
395 /* Immediately after a function call, return the saved pc.
396 Can't always go through the frames for this because on some machines
397 the new frame is not set up until the new function executes
400 The return address is the value saved in the PR register + 4 */
402 sh_saved_pc_after_call (struct frame_info
*frame
)
404 return (ADDR_BITS_REMOVE(read_register(PR_REGNUM
)));
407 /* Should call_function allocate stack space for a struct return? */
409 sh_use_struct_convention (int gcc_p
, struct type
*type
)
411 return (TYPE_LENGTH (type
) > 1);
414 /* Store the address of the place in which to copy the structure the
415 subroutine will return. This is called from call_function.
417 We store structs through a pointer passed in R0 */
419 sh_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
421 write_register (STRUCT_RETURN_REGNUM
, (addr
));
424 /* Disassemble an instruction. */
426 gdb_print_insn_sh (bfd_vma memaddr
, disassemble_info
*info
)
428 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
429 return print_insn_sh (memaddr
, info
);
431 return print_insn_shl (memaddr
, info
);
434 /* Given a GDB frame, determine the address of the calling function's frame.
435 This will be used to create a new GDB frame struct, and then
436 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
438 For us, the frame address is its stack pointer value, so we look up
439 the function prologue to determine the caller's sp value, and return it. */
441 sh_frame_chain (struct frame_info
*frame
)
443 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
444 return frame
->frame
; /* dummy frame same as caller's frame */
445 if (frame
->pc
&& !inside_entry_file (frame
->pc
))
446 return read_memory_integer (FRAME_FP (frame
) + frame
->extra_info
->f_offset
, 4);
451 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
452 we might want to do here is to check REGNUM against the clobber mask, and
453 somehow flag it as invalid if it isn't saved on the stack somewhere. This
454 would provide a graceful failure mode when trying to get the value of
455 caller-saves registers for an inner frame. */
458 sh_find_callers_reg (struct frame_info
*fi
, int regnum
)
460 for (; fi
; fi
= fi
->next
)
461 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
462 /* When the caller requests PR from the dummy frame, we return PC because
463 that's where the previous routine appears to have done a call from. */
464 return generic_read_register_dummy (fi
->pc
, fi
->frame
, regnum
);
467 FRAME_INIT_SAVED_REGS (fi
);
470 if (fi
->saved_regs
[regnum
] != 0)
471 return read_memory_integer (fi
->saved_regs
[regnum
],
472 REGISTER_RAW_SIZE (regnum
));
474 return read_register (regnum
);
477 /* Put here the code to store, into a struct frame_saved_regs, the
478 addresses of the saved registers of frame described by FRAME_INFO.
479 This includes special registers such as pc and fp saved in special
480 ways in the stack frame. sp is even more special: the address we
481 return for it IS the sp for the next frame. */
483 sh_nofp_frame_init_saved_regs (struct frame_info
*fi
)
493 char *dummy_regs
= generic_find_dummy_frame (fi
->pc
, fi
->frame
);
495 if (fi
->saved_regs
== NULL
)
496 frame_saved_regs_zalloc (fi
);
498 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
502 /* DANGER! This is ONLY going to work if the char buffer format of
503 the saved registers is byte-for-byte identical to the
504 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
505 memcpy (fi
->saved_regs
, dummy_regs
, sizeof (fi
->saved_regs
));
509 fi
->extra_info
->leaf_function
= 1;
510 fi
->extra_info
->f_offset
= 0;
512 for (rn
= 0; rn
< NUM_REGS
; rn
++)
517 /* Loop around examining the prologue insns until we find something
518 that does not appear to be part of the prologue. But give up
519 after 20 of them, since we're getting silly then. */
521 pc
= get_pc_function_start (fi
->pc
);
528 for (opc
= pc
+ (2 * 28); pc
< opc
; pc
+= 2)
530 insn
= read_memory_integer (pc
, 2);
531 /* See where the registers will be saved to */
534 rn
= GET_PUSHED_REG (insn
);
538 else if (IS_STS (insn
))
540 where
[PR_REGNUM
] = depth
;
541 /* If we're storing the pr then this isn't a leaf */
542 fi
->extra_info
->leaf_function
= 0;
545 else if (IS_MOV_R3 (insn
))
547 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
549 else if (IS_SHLL_R3 (insn
))
553 else if (IS_ADD_R3SP (insn
))
557 else if (IS_ADD_SP (insn
))
559 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
561 else if (IS_MOV_SP_FP (insn
))
563 #if 0 /* This used to just stop when it found an instruction that
564 was not considered part of the prologue. Now, we just
565 keep going looking for likely instructions. */
571 /* Now we know how deep things are, we can work out their addresses */
573 for (rn
= 0; rn
< NUM_REGS
; rn
++)
580 fi
->saved_regs
[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
584 fi
->saved_regs
[rn
] = 0;
590 fi
->saved_regs
[SP_REGNUM
] = read_memory_integer (fi
->saved_regs
[FP_REGNUM
], 4);
594 fi
->saved_regs
[SP_REGNUM
] = fi
->frame
- 4;
597 fi
->extra_info
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
598 /* Work out the return pc - either from the saved pr or the pr
603 sh_fp_frame_init_saved_regs (struct frame_info
*fi
)
613 char *dummy_regs
= generic_find_dummy_frame (fi
->pc
, fi
->frame
);
615 if (fi
->saved_regs
== NULL
)
616 frame_saved_regs_zalloc (fi
);
618 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
622 /* DANGER! This is ONLY going to work if the char buffer format of
623 the saved registers is byte-for-byte identical to the
624 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
625 memcpy (fi
->saved_regs
, dummy_regs
, sizeof (fi
->saved_regs
));
629 fi
->extra_info
->leaf_function
= 1;
630 fi
->extra_info
->f_offset
= 0;
632 for (rn
= 0; rn
< NUM_REGS
; rn
++)
637 /* Loop around examining the prologue insns until we find something
638 that does not appear to be part of the prologue. But give up
639 after 20 of them, since we're getting silly then. */
641 pc
= get_pc_function_start (fi
->pc
);
648 for (opc
= pc
+ (2 * 28); pc
< opc
; pc
+= 2)
650 insn
= read_memory_integer (pc
, 2);
651 /* See where the registers will be saved to */
654 rn
= GET_PUSHED_REG (insn
);
658 else if (IS_STS (insn
))
660 where
[PR_REGNUM
] = depth
;
661 /* If we're storing the pr then this isn't a leaf */
662 fi
->extra_info
->leaf_function
= 0;
665 else if (IS_MOV_R3 (insn
))
667 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
669 else if (IS_SHLL_R3 (insn
))
673 else if (IS_ADD_R3SP (insn
))
677 else if (IS_ADD_SP (insn
))
679 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
681 else if (IS_FMOV (insn
))
683 if (read_register (gdbarch_tdep (current_gdbarch
)->FPSCR_REGNUM
) & FPSCR_SZ
)
692 else if (IS_MOV_SP_FP (insn
))
694 #if 0 /* This used to just stop when it found an instruction that
695 was not considered part of the prologue. Now, we just
696 keep going looking for likely instructions. */
702 /* Now we know how deep things are, we can work out their addresses */
704 for (rn
= 0; rn
< NUM_REGS
; rn
++)
711 fi
->saved_regs
[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
715 fi
->saved_regs
[rn
] = 0;
721 fi
->saved_regs
[SP_REGNUM
] = read_memory_integer (fi
->saved_regs
[FP_REGNUM
], 4);
725 fi
->saved_regs
[SP_REGNUM
] = fi
->frame
- 4;
728 fi
->extra_info
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
729 /* Work out the return pc - either from the saved pr or the pr
733 /* Initialize the extra info saved in a FRAME */
735 sh_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
738 fi
->extra_info
= (struct frame_extra_info
*)
739 frame_obstack_alloc (sizeof (struct frame_extra_info
));
742 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
744 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
746 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
747 by assuming it's always FP. */
748 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
750 fi
->extra_info
->return_pc
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
752 fi
->extra_info
->f_offset
= -(CALL_DUMMY_LENGTH
+ 4);
753 fi
->extra_info
->leaf_function
= 0;
758 FRAME_INIT_SAVED_REGS (fi
);
759 fi
->extra_info
->return_pc
= sh_find_callers_reg (fi
, PR_REGNUM
);
763 /* Extract from an array REGBUF containing the (raw) register state
764 the address in which a function should return its structure value,
765 as a CORE_ADDR (or an expression that can be used as one). */
767 sh_extract_struct_value_address (char *regbuf
)
769 return (extract_address ((regbuf
), REGISTER_RAW_SIZE (0)));
773 sh_frame_saved_pc (struct frame_info
*frame
)
775 return ((frame
)->extra_info
->return_pc
);
778 /* Discard from the stack the innermost frame,
779 restoring all saved registers. */
783 register struct frame_info
*frame
= get_current_frame ();
784 register CORE_ADDR fp
;
787 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
788 generic_pop_dummy_frame ();
791 fp
= FRAME_FP (frame
);
792 FRAME_INIT_SAVED_REGS (frame
);
794 /* Copy regs from where they were saved in the frame */
795 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
796 if (frame
->saved_regs
[regnum
])
797 write_register (regnum
, read_memory_integer (frame
->saved_regs
[regnum
], 4));
799 write_register (PC_REGNUM
, frame
->extra_info
->return_pc
);
800 write_register (SP_REGNUM
, fp
+ 4);
802 flush_cached_frames ();
805 /* Function: push_arguments
806 Setup the function arguments for calling a function in the inferior.
808 On the Hitachi SH architecture, there are four registers (R4 to R7)
809 which are dedicated for passing function arguments. Up to the first
810 four arguments (depending on size) may go into these registers.
811 The rest go on the stack.
813 Arguments that are smaller than 4 bytes will still take up a whole
814 register or a whole 32-bit word on the stack, and will be
815 right-justified in the register or the stack word. This includes
816 chars, shorts, and small aggregate types.
818 Arguments that are larger than 4 bytes may be split between two or
819 more registers. If there are not enough registers free, an argument
820 may be passed partly in a register (or registers), and partly on the
821 stack. This includes doubles, long longs, and larger aggregates.
822 As far as I know, there is no upper limit to the size of aggregates
823 that will be passed in this way; in other words, the convention of
824 passing a pointer to a large aggregate instead of a copy is not used.
826 An exceptional case exists for struct arguments (and possibly other
827 aggregates such as arrays) if the size is larger than 4 bytes but
828 not a multiple of 4 bytes. In this case the argument is never split
829 between the registers and the stack, but instead is copied in its
830 entirety onto the stack, AND also copied into as many registers as
831 there is room for. In other words, space in registers permitting,
832 two copies of the same argument are passed in. As far as I can tell,
833 only the one on the stack is used, although that may be a function
834 of the level of compiler optimization. I suspect this is a compiler
835 bug. Arguments of these odd sizes are left-justified within the
836 word (as opposed to arguments smaller than 4 bytes, which are
839 If the function is to return an aggregate type such as a struct, it
840 is either returned in the normal return value register R0 (if its
841 size is no greater than one byte), or else the caller must allocate
842 space into which the callee will copy the return value (if the size
843 is greater than one byte). In this case, a pointer to the return
844 value location is passed into the callee in register R2, which does
845 not displace any of the other arguments passed in via registers R4
849 sh_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
850 int struct_return
, CORE_ADDR struct_addr
)
852 int stack_offset
, stack_alloc
;
860 int odd_sized_struct
;
862 /* first force sp to a 4-byte alignment */
865 /* The "struct return pointer" pseudo-argument has its own dedicated
868 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
870 /* Now make sure there's space on the stack */
871 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
872 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
873 sp
-= stack_alloc
; /* make room on stack for args */
875 /* Now load as many as possible of the first arguments into
876 registers, and push the rest onto the stack. There are 16 bytes
877 in four registers available. Loop thru args from first to last. */
879 argreg
= ARG0_REGNUM
;
880 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
882 type
= VALUE_TYPE (args
[argnum
]);
883 len
= TYPE_LENGTH (type
);
884 memset (valbuf
, 0, sizeof (valbuf
));
887 /* value gets right-justified in the register or stack word */
888 memcpy (valbuf
+ (4 - len
),
889 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
893 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
895 if (len
> 4 && (len
& 3) != 0)
896 odd_sized_struct
= 1; /* such structs go entirely on stack */
898 odd_sized_struct
= 0;
901 if (argreg
> ARGLAST_REGNUM
|| odd_sized_struct
)
902 { /* must go on the stack */
903 write_memory (sp
+ stack_offset
, val
, 4);
906 /* NOTE WELL!!!!! This is not an "else if" clause!!!
907 That's because some *&^%$ things get passed on the stack
908 AND in the registers! */
909 if (argreg
<= ARGLAST_REGNUM
)
910 { /* there's room in a register */
911 regval
= extract_address (val
, REGISTER_RAW_SIZE (argreg
));
912 write_register (argreg
++, regval
);
914 /* Store the value 4 bytes at a time. This means that things
915 larger than 4 bytes may go partly in registers and partly
917 len
-= REGISTER_RAW_SIZE (argreg
);
918 val
+= REGISTER_RAW_SIZE (argreg
);
924 /* Function: push_return_address (pc)
925 Set up the return address for the inferior function call.
926 Needed for targets where we don't actually execute a JSR/BSR instruction */
929 sh_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
931 write_register (PR_REGNUM
, CALL_DUMMY_ADDRESS ());
935 /* Function: fix_call_dummy
936 Poke the callee function's address into the destination part of
937 the CALL_DUMMY. The address is actually stored in a data word
938 following the actualy CALL_DUMMY instructions, which will load
939 it into a register using PC-relative addressing. This function
940 expects the CALL_DUMMY to look like this:
951 sh_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
952 value_ptr
*args
, struct type
*type
, int gcc_p
)
954 *(unsigned long *) (dummy
+ 8) = fun
;
959 sh_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
964 /* Find a function's return value in the appropriate registers (in
965 regbuf), and copy it into valbuf. Extract from an array REGBUF
966 containing the (raw) register state a function return value of type
967 TYPE, and copy that, in virtual format, into VALBUF. */
969 sh_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
971 int len
= TYPE_LENGTH (type
);
972 int return_register
= R0_REGNUM
;
977 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
978 offset
= REGISTER_BYTE (return_register
) + 4 - len
;
980 offset
= REGISTER_BYTE (return_register
);
981 memcpy (valbuf
, regbuf
+ offset
, len
);
985 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
986 offset
= REGISTER_BYTE (return_register
) + 8 - len
;
988 offset
= REGISTER_BYTE (return_register
);
989 memcpy (valbuf
, regbuf
+ offset
, len
);
992 error ("bad size for return value");
996 sh3e_sh4_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
1000 int len
= TYPE_LENGTH (type
);
1002 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1003 return_register
= FP0_REGNUM
;
1005 return_register
= R0_REGNUM
;
1007 if (len
== 8 && TYPE_CODE (type
) == TYPE_CODE_FLT
)
1010 if (TARGET_BYTE_ORDER
== LITTLE_ENDIAN
)
1011 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
,
1012 (char *) regbuf
+ REGISTER_BYTE (return_register
),
1015 floatformat_to_doublest (&floatformat_ieee_double_big
,
1016 (char *) regbuf
+ REGISTER_BYTE (return_register
),
1018 store_floating (valbuf
, len
, val
);
1022 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1023 offset
= REGISTER_BYTE (return_register
) + 4 - len
;
1025 offset
= REGISTER_BYTE (return_register
);
1026 memcpy (valbuf
, regbuf
+ offset
, len
);
1030 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1031 offset
= REGISTER_BYTE (return_register
) + 8 - len
;
1033 offset
= REGISTER_BYTE (return_register
);
1034 memcpy (valbuf
, regbuf
+ offset
, len
);
1037 error ("bad size for return value");
1040 /* Write into appropriate registers a function return value
1041 of type TYPE, given in virtual format.
1042 If the architecture is sh4 or sh3e, store a function's return value
1043 in the R0 general register or in the FP0 floating point register,
1044 depending on the type of the return value. In all the other cases
1045 the result is stored in r0. */
1047 sh_default_store_return_value (struct type
*type
, char *valbuf
)
1049 char buf
[32]; /* more than enough... */
1051 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (R0_REGNUM
))
1053 /* Add leading zeros to the value. */
1054 memset (buf
, 0, REGISTER_RAW_SIZE (R0_REGNUM
));
1055 memcpy (buf
+ REGISTER_RAW_SIZE (R0_REGNUM
) - TYPE_LENGTH (type
),
1056 valbuf
, TYPE_LENGTH (type
));
1057 write_register_bytes (REGISTER_BYTE (R0_REGNUM
), buf
,
1058 REGISTER_RAW_SIZE (R0_REGNUM
));
1061 write_register_bytes (REGISTER_BYTE (R0_REGNUM
), valbuf
,
1062 TYPE_LENGTH (type
));
1066 sh3e_sh4_store_return_value (struct type
*type
, char *valbuf
)
1068 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1069 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1070 valbuf
, TYPE_LENGTH (type
));
1072 sh_default_store_return_value (type
, valbuf
);
1076 /* Print the registers in a form similar to the E7000 */
1079 sh_generic_show_regs (void)
1081 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1082 paddr (read_register (PC_REGNUM
)),
1083 (long) read_register (gdbarch_tdep (current_gdbarch
)->SR_REGNUM
),
1084 (long) read_register (PR_REGNUM
),
1085 (long) read_register (MACH_REGNUM
),
1086 (long) read_register (MACL_REGNUM
));
1088 printf_filtered ("GBR=%08lx VBR=%08lx",
1089 (long) read_register (GBR_REGNUM
),
1090 (long) read_register (VBR_REGNUM
));
1092 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1093 (long) read_register (0),
1094 (long) read_register (1),
1095 (long) read_register (2),
1096 (long) read_register (3),
1097 (long) read_register (4),
1098 (long) read_register (5),
1099 (long) read_register (6),
1100 (long) read_register (7));
1101 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1102 (long) read_register (8),
1103 (long) read_register (9),
1104 (long) read_register (10),
1105 (long) read_register (11),
1106 (long) read_register (12),
1107 (long) read_register (13),
1108 (long) read_register (14),
1109 (long) read_register (15));
1113 sh3_show_regs (void)
1115 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1116 paddr (read_register (PC_REGNUM
)),
1117 (long) read_register (gdbarch_tdep (current_gdbarch
)->SR_REGNUM
),
1118 (long) read_register (PR_REGNUM
),
1119 (long) read_register (MACH_REGNUM
),
1120 (long) read_register (MACL_REGNUM
));
1122 printf_filtered ("GBR=%08lx VBR=%08lx",
1123 (long) read_register (GBR_REGNUM
),
1124 (long) read_register (VBR_REGNUM
));
1125 printf_filtered (" SSR=%08lx SPC=%08lx",
1126 (long) read_register (gdbarch_tdep (current_gdbarch
)->SSR_REGNUM
),
1127 (long) read_register (gdbarch_tdep (current_gdbarch
)->SPC_REGNUM
));
1129 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1130 (long) read_register (0),
1131 (long) read_register (1),
1132 (long) read_register (2),
1133 (long) read_register (3),
1134 (long) read_register (4),
1135 (long) read_register (5),
1136 (long) read_register (6),
1137 (long) read_register (7));
1138 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1139 (long) read_register (8),
1140 (long) read_register (9),
1141 (long) read_register (10),
1142 (long) read_register (11),
1143 (long) read_register (12),
1144 (long) read_register (13),
1145 (long) read_register (14),
1146 (long) read_register (15));
1151 sh3e_show_regs (void)
1153 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1154 paddr (read_register (PC_REGNUM
)),
1155 (long) read_register (gdbarch_tdep (current_gdbarch
)->SR_REGNUM
),
1156 (long) read_register (PR_REGNUM
),
1157 (long) read_register (MACH_REGNUM
),
1158 (long) read_register (MACL_REGNUM
));
1160 printf_filtered ("GBR=%08lx VBR=%08lx",
1161 (long) read_register (GBR_REGNUM
),
1162 (long) read_register (VBR_REGNUM
));
1163 printf_filtered (" SSR=%08lx SPC=%08lx",
1164 (long) read_register (gdbarch_tdep (current_gdbarch
)->SSR_REGNUM
),
1165 (long) read_register (gdbarch_tdep (current_gdbarch
)->SPC_REGNUM
));
1166 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1167 (long) read_register (gdbarch_tdep (current_gdbarch
)->FPUL_REGNUM
),
1168 (long) read_register (gdbarch_tdep (current_gdbarch
)->FPSCR_REGNUM
));
1170 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1171 (long) read_register (0),
1172 (long) read_register (1),
1173 (long) read_register (2),
1174 (long) read_register (3),
1175 (long) read_register (4),
1176 (long) read_register (5),
1177 (long) read_register (6),
1178 (long) read_register (7));
1179 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1180 (long) read_register (8),
1181 (long) read_register (9),
1182 (long) read_register (10),
1183 (long) read_register (11),
1184 (long) read_register (12),
1185 (long) read_register (13),
1186 (long) read_register (14),
1187 (long) read_register (15));
1189 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1190 (long) read_register (FP0_REGNUM
+ 0),
1191 (long) read_register (FP0_REGNUM
+ 1),
1192 (long) read_register (FP0_REGNUM
+ 2),
1193 (long) read_register (FP0_REGNUM
+ 3),
1194 (long) read_register (FP0_REGNUM
+ 4),
1195 (long) read_register (FP0_REGNUM
+ 5),
1196 (long) read_register (FP0_REGNUM
+ 6),
1197 (long) read_register (FP0_REGNUM
+ 7));
1198 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1199 (long) read_register (FP0_REGNUM
+ 8),
1200 (long) read_register (FP0_REGNUM
+ 9),
1201 (long) read_register (FP0_REGNUM
+ 10),
1202 (long) read_register (FP0_REGNUM
+ 11),
1203 (long) read_register (FP0_REGNUM
+ 12),
1204 (long) read_register (FP0_REGNUM
+ 13),
1205 (long) read_register (FP0_REGNUM
+ 14),
1206 (long) read_register (FP0_REGNUM
+ 15));
1210 sh3_dsp_show_regs (void)
1212 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1213 paddr (read_register (PC_REGNUM
)),
1214 (long) read_register (gdbarch_tdep (current_gdbarch
)->SR_REGNUM
),
1215 (long) read_register (PR_REGNUM
),
1216 (long) read_register (MACH_REGNUM
),
1217 (long) read_register (MACL_REGNUM
));
1219 printf_filtered ("GBR=%08lx VBR=%08lx",
1220 (long) read_register (GBR_REGNUM
),
1221 (long) read_register (VBR_REGNUM
));
1223 printf_filtered (" SSR=%08lx SPC=%08lx",
1224 (long) read_register (gdbarch_tdep (current_gdbarch
)->SSR_REGNUM
),
1225 (long) read_register (gdbarch_tdep (current_gdbarch
)->SPC_REGNUM
));
1227 printf_filtered (" DSR=%08lx",
1228 (long) read_register (gdbarch_tdep (current_gdbarch
)->DSR_REGNUM
));
1230 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1231 (long) read_register (0),
1232 (long) read_register (1),
1233 (long) read_register (2),
1234 (long) read_register (3),
1235 (long) read_register (4),
1236 (long) read_register (5),
1237 (long) read_register (6),
1238 (long) read_register (7));
1239 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1240 (long) read_register (8),
1241 (long) read_register (9),
1242 (long) read_register (10),
1243 (long) read_register (11),
1244 (long) read_register (12),
1245 (long) read_register (13),
1246 (long) read_register (14),
1247 (long) read_register (15));
1249 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1250 (long) read_register (gdbarch_tdep (current_gdbarch
)->A0G_REGNUM
) & 0xff,
1251 (long) read_register (gdbarch_tdep (current_gdbarch
)->A0_REGNUM
),
1252 (long) read_register (gdbarch_tdep (current_gdbarch
)->M0_REGNUM
),
1253 (long) read_register (gdbarch_tdep (current_gdbarch
)->X0_REGNUM
),
1254 (long) read_register (gdbarch_tdep (current_gdbarch
)->Y0_REGNUM
),
1255 (long) read_register (gdbarch_tdep (current_gdbarch
)->RS_REGNUM
),
1256 (long) read_register (gdbarch_tdep (current_gdbarch
)->MOD_REGNUM
));
1257 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1258 (long) read_register (gdbarch_tdep (current_gdbarch
)->A1G_REGNUM
) & 0xff,
1259 (long) read_register (gdbarch_tdep (current_gdbarch
)->A1_REGNUM
),
1260 (long) read_register (gdbarch_tdep (current_gdbarch
)->M1_REGNUM
),
1261 (long) read_register (gdbarch_tdep (current_gdbarch
)->X1_REGNUM
),
1262 (long) read_register (gdbarch_tdep (current_gdbarch
)->Y1_REGNUM
),
1263 (long) read_register (gdbarch_tdep (current_gdbarch
)->RE_REGNUM
));
1267 sh4_show_regs (void)
1269 int pr
= read_register (gdbarch_tdep (current_gdbarch
)->FPSCR_REGNUM
) & 0x80000;
1270 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1271 paddr (read_register (PC_REGNUM
)),
1272 (long) read_register (gdbarch_tdep (current_gdbarch
)->SR_REGNUM
),
1273 (long) read_register (PR_REGNUM
),
1274 (long) read_register (MACH_REGNUM
),
1275 (long) read_register (MACL_REGNUM
));
1277 printf_filtered ("GBR=%08lx VBR=%08lx",
1278 (long) read_register (GBR_REGNUM
),
1279 (long) read_register (VBR_REGNUM
));
1280 printf_filtered (" SSR=%08lx SPC=%08lx",
1281 (long) read_register (gdbarch_tdep (current_gdbarch
)->SSR_REGNUM
),
1282 (long) read_register (gdbarch_tdep (current_gdbarch
)->SPC_REGNUM
));
1283 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1284 (long) read_register (gdbarch_tdep (current_gdbarch
)->FPUL_REGNUM
),
1285 (long) read_register (gdbarch_tdep (current_gdbarch
)->FPSCR_REGNUM
));
1287 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1288 (long) read_register (0),
1289 (long) read_register (1),
1290 (long) read_register (2),
1291 (long) read_register (3),
1292 (long) read_register (4),
1293 (long) read_register (5),
1294 (long) read_register (6),
1295 (long) read_register (7));
1296 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1297 (long) read_register (8),
1298 (long) read_register (9),
1299 (long) read_register (10),
1300 (long) read_register (11),
1301 (long) read_register (12),
1302 (long) read_register (13),
1303 (long) read_register (14),
1304 (long) read_register (15));
1306 printf_filtered ((pr
1307 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1308 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1309 (long) read_register (FP0_REGNUM
+ 0),
1310 (long) read_register (FP0_REGNUM
+ 1),
1311 (long) read_register (FP0_REGNUM
+ 2),
1312 (long) read_register (FP0_REGNUM
+ 3),
1313 (long) read_register (FP0_REGNUM
+ 4),
1314 (long) read_register (FP0_REGNUM
+ 5),
1315 (long) read_register (FP0_REGNUM
+ 6),
1316 (long) read_register (FP0_REGNUM
+ 7));
1317 printf_filtered ((pr
1318 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1319 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1320 (long) read_register (FP0_REGNUM
+ 8),
1321 (long) read_register (FP0_REGNUM
+ 9),
1322 (long) read_register (FP0_REGNUM
+ 10),
1323 (long) read_register (FP0_REGNUM
+ 11),
1324 (long) read_register (FP0_REGNUM
+ 12),
1325 (long) read_register (FP0_REGNUM
+ 13),
1326 (long) read_register (FP0_REGNUM
+ 14),
1327 (long) read_register (FP0_REGNUM
+ 15));
1331 sh_dsp_show_regs (void)
1333 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1334 paddr (read_register (PC_REGNUM
)),
1335 (long) read_register (gdbarch_tdep (current_gdbarch
)->SR_REGNUM
),
1336 (long) read_register (PR_REGNUM
),
1337 (long) read_register (MACH_REGNUM
),
1338 (long) read_register (MACL_REGNUM
));
1340 printf_filtered ("GBR=%08lx VBR=%08lx",
1341 (long) read_register (GBR_REGNUM
),
1342 (long) read_register (VBR_REGNUM
));
1344 printf_filtered (" DSR=%08lx",
1345 (long) read_register (gdbarch_tdep (current_gdbarch
)->DSR_REGNUM
));
1347 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1348 (long) read_register (0),
1349 (long) read_register (1),
1350 (long) read_register (2),
1351 (long) read_register (3),
1352 (long) read_register (4),
1353 (long) read_register (5),
1354 (long) read_register (6),
1355 (long) read_register (7));
1356 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1357 (long) read_register (8),
1358 (long) read_register (9),
1359 (long) read_register (10),
1360 (long) read_register (11),
1361 (long) read_register (12),
1362 (long) read_register (13),
1363 (long) read_register (14),
1364 (long) read_register (15));
1366 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1367 (long) read_register (gdbarch_tdep (current_gdbarch
)->A0G_REGNUM
) & 0xff,
1368 (long) read_register (gdbarch_tdep (current_gdbarch
)->A0_REGNUM
),
1369 (long) read_register (gdbarch_tdep (current_gdbarch
)->M0_REGNUM
),
1370 (long) read_register (gdbarch_tdep (current_gdbarch
)->X0_REGNUM
),
1371 (long) read_register (gdbarch_tdep (current_gdbarch
)->Y0_REGNUM
),
1372 (long) read_register (gdbarch_tdep (current_gdbarch
)->RS_REGNUM
),
1373 (long) read_register (gdbarch_tdep (current_gdbarch
)->MOD_REGNUM
));
1374 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1375 (long) read_register (gdbarch_tdep (current_gdbarch
)->A1G_REGNUM
) & 0xff,
1376 (long) read_register (gdbarch_tdep (current_gdbarch
)->A1_REGNUM
),
1377 (long) read_register (gdbarch_tdep (current_gdbarch
)->M1_REGNUM
),
1378 (long) read_register (gdbarch_tdep (current_gdbarch
)->X1_REGNUM
),
1379 (long) read_register (gdbarch_tdep (current_gdbarch
)->Y1_REGNUM
),
1380 (long) read_register (gdbarch_tdep (current_gdbarch
)->RE_REGNUM
));
1383 void sh_show_regs_command (char *args
, int from_tty
)
1390 fv_reg_base_num (int fv_regnum
)
1394 fp_regnum
= FP0_REGNUM
+
1395 (fv_regnum
- gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
) * 4;
1400 dr_reg_base_num (int dr_regnum
)
1404 fp_regnum
= FP0_REGNUM
+
1405 (dr_regnum
- gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
) * 2;
1409 /* Index within `registers' of the first byte of the space for
1412 sh_default_register_byte (int reg_nr
)
1414 return (reg_nr
* 4);
1418 sh_sh4_register_byte (int reg_nr
)
1420 if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
1421 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->DR_LAST_REGNUM
)
1422 return (dr_reg_base_num (reg_nr
) * 4);
1423 else if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
1424 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->FV_LAST_REGNUM
)
1425 return (fv_reg_base_num (reg_nr
) * 4);
1427 return (reg_nr
* 4);
1430 /* Number of bytes of storage in the actual machine representation for
1433 sh_default_register_raw_size (int reg_nr
)
1439 sh_sh4_register_raw_size (int reg_nr
)
1441 if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
1442 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->DR_LAST_REGNUM
)
1444 else if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
1445 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->FV_LAST_REGNUM
)
1451 /* Number of bytes of storage in the program's representation
1454 sh_register_virtual_size (int reg_nr
)
1459 /* Return the GDB type object for the "standard" data type
1460 of data in register N. */
1462 static struct type
*
1463 sh_sh3e_register_virtual_type (int reg_nr
)
1465 if ((reg_nr
>= FP0_REGNUM
1466 && (reg_nr
<= gdbarch_tdep (current_gdbarch
)->FP_LAST_REGNUM
))
1467 || (reg_nr
== gdbarch_tdep (current_gdbarch
)->FPUL_REGNUM
))
1468 return builtin_type_float
;
1470 return builtin_type_int
;
1473 static struct type
*
1474 sh_sh4_build_float_register_type (int high
)
1478 temp
= create_range_type (NULL
, builtin_type_int
, 0, high
);
1479 return create_array_type (NULL
, builtin_type_float
, temp
);
1482 static struct type
*
1483 sh_sh4_register_virtual_type (int reg_nr
)
1485 if ((reg_nr
>= FP0_REGNUM
1486 && (reg_nr
<= gdbarch_tdep (current_gdbarch
)->FP_LAST_REGNUM
))
1487 || (reg_nr
== gdbarch_tdep (current_gdbarch
)->FPUL_REGNUM
))
1488 return builtin_type_float
;
1489 else if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
1490 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->DR_LAST_REGNUM
)
1491 return builtin_type_double
;
1492 else if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
1493 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->FV_LAST_REGNUM
)
1494 return sh_sh4_build_float_register_type (3);
1496 return builtin_type_int
;
1499 static struct type
*
1500 sh_default_register_virtual_type (int reg_nr
)
1502 return builtin_type_int
;
1505 /* On the sh4, the DRi pseudo registers are problematic if the target
1506 is little endian. When the user writes one of those registers, for
1507 instance with 'ser var $dr0=1', we want the double to be stored
1509 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1510 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1512 This corresponds to little endian byte order & big endian word
1513 order. However if we let gdb write the register w/o conversion, it
1514 will write fr0 and fr1 this way:
1515 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1516 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1517 because it will consider fr0 and fr1 as a single LE stretch of memory.
1519 To achieve what we want we must force gdb to store things in
1520 floatformat_ieee_double_littlebyte_bigword (which is defined in
1521 include/floatformat.h and libiberty/floatformat.c.
1523 In case the target is big endian, there is no problem, the
1524 raw bytes will look like:
1525 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1526 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1528 The other pseudo registers (the FVs) also don't pose a problem
1529 because they are stored as 4 individual FP elements. */
1532 sh_sh4_register_convertible (int nr
)
1534 if (TARGET_BYTE_ORDER
== LITTLE_ENDIAN
)
1535 return (gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
<= nr
1536 && nr
<= gdbarch_tdep (current_gdbarch
)->DR_LAST_REGNUM
);
1542 sh_sh4_register_convert_to_virtual (int regnum
, struct type
*type
,
1543 char *from
, char *to
)
1545 if (regnum
>= gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
1546 && regnum
<= gdbarch_tdep (current_gdbarch
)->DR_LAST_REGNUM
)
1549 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
, from
, &val
);
1550 store_floating(to
, TYPE_LENGTH(type
), val
);
1553 error("sh_register_convert_to_virtual called with non DR register number");
1557 sh_sh4_register_convert_to_raw (struct type
*type
, int regnum
,
1558 char *from
, char *to
)
1560 if (regnum
>= gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
1561 && regnum
<= gdbarch_tdep (current_gdbarch
)->DR_LAST_REGNUM
)
1563 DOUBLEST val
= extract_floating (from
, TYPE_LENGTH(type
));
1564 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword
, &val
, to
);
1567 error("sh_register_convert_to_raw called with non DR register number");
1571 sh_fetch_pseudo_register (int reg_nr
)
1573 int base_regnum
, portion
;
1575 if (!register_cached (reg_nr
))
1577 if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
1578 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->DR_LAST_REGNUM
)
1580 base_regnum
= dr_reg_base_num (reg_nr
);
1582 /* Read the real regs for which this one is an alias. */
1583 for (portion
= 0; portion
< 2; portion
++)
1584 if (!register_cached (base_regnum
+ portion
))
1585 target_fetch_registers (base_regnum
+ portion
);
1587 else if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
1588 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->FV_LAST_REGNUM
)
1590 base_regnum
= fv_reg_base_num (reg_nr
);
1592 /* Read the real regs for which this one is an alias. */
1593 for (portion
= 0; portion
< 4; portion
++)
1594 if (!register_cached (base_regnum
+ portion
))
1595 target_fetch_registers (base_regnum
+ portion
);
1598 register_valid
[reg_nr
] = 1;
1603 sh_store_pseudo_register (int reg_nr
)
1605 int base_regnum
, portion
;
1607 if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
1608 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->DR_LAST_REGNUM
)
1610 base_regnum
= dr_reg_base_num (reg_nr
);
1612 /* Write the real regs for which this one is an alias. */
1613 for (portion
= 0; portion
< 2; portion
++)
1615 register_valid
[base_regnum
+ portion
] = 1;
1616 target_store_registers (base_regnum
+ portion
);
1619 else if (reg_nr
>= gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
1620 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->FV_LAST_REGNUM
)
1622 base_regnum
= fv_reg_base_num (reg_nr
);
1624 /* Write the real regs for which this one is an alias. */
1625 for (portion
= 0; portion
< 4; portion
++)
1627 register_valid
[base_regnum
+ portion
] = 1;
1628 target_store_registers (base_regnum
+ portion
);
1634 do_fv_register_info (int fv_regnum
)
1636 int first_fp_reg_num
= fv_reg_base_num (fv_regnum
);
1637 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1638 fv_regnum
- gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
,
1639 (int) read_register (first_fp_reg_num
),
1640 (int) read_register (first_fp_reg_num
+ 1),
1641 (int) read_register (first_fp_reg_num
+ 2),
1642 (int) read_register (first_fp_reg_num
+ 3));
1646 do_dr_register_info (int dr_regnum
)
1648 int first_fp_reg_num
= dr_reg_base_num (dr_regnum
);
1650 printf_filtered ("dr%d\t0x%08x%08x\n",
1651 dr_regnum
- gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
,
1652 (int) read_register (first_fp_reg_num
),
1653 (int) read_register (first_fp_reg_num
+ 1));
1657 sh_do_pseudo_register (int regnum
)
1659 if (regnum
< NUM_REGS
|| regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS
)
1660 internal_error (__FILE__
, __LINE__
,
1661 "Invalid pseudo register number %d\n", regnum
);
1662 else if (regnum
>= gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
1663 && regnum
< gdbarch_tdep (current_gdbarch
)->DR_LAST_REGNUM
)
1664 do_dr_register_info (regnum
);
1665 else if (regnum
>= gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
1666 && regnum
<= gdbarch_tdep (current_gdbarch
)->FV_LAST_REGNUM
)
1667 do_fv_register_info (regnum
);
1672 sh_do_fp_register (int regnum
)
1673 { /* do values for FP (float) regs */
1675 double flt
; /* double extracted from raw hex data */
1679 /* Allocate space for the float. */
1680 raw_buffer
= (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM
));
1682 /* Get the data in raw format. */
1683 if (read_relative_register_raw_bytes (regnum
, raw_buffer
))
1684 error ("can't read register %d (%s)", regnum
, REGISTER_NAME (regnum
));
1686 /* Get the register as a number */
1687 flt
= unpack_double (builtin_type_float
, raw_buffer
, &inv
);
1689 /* Print the name and some spaces. */
1690 fputs_filtered (REGISTER_NAME (regnum
), gdb_stdout
);
1691 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), gdb_stdout
);
1693 /* Print the value. */
1695 printf_filtered ("<invalid float>");
1697 printf_filtered ("%-10.9g", flt
);
1699 /* Print the fp register as hex. */
1700 printf_filtered ("\t(raw 0x");
1701 for (j
= 0; j
< REGISTER_RAW_SIZE (regnum
); j
++)
1703 register int idx
= TARGET_BYTE_ORDER
== BIG_ENDIAN
? j
1704 : REGISTER_RAW_SIZE (regnum
) - 1 - j
;
1705 printf_filtered ("%02x", (unsigned char) raw_buffer
[idx
]);
1707 printf_filtered (")");
1708 printf_filtered ("\n");
1712 sh_do_register (int regnum
)
1714 char raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1716 fputs_filtered (REGISTER_NAME (regnum
), gdb_stdout
);
1717 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), gdb_stdout
);
1719 /* Get the data in raw format. */
1720 if (read_relative_register_raw_bytes (regnum
, raw_buffer
))
1721 printf_filtered ("*value not available*\n");
1723 val_print (REGISTER_VIRTUAL_TYPE (regnum
), raw_buffer
, 0, 0,
1724 gdb_stdout
, 'x', 1, 0, Val_pretty_default
);
1725 printf_filtered ("\t");
1726 val_print (REGISTER_VIRTUAL_TYPE (regnum
), raw_buffer
, 0, 0,
1727 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
1728 printf_filtered ("\n");
1732 sh_print_register (int regnum
)
1734 if (regnum
< 0 || regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS
)
1735 internal_error (__FILE__
, __LINE__
,
1736 "Invalid register number %d\n", regnum
);
1738 else if (regnum
>= 0 && regnum
< NUM_REGS
)
1740 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum
)) == TYPE_CODE_FLT
)
1741 sh_do_fp_register (regnum
); /* FP regs */
1743 sh_do_register (regnum
); /* All other regs */
1746 else if (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
1747 sh_do_pseudo_register (regnum
);
1751 sh_do_registers_info (int regnum
, int fpregs
)
1753 if (regnum
!= -1) /* do one specified register */
1755 if (*(REGISTER_NAME (regnum
)) == '\0')
1756 error ("Not a valid register for the current processor type");
1758 sh_print_register (regnum
);
1761 /* do all (or most) registers */
1764 while (regnum
< NUM_REGS
)
1766 /* If the register name is empty, it is undefined for this
1767 processor, so don't display anything. */
1768 if (REGISTER_NAME (regnum
) == NULL
1769 || *(REGISTER_NAME (regnum
)) == '\0')
1775 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum
)) == TYPE_CODE_FLT
)
1779 /* true for "INFO ALL-REGISTERS" command */
1780 sh_do_fp_register (regnum
); /* FP regs */
1784 regnum
+= (gdbarch_tdep (current_gdbarch
)->FP_LAST_REGNUM
- FP0_REGNUM
); /* skip FP regs */
1788 sh_do_register (regnum
); /* All other regs */
1794 while (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
1796 sh_do_pseudo_register (regnum
);
1802 #ifdef SVR4_SHARED_LIBS
1804 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1805 for native i386 linux targets using the struct offsets defined in
1806 link.h (but without actual reference to that file).
1808 This makes it possible to access i386-linux shared libraries from
1809 a gdb that was not built on an i386-linux host (for cross debugging).
1812 struct link_map_offsets
*
1813 sh_linux_svr4_fetch_link_map_offsets (void)
1815 static struct link_map_offsets lmo
;
1816 static struct link_map_offsets
*lmp
= 0;
1822 lmo
.r_debug_size
= 8; /* 20 not actual size but all we need */
1824 lmo
.r_map_offset
= 4;
1827 lmo
.link_map_size
= 20; /* 552 not actual size but all we need */
1829 lmo
.l_addr_offset
= 0;
1830 lmo
.l_addr_size
= 4;
1832 lmo
.l_name_offset
= 4;
1833 lmo
.l_name_size
= 4;
1835 lmo
.l_next_offset
= 12;
1836 lmo
.l_next_size
= 4;
1838 lmo
.l_prev_offset
= 16;
1839 lmo
.l_prev_size
= 4;
1844 #endif /* SVR4_SHARED_LIBS */
1846 static gdbarch_init_ftype sh_gdbarch_init
;
1848 static struct gdbarch
*
1849 sh_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1851 static LONGEST sh_call_dummy_words
[] = {0};
1852 struct gdbarch
*gdbarch
;
1853 struct gdbarch_tdep
*tdep
;
1854 gdbarch_register_name_ftype
*sh_register_name
;
1855 gdbarch_store_return_value_ftype
*sh_store_return_value
;
1856 gdbarch_register_virtual_type_ftype
*sh_register_virtual_type
;
1858 /* Find a candidate among the list of pre-declared architectures. */
1859 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1861 return arches
->gdbarch
;
1863 /* None found, create a new architecture from the information
1865 tdep
= XMALLOC (struct gdbarch_tdep
);
1866 gdbarch
= gdbarch_alloc (&info
, tdep
);
1868 /* Initialize the register numbers that are not common to all the
1869 variants to -1, if necessary thse will be overwritten in the case
1871 tdep
->FPUL_REGNUM
= -1;
1872 tdep
->FPSCR_REGNUM
= -1;
1873 tdep
->SR_REGNUM
= 22;
1874 tdep
->DSR_REGNUM
= -1;
1875 tdep
->FP_LAST_REGNUM
= -1;
1876 tdep
->A0G_REGNUM
= -1;
1877 tdep
->A0_REGNUM
= -1;
1878 tdep
->A1G_REGNUM
= -1;
1879 tdep
->A1_REGNUM
= -1;
1880 tdep
->M0_REGNUM
= -1;
1881 tdep
->M1_REGNUM
= -1;
1882 tdep
->X0_REGNUM
= -1;
1883 tdep
->X1_REGNUM
= -1;
1884 tdep
->Y0_REGNUM
= -1;
1885 tdep
->Y1_REGNUM
= -1;
1886 tdep
->MOD_REGNUM
= -1;
1887 tdep
->RS_REGNUM
= -1;
1888 tdep
->RE_REGNUM
= -1;
1889 tdep
->SSR_REGNUM
= -1;
1890 tdep
->SPC_REGNUM
= -1;
1891 tdep
->DR0_REGNUM
= -1;
1892 tdep
->DR_LAST_REGNUM
= -1;
1893 tdep
->FV0_REGNUM
= -1;
1894 tdep
->FV_LAST_REGNUM
= -1;
1896 set_gdbarch_fp0_regnum (gdbarch
, -1);
1897 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
1898 set_gdbarch_max_register_raw_size (gdbarch
, 4);
1899 set_gdbarch_max_register_virtual_size (gdbarch
, 4);
1900 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1901 set_gdbarch_num_regs (gdbarch
, 59);
1902 set_gdbarch_sp_regnum (gdbarch
, 15);
1903 set_gdbarch_fp_regnum (gdbarch
, 14);
1904 set_gdbarch_pc_regnum (gdbarch
, 16);
1905 set_gdbarch_register_size (gdbarch
, 4);
1906 set_gdbarch_register_bytes (gdbarch
, NUM_REGS
* 4);
1907 set_gdbarch_fetch_pseudo_register (gdbarch
, sh_fetch_pseudo_register
);
1908 set_gdbarch_store_pseudo_register (gdbarch
, sh_store_pseudo_register
);
1909 set_gdbarch_do_registers_info (gdbarch
, sh_do_registers_info
);
1910 set_gdbarch_breakpoint_from_pc (gdbarch
, sh_breakpoint_from_pc
);
1911 set_gdbarch_extract_return_value (gdbarch
, sh_extract_return_value
);
1912 print_sh_insn
= gdb_print_insn_sh
;
1914 switch (info
.bfd_arch_info
->mach
)
1917 sh_register_name
= sh_sh_register_name
;
1918 sh_show_regs
= sh_generic_show_regs
;
1919 sh_store_return_value
= sh_default_store_return_value
;
1920 sh_register_virtual_type
= sh_default_register_virtual_type
;
1921 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
1922 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
1923 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
1924 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
1927 sh_register_name
= sh_sh_register_name
;
1928 sh_show_regs
= sh_generic_show_regs
;
1929 sh_store_return_value
= sh_default_store_return_value
;
1930 sh_register_virtual_type
= sh_default_register_virtual_type
;
1931 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
1932 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
1933 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
1934 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
1936 case bfd_mach_sh_dsp
:
1937 sh_register_name
= sh_sh_dsp_register_name
;
1938 sh_show_regs
= sh_dsp_show_regs
;
1939 sh_store_return_value
= sh_default_store_return_value
;
1940 sh_register_virtual_type
= sh_default_register_virtual_type
;
1941 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
1942 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
1943 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
1944 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
1945 tdep
->DSR_REGNUM
= 24;
1946 tdep
->A0G_REGNUM
= 25;
1947 tdep
->A0_REGNUM
= 26;
1948 tdep
->A1G_REGNUM
= 27;
1949 tdep
->A1_REGNUM
= 28;
1950 tdep
->M0_REGNUM
= 29;
1951 tdep
->M1_REGNUM
= 30;
1952 tdep
->X0_REGNUM
= 31;
1953 tdep
->X1_REGNUM
= 32;
1954 tdep
->Y0_REGNUM
= 33;
1955 tdep
->Y1_REGNUM
= 34;
1956 tdep
->MOD_REGNUM
= 40;
1957 tdep
->RS_REGNUM
= 43;
1958 tdep
->RE_REGNUM
= 44;
1961 sh_register_name
= sh_sh3_register_name
;
1962 sh_show_regs
= sh3_show_regs
;
1963 sh_store_return_value
= sh_default_store_return_value
;
1964 sh_register_virtual_type
= sh_default_register_virtual_type
;
1965 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
1966 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
1967 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
1968 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
1969 tdep
->SSR_REGNUM
= 41;
1970 tdep
->SPC_REGNUM
= 42;
1973 sh_register_name
= sh_sh3e_register_name
;
1974 sh_show_regs
= sh3e_show_regs
;
1975 sh_store_return_value
= sh3e_sh4_store_return_value
;
1976 sh_register_virtual_type
= sh_sh3e_register_virtual_type
;
1977 set_gdbarch_extract_return_value (gdbarch
, sh3e_sh4_extract_return_value
);
1978 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_fp_frame_init_saved_regs
);
1979 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
1980 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
1981 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
1982 set_gdbarch_fp0_regnum (gdbarch
, 25);
1983 tdep
->FPUL_REGNUM
= 23;
1984 tdep
->FPSCR_REGNUM
= 24;
1985 tdep
->FP_LAST_REGNUM
= 40;
1986 tdep
->SSR_REGNUM
= 41;
1987 tdep
->SPC_REGNUM
= 42;
1989 case bfd_mach_sh3_dsp
:
1990 sh_register_name
= sh_sh3_dsp_register_name
;
1991 sh_show_regs
= sh3_dsp_show_regs
;
1992 sh_store_return_value
= sh_default_store_return_value
;
1993 sh_register_virtual_type
= sh_default_register_virtual_type
;
1994 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
1995 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
1996 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
1997 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
1998 tdep
->DSR_REGNUM
= 24;
1999 tdep
->A0G_REGNUM
= 25;
2000 tdep
->A0_REGNUM
= 26;
2001 tdep
->A1G_REGNUM
= 27;
2002 tdep
->A1_REGNUM
= 28;
2003 tdep
->M0_REGNUM
= 29;
2004 tdep
->M1_REGNUM
= 30;
2005 tdep
->X0_REGNUM
= 31;
2006 tdep
->X1_REGNUM
= 32;
2007 tdep
->Y0_REGNUM
= 33;
2008 tdep
->Y1_REGNUM
= 34;
2009 tdep
->MOD_REGNUM
= 40;
2010 tdep
->RS_REGNUM
= 43;
2011 tdep
->RE_REGNUM
= 44;
2012 tdep
->SSR_REGNUM
= 41;
2013 tdep
->SPC_REGNUM
= 42;
2016 sh_register_name
= sh_sh4_register_name
;
2017 sh_show_regs
= sh4_show_regs
;
2018 sh_store_return_value
= sh3e_sh4_store_return_value
;
2019 sh_register_virtual_type
= sh_sh4_register_virtual_type
;
2020 set_gdbarch_extract_return_value (gdbarch
, sh3e_sh4_extract_return_value
);
2021 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_fp_frame_init_saved_regs
);
2022 set_gdbarch_fp0_regnum (gdbarch
, 25);
2023 set_gdbarch_register_raw_size (gdbarch
, sh_sh4_register_raw_size
);
2024 set_gdbarch_register_virtual_size (gdbarch
, sh_sh4_register_raw_size
);
2025 set_gdbarch_register_byte (gdbarch
, sh_sh4_register_byte
);
2026 set_gdbarch_num_pseudo_regs (gdbarch
, 12);
2027 set_gdbarch_max_register_raw_size (gdbarch
, 4 * 4);
2028 set_gdbarch_max_register_virtual_size (gdbarch
, 4 * 4);
2029 set_gdbarch_register_convert_to_raw (gdbarch
, sh_sh4_register_convert_to_raw
);
2030 set_gdbarch_register_convert_to_virtual (gdbarch
, sh_sh4_register_convert_to_virtual
);
2031 set_gdbarch_register_convertible (gdbarch
, sh_sh4_register_convertible
);
2032 tdep
->FPUL_REGNUM
= 23;
2033 tdep
->FPSCR_REGNUM
= 24;
2034 tdep
->FP_LAST_REGNUM
= 40;
2035 tdep
->SSR_REGNUM
= 41;
2036 tdep
->SPC_REGNUM
= 42;
2037 tdep
->DR0_REGNUM
= 59;
2038 tdep
->DR_LAST_REGNUM
= 66;
2039 tdep
->FV0_REGNUM
= 67;
2040 tdep
->FV_LAST_REGNUM
= 70;
2043 sh_register_name
= sh_generic_register_name
;
2044 sh_show_regs
= sh_generic_show_regs
;
2045 sh_store_return_value
= sh_default_store_return_value
;
2046 sh_register_virtual_type
= sh_default_register_virtual_type
;
2047 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
2048 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
2049 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
2050 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
2054 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2055 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2056 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2057 set_gdbarch_write_fp (gdbarch
, generic_target_write_fp
);
2058 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2059 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2061 set_gdbarch_register_name (gdbarch
, sh_register_name
);
2062 set_gdbarch_register_virtual_type (gdbarch
, sh_register_virtual_type
);
2064 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2065 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2066 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2067 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2068 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2069 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2070 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);/*??should be 8?*/
2072 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
2073 set_gdbarch_call_dummy_length (gdbarch
, 0);
2074 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2075 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2076 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1); /*???*/
2077 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2078 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2079 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2080 set_gdbarch_call_dummy_words (gdbarch
, sh_call_dummy_words
);
2081 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (sh_call_dummy_words
));
2082 set_gdbarch_call_dummy_p (gdbarch
, 1);
2083 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2084 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
2085 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
2086 set_gdbarch_coerce_float_to_double (gdbarch
,
2087 sh_coerce_float_to_double
);
2089 set_gdbarch_push_arguments (gdbarch
, sh_push_arguments
);
2090 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2091 set_gdbarch_push_return_address (gdbarch
, sh_push_return_address
);
2093 set_gdbarch_store_struct_return (gdbarch
, sh_store_struct_return
);
2094 set_gdbarch_store_return_value (gdbarch
, sh_store_return_value
);
2095 set_gdbarch_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
2096 set_gdbarch_use_struct_convention (gdbarch
, sh_use_struct_convention
);
2097 set_gdbarch_init_extra_frame_info (gdbarch
, sh_init_extra_frame_info
);
2098 set_gdbarch_pop_frame (gdbarch
, sh_pop_frame
);
2099 set_gdbarch_skip_prologue (gdbarch
, sh_skip_prologue
);
2100 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2101 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2102 set_gdbarch_function_start_offset (gdbarch
, 0);
2104 set_gdbarch_frame_args_skip (gdbarch
, 0);
2105 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
2106 set_gdbarch_frame_chain (gdbarch
, sh_frame_chain
);
2107 set_gdbarch_frame_chain_valid (gdbarch
, generic_file_frame_chain_valid
);
2108 set_gdbarch_frame_saved_pc (gdbarch
, sh_frame_saved_pc
);
2109 set_gdbarch_frame_args_address (gdbarch
, default_frame_address
);
2110 set_gdbarch_frame_locals_address (gdbarch
, default_frame_address
);
2111 set_gdbarch_saved_pc_after_call (gdbarch
, sh_saved_pc_after_call
);
2112 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2113 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2114 set_gdbarch_ieee_float (gdbarch
, 1);
2115 tm_print_insn
= print_sh_insn
;
2121 _initialize_sh_tdep (void)
2123 struct cmd_list_element
*c
;
2125 register_gdbarch_init (bfd_arch_sh
, sh_gdbarch_init
);
2127 add_com ("regs", class_vars
, sh_show_regs_command
, "Print all registers");