1 /* Target-dependent code for SPARC.
3 Copyright 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 #include "arch-utils.h"
25 #include "floatformat.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
39 #include "gdb_assert.h"
40 #include "gdb_string.h"
42 #include "sparc-tdep.h"
46 /* This file implements the SPARC 32-bit ABI as defined by the section
47 "Low-Level System Information" of the SPARC Compliance Definition
48 (SCD) 2.4.1, which is the 32-bit System V psABI for SPARC. The SCD
49 lists changes with respect to the original 32-bit psABI as defined
50 in the "System V ABI, SPARC Processor Supplement".
52 Note that if we talk about SunOS, we mean SunOS 4.x, which was
53 BSD-based, which is sometimes (retroactively?) referred to as
54 Solaris 1.x. If we talk about Solaris we mean Solaris 2.x and
55 above (Solaris 7, 8 and 9 are nothing but Solaris 2.7, 2.8 and 2.9
56 suffering from severe version number inflation). Solaris 2.x is
57 also known as SunOS 5.x, since that's what uname(1) says. Solaris
60 /* Please use the sparc32_-prefix for 32-bit specific code, the
61 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
62 code that can handle both. The 64-bit specific code lives in
63 sparc64-tdep.c; don't add any here. */
65 /* The SPARC Floating-Point Quad-Precision format is similar to
66 big-endian IA-64 Quad-recision format. */
67 #define floatformat_sparc_quad floatformat_ia64_quad_big
69 /* The stack pointer is offset from the stack frame by a BIAS of 2047
70 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
71 hosts, so undefine it first. */
75 /* Macros to extract fields from SPARC instructions. */
76 #define X_OP(i) (((i) >> 30) & 0x3)
77 #define X_RD(i) (((i) >> 25) & 0x1f)
78 #define X_A(i) (((i) >> 29) & 1)
79 #define X_COND(i) (((i) >> 25) & 0xf)
80 #define X_OP2(i) (((i) >> 22) & 0x7)
81 #define X_IMM22(i) ((i) & 0x3fffff)
82 #define X_OP3(i) (((i) >> 19) & 0x3f)
83 #define X_I(i) (((i) >> 13) & 1)
84 /* Sign extension macros. */
85 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
86 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
88 /* Fetch the instruction at PC. Instructions are always big-endian
89 even if the processor operates in little-endian mode. */
92 sparc_fetch_instruction (CORE_ADDR pc
)
98 /* If we can't read the instruction at PC, return zero. */
99 if (target_read_memory (pc
, buf
, sizeof (buf
)))
103 for (i
= 0; i
< sizeof (buf
); i
++)
104 insn
= (insn
<< 8) | buf
[i
];
109 /* Return non-zero if the instruction corresponding to PC is an "unimp"
113 sparc_is_unimp_insn (CORE_ADDR pc
)
115 const unsigned long insn
= sparc_fetch_instruction (pc
);
117 return ((insn
& 0xc1c00000) == 0);
120 /* OpenBSD/sparc includes StackGhost, which according to the author's
121 website http://stackghost.cerias.purdue.edu "... transparently and
122 automatically protects applications' stack frames; more
123 specifically, it guards the return pointers. The protection
124 mechanisms require no application source or binary modification and
125 imposes only a negligible performance penalty."
127 The same website provides the following description of how
130 "StackGhost interfaces with the kernel trap handler that would
131 normally write out registers to the stack and the handler that
132 would read them back in. By XORing a cookie into the
133 return-address saved in the user stack when it is actually written
134 to the stack, and then XOR it out when the return-address is pulled
135 from the stack, StackGhost can cause attacker corrupted return
136 pointers to behave in a manner the attacker cannot predict.
137 StackGhost can also use several unused bits in the return pointer
138 to detect a smashed return pointer and abort the process."
140 For GDB this means that whenever we're reading %i7 from a stack
141 frame's window save area, we'll have to XOR the cookie.
143 More information on StackGuard can be found on in:
145 Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
146 Stack Protection." 2001. Published in USENIX Security Symposium
149 /* Fetch StackGhost Per-Process XOR cookie. */
152 sparc_fetch_wcookie (void)
154 struct target_ops
*ops
= ¤t_target
;
158 len
= target_read_partial (ops
, TARGET_OBJECT_WCOOKIE
, NULL
, buf
, 0, 8);
162 /* We should have either an 32-bit or an 64-bit cookie. */
163 gdb_assert (len
== 4 || len
== 8);
165 return extract_unsigned_integer (buf
, len
);
169 /* Return the contents if register REGNUM as an address. */
172 sparc_address_from_register (int regnum
)
176 regcache_cooked_read_unsigned (current_regcache
, regnum
, &addr
);
181 /* The functions on this page are intended to be used to classify
182 function arguments. */
184 /* Check whether TYPE is "Integral or Pointer". */
187 sparc_integral_or_pointer_p (const struct type
*type
)
189 switch (TYPE_CODE (type
))
195 case TYPE_CODE_RANGE
:
197 /* We have byte, half-word, word and extended-word/doubleword
198 integral types. The doubleword is an extension to the
199 original 32-bit ABI by the SCD 2.4.x. */
200 int len
= TYPE_LENGTH (type
);
201 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
207 /* Allow either 32-bit or 64-bit pointers. */
208 int len
= TYPE_LENGTH (type
);
209 return (len
== 4 || len
== 8);
219 /* Check whether TYPE is "Floating". */
222 sparc_floating_p (const struct type
*type
)
224 switch (TYPE_CODE (type
))
228 int len
= TYPE_LENGTH (type
);
229 return (len
== 4 || len
== 8 || len
== 16);
238 /* Check whether TYPE is "Structure or Union". */
241 sparc_structure_or_union_p (const struct type
*type
)
243 switch (TYPE_CODE (type
))
245 case TYPE_CODE_STRUCT
:
246 case TYPE_CODE_UNION
:
255 /* Register information. */
257 static const char *sparc32_register_names
[] =
259 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
260 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
261 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
262 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
264 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
265 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
266 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
267 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
269 "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
272 /* Total number of registers. */
273 #define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
275 /* We provide the aliases %d0..%d30 for the floating registers as
276 "psuedo" registers. */
278 static const char *sparc32_pseudo_register_names
[] =
280 "d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
281 "d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30"
284 /* Total number of pseudo registers. */
285 #define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names)
287 /* Return the name of register REGNUM. */
290 sparc32_register_name (int regnum
)
292 if (regnum
>= 0 && regnum
< SPARC32_NUM_REGS
)
293 return sparc32_register_names
[regnum
];
295 if (regnum
< SPARC32_NUM_REGS
+ SPARC32_NUM_PSEUDO_REGS
)
296 return sparc32_pseudo_register_names
[regnum
- SPARC32_NUM_REGS
];
301 /* Return the GDB type object for the "standard" data type of data in
305 sparc32_register_type (struct gdbarch
*gdbarch
, int regnum
)
307 if (regnum
>= SPARC_F0_REGNUM
&& regnum
<= SPARC_F31_REGNUM
)
308 return builtin_type_float
;
310 if (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
)
311 return builtin_type_double
;
313 if (regnum
== SPARC_SP_REGNUM
|| regnum
== SPARC_FP_REGNUM
)
314 return builtin_type_void_data_ptr
;
316 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
317 return builtin_type_void_func_ptr
;
319 return builtin_type_int32
;
323 sparc32_pseudo_register_read (struct gdbarch
*gdbarch
,
324 struct regcache
*regcache
,
325 int regnum
, void *buf
)
327 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
329 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
330 regcache_raw_read (regcache
, regnum
, buf
);
331 regcache_raw_read (regcache
, regnum
+ 1, ((char *)buf
) + 4);
335 sparc32_pseudo_register_write (struct gdbarch
*gdbarch
,
336 struct regcache
*regcache
,
337 int regnum
, const void *buf
)
339 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
341 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
342 regcache_raw_write (regcache
, regnum
, buf
);
343 regcache_raw_write (regcache
, regnum
+ 1, ((const char *)buf
) + 4);
348 sparc32_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
,
349 CORE_ADDR funcaddr
, int using_gcc
,
350 struct value
**args
, int nargs
,
351 struct type
*value_type
,
352 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
)
357 if (using_struct_return (value_type
, using_gcc
))
361 /* This is an UNIMP instruction. */
362 store_unsigned_integer (buf
, 4, TYPE_LENGTH (value_type
) & 0x1fff);
363 write_memory (sp
- 8, buf
, 4);
371 sparc32_store_arguments (struct regcache
*regcache
, int nargs
,
372 struct value
**args
, CORE_ADDR sp
,
373 int struct_return
, CORE_ADDR struct_addr
)
375 /* Number of words in the "parameter array". */
376 int num_elements
= 0;
380 for (i
= 0; i
< nargs
; i
++)
382 struct type
*type
= value_type (args
[i
]);
383 int len
= TYPE_LENGTH (type
);
385 if (sparc_structure_or_union_p (type
)
386 || (sparc_floating_p (type
) && len
== 16))
388 /* Structure, Union and Quad-Precision Arguments. */
391 /* Use doubleword alignment for these values. That's always
392 correct, and wasting a few bytes shouldn't be a problem. */
395 write_memory (sp
, VALUE_CONTENTS (args
[i
]), len
);
396 args
[i
] = value_from_pointer (lookup_pointer_type (type
), sp
);
399 else if (sparc_floating_p (type
))
401 /* Floating arguments. */
402 gdb_assert (len
== 4 || len
== 8);
403 num_elements
+= (len
/ 4);
407 /* Integral and pointer arguments. */
408 gdb_assert (sparc_integral_or_pointer_p (type
));
411 args
[i
] = value_cast (builtin_type_int32
, args
[i
]);
412 num_elements
+= ((len
+ 3) / 4);
416 /* Always allocate at least six words. */
417 sp
-= max (6, num_elements
) * 4;
419 /* The psABI says that "Software convention requires space for the
420 struct/union return value pointer, even if the word is unused." */
423 /* The psABI says that "Although software convention and the
424 operating system require every stack frame to be doubleword
428 for (i
= 0; i
< nargs
; i
++)
430 char *valbuf
= VALUE_CONTENTS (args
[i
]);
431 struct type
*type
= value_type (args
[i
]);
432 int len
= TYPE_LENGTH (type
);
434 gdb_assert (len
== 4 || len
== 8);
438 int regnum
= SPARC_O0_REGNUM
+ element
;
440 regcache_cooked_write (regcache
, regnum
, valbuf
);
441 if (len
> 4 && element
< 5)
442 regcache_cooked_write (regcache
, regnum
+ 1, valbuf
+ 4);
445 /* Always store the argument in memory. */
446 write_memory (sp
+ 4 + element
* 4, valbuf
, len
);
450 gdb_assert (element
== num_elements
);
456 store_unsigned_integer (buf
, 4, struct_addr
);
457 write_memory (sp
, buf
, 4);
464 sparc32_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
465 struct regcache
*regcache
, CORE_ADDR bp_addr
,
466 int nargs
, struct value
**args
, CORE_ADDR sp
,
467 int struct_return
, CORE_ADDR struct_addr
)
469 CORE_ADDR call_pc
= (struct_return
? (bp_addr
- 12) : (bp_addr
- 8));
471 /* Set return address. */
472 regcache_cooked_write_unsigned (regcache
, SPARC_O7_REGNUM
, call_pc
);
474 /* Set up function arguments. */
475 sp
= sparc32_store_arguments (regcache
, nargs
, args
, sp
,
476 struct_return
, struct_addr
);
478 /* Allocate the 16-word window save area. */
481 /* Stack should be doubleword aligned at this point. */
482 gdb_assert (sp
% 8 == 0);
484 /* Finally, update the stack pointer. */
485 regcache_cooked_write_unsigned (regcache
, SPARC_SP_REGNUM
, sp
);
491 /* Use the program counter to determine the contents and size of a
492 breakpoint instruction. Return a pointer to a string of bytes that
493 encode a breakpoint instruction, store the length of the string in
494 *LEN and optionally adjust *PC to point to the correct memory
495 location for inserting the breakpoint. */
497 static const unsigned char *
498 sparc_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
500 static unsigned char break_insn
[] = { 0x91, 0xd0, 0x20, 0x01 };
502 *len
= sizeof (break_insn
);
507 /* Allocate and initialize a frame cache. */
509 static struct sparc_frame_cache
*
510 sparc_alloc_frame_cache (void)
512 struct sparc_frame_cache
*cache
;
515 cache
= FRAME_OBSTACK_ZALLOC (struct sparc_frame_cache
);
521 /* Frameless until proven otherwise. */
522 cache
->frameless_p
= 1;
524 cache
->struct_return_p
= 0;
530 sparc_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
531 struct sparc_frame_cache
*cache
)
533 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
538 if (current_pc
<= pc
)
541 /* We have to handle to "Procedure Linkage Table" (PLT) special. On
542 SPARC the linker usually defines a symbol (typically
543 _PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
544 This symbol makes us end up here with PC pointing at the start of
545 the PLT and CURRENT_PC probably pointing at a PLT entry. If we
546 would do our normal prologue analysis, we would probably conclude
547 that we've got a frame when in reality we don't, since the
548 dynamic linker patches up the first PLT with some code that
549 starts with a SAVE instruction. Patch up PC such that it points
550 at the start of our PLT entry. */
551 if (tdep
->plt_entry_size
> 0 && in_plt_section (current_pc
, NULL
))
552 pc
= current_pc
- ((current_pc
- pc
) % tdep
->plt_entry_size
);
554 insn
= sparc_fetch_instruction (pc
);
556 /* Recognize a SETHI insn and record its destination. */
557 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 0x04)
562 insn
= sparc_fetch_instruction (pc
+ 4);
565 /* Allow for an arithmetic operation on DEST or %g1. */
566 if (X_OP (insn
) == 2 && X_I (insn
)
567 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
571 insn
= sparc_fetch_instruction (pc
+ 8);
574 /* Check for the SAVE instruction that sets up the frame. */
575 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
577 cache
->frameless_p
= 0;
578 return pc
+ offset
+ 4;
585 sparc_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
587 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
588 return frame_unwind_register_unsigned (next_frame
, tdep
->pc_regnum
);
591 /* Return PC of first real instruction of the function starting at
595 sparc32_skip_prologue (CORE_ADDR start_pc
)
597 struct symtab_and_line sal
;
598 CORE_ADDR func_start
, func_end
;
599 struct sparc_frame_cache cache
;
601 /* This is the preferred method, find the end of the prologue by
602 using the debugging information. */
603 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
605 sal
= find_pc_line (func_start
, 0);
607 if (sal
.end
< func_end
608 && start_pc
<= sal
.end
)
612 return sparc_analyze_prologue (start_pc
, 0xffffffffUL
, &cache
);
617 struct sparc_frame_cache
*
618 sparc_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
620 struct sparc_frame_cache
*cache
;
625 cache
= sparc_alloc_frame_cache ();
628 cache
->pc
= frame_func_unwind (next_frame
);
631 CORE_ADDR addr_in_block
= frame_unwind_address_in_block (next_frame
);
632 sparc_analyze_prologue (cache
->pc
, addr_in_block
, cache
);
635 if (cache
->frameless_p
)
637 /* This function is frameless, so %fp (%i6) holds the frame
638 pointer for our calling frame. Use %sp (%o6) as this frame's
641 frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
645 /* For normal frames, %fp (%i6) holds the frame pointer, the
646 base address for the current stack frame. */
648 frame_unwind_register_unsigned (next_frame
, SPARC_FP_REGNUM
);
654 struct sparc_frame_cache
*
655 sparc32_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
657 struct sparc_frame_cache
*cache
;
663 cache
= sparc_frame_cache (next_frame
, this_cache
);
665 sym
= find_pc_function (cache
->pc
);
668 struct type
*type
= check_typedef (SYMBOL_TYPE (sym
));
669 enum type_code code
= TYPE_CODE (type
);
671 if (code
== TYPE_CODE_FUNC
|| code
== TYPE_CODE_METHOD
)
673 type
= check_typedef (TYPE_TARGET_TYPE (type
));
674 if (sparc_structure_or_union_p (type
)
675 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
676 cache
->struct_return_p
= 1;
681 /* There is no debugging information for this function to
682 help us determine whether this function returns a struct
683 or not. So we rely on another heuristic which is to check
684 the instruction at the return address and see if this is
685 an "unimp" instruction. If it is, then it is a struct-return
688 int regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
690 pc
= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
691 if (sparc_is_unimp_insn (pc
))
692 cache
->struct_return_p
= 1;
699 sparc32_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
700 struct frame_id
*this_id
)
702 struct sparc_frame_cache
*cache
=
703 sparc32_frame_cache (next_frame
, this_cache
);
705 /* This marks the outermost frame. */
706 if (cache
->base
== 0)
709 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
713 sparc32_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
714 int regnum
, int *optimizedp
,
715 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
716 int *realnump
, void *valuep
)
718 struct sparc_frame_cache
*cache
=
719 sparc32_frame_cache (next_frame
, this_cache
);
721 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
729 CORE_ADDR pc
= (regnum
== SPARC32_NPC_REGNUM
) ? 4 : 0;
731 /* If this functions has a Structure, Union or
732 Quad-Precision return value, we have to skip the UNIMP
733 instruction that encodes the size of the structure. */
734 if (cache
->struct_return_p
)
737 regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
738 pc
+= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
739 store_unsigned_integer (valuep
, 4, pc
);
744 /* Handle StackGhost. */
746 ULONGEST wcookie
= sparc_fetch_wcookie ();
748 if (wcookie
!= 0 && !cache
->frameless_p
&& regnum
== SPARC_I7_REGNUM
)
756 CORE_ADDR addr
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
759 /* Read the value in from memory. */
760 i7
= get_frame_memory_unsigned (next_frame
, addr
, 4);
761 store_unsigned_integer (valuep
, 4, i7
^ wcookie
);
767 /* The previous frame's `local' and `in' registers have been saved
768 in the register save area. */
769 if (!cache
->frameless_p
770 && regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
)
773 *lvalp
= lval_memory
;
774 *addrp
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
778 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
780 /* Read the value in from memory. */
781 read_memory (*addrp
, valuep
, register_size (gdbarch
, regnum
));
786 /* The previous frame's `out' registers are accessable as the
787 current frame's `in' registers. */
788 if (!cache
->frameless_p
789 && regnum
>= SPARC_O0_REGNUM
&& regnum
<= SPARC_O7_REGNUM
)
790 regnum
+= (SPARC_I0_REGNUM
- SPARC_O0_REGNUM
);
793 *lvalp
= lval_register
;
797 frame_unwind_register (next_frame
, (*realnump
), valuep
);
800 static const struct frame_unwind sparc32_frame_unwind
=
803 sparc32_frame_this_id
,
804 sparc32_frame_prev_register
807 static const struct frame_unwind
*
808 sparc32_frame_sniffer (struct frame_info
*next_frame
)
810 return &sparc32_frame_unwind
;
815 sparc32_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
817 struct sparc_frame_cache
*cache
=
818 sparc32_frame_cache (next_frame
, this_cache
);
823 static const struct frame_base sparc32_frame_base
=
825 &sparc32_frame_unwind
,
826 sparc32_frame_base_address
,
827 sparc32_frame_base_address
,
828 sparc32_frame_base_address
831 static struct frame_id
832 sparc_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
836 sp
= frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
837 return frame_id_build (sp
, frame_pc_unwind (next_frame
));
841 /* Extract from an array REGBUF containing the (raw) register state, a
842 function return value of TYPE, and copy that into VALBUF. */
845 sparc32_extract_return_value (struct type
*type
, struct regcache
*regcache
,
848 int len
= TYPE_LENGTH (type
);
851 gdb_assert (!sparc_structure_or_union_p (type
));
852 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
854 if (sparc_floating_p (type
))
856 /* Floating return values. */
857 regcache_cooked_read (regcache
, SPARC_F0_REGNUM
, buf
);
859 regcache_cooked_read (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
860 memcpy (valbuf
, buf
, len
);
864 /* Integral and pointer return values. */
865 gdb_assert (sparc_integral_or_pointer_p (type
));
867 regcache_cooked_read (regcache
, SPARC_O0_REGNUM
, buf
);
870 regcache_cooked_read (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
871 gdb_assert (len
== 8);
872 memcpy (valbuf
, buf
, 8);
876 /* Just stripping off any unused bytes should preserve the
877 signed-ness just fine. */
878 memcpy (valbuf
, buf
+ 4 - len
, len
);
883 /* Write into the appropriate registers a function return value stored
884 in VALBUF of type TYPE. */
887 sparc32_store_return_value (struct type
*type
, struct regcache
*regcache
,
890 int len
= TYPE_LENGTH (type
);
893 gdb_assert (!sparc_structure_or_union_p (type
));
894 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
896 if (sparc_floating_p (type
))
898 /* Floating return values. */
899 memcpy (buf
, valbuf
, len
);
900 regcache_cooked_write (regcache
, SPARC_F0_REGNUM
, buf
);
902 regcache_cooked_write (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
906 /* Integral and pointer return values. */
907 gdb_assert (sparc_integral_or_pointer_p (type
));
911 gdb_assert (len
== 8);
912 memcpy (buf
, valbuf
, 8);
913 regcache_cooked_write (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
917 /* ??? Do we need to do any sign-extension here? */
918 memcpy (buf
+ 4 - len
, valbuf
, len
);
920 regcache_cooked_write (regcache
, SPARC_O0_REGNUM
, buf
);
924 static enum return_value_convention
925 sparc32_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
926 struct regcache
*regcache
, void *readbuf
,
927 const void *writebuf
)
929 if (sparc_structure_or_union_p (type
)
930 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
931 return RETURN_VALUE_STRUCT_CONVENTION
;
934 sparc32_extract_return_value (type
, regcache
, readbuf
);
936 sparc32_store_return_value (type
, regcache
, writebuf
);
938 return RETURN_VALUE_REGISTER_CONVENTION
;
942 /* NOTE: cagney/2004-01-17: For the moment disable this method. The
943 architecture and CORE-gdb will need new code (and a replacement for
944 DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS) before this can be made to
945 work robustly. Here is a possible function signature: */
946 /* NOTE: cagney/2004-01-17: So far only the 32-bit SPARC ABI has been
947 identifed as having a way to robustly recover the address of a
948 struct-convention return-value (after the function has returned).
949 For all other ABIs so far examined, the calling convention makes no
950 guarenteed that the register containing the return-value will be
951 preserved and hence that the return-value's address can be
953 /* Extract from REGCACHE, which contains the (raw) register state, the
954 address in which a function should return its structure value, as a
958 sparc32_extract_struct_value_address (struct regcache
*regcache
)
962 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
963 return read_memory_unsigned_integer (sp
+ 64, 4);
968 sparc32_stabs_argument_has_addr (struct gdbarch
*gdbarch
, struct type
*type
)
970 return (sparc_structure_or_union_p (type
)
971 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16));
975 /* The SPARC Architecture doesn't have hardware single-step support,
976 and most operating systems don't implement it either, so we provide
977 software single-step mechanism. */
980 sparc_analyze_control_transfer (CORE_ADDR pc
, CORE_ADDR
*npc
)
982 unsigned long insn
= sparc_fetch_instruction (pc
);
983 int conditional_p
= X_COND (insn
) & 0x7;
985 long offset
= 0; /* Must be signed for sign-extend. */
987 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 3 && (insn
& 0x1000000) == 0)
989 /* Branch on Integer Register with Prediction (BPr). */
993 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 6)
995 /* Branch on Floating-Point Condition Codes (FBfcc). */
997 offset
= 4 * X_DISP22 (insn
);
999 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 5)
1001 /* Branch on Floating-Point Condition Codes with Prediction
1004 offset
= 4 * X_DISP19 (insn
);
1006 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 2)
1008 /* Branch on Integer Condition Codes (Bicc). */
1010 offset
= 4 * X_DISP22 (insn
);
1012 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 1)
1014 /* Branch on Integer Condition Codes with Prediction (BPcc). */
1016 offset
= 4 * X_DISP19 (insn
);
1019 /* FIXME: Handle DONE and RETRY instructions. */
1021 /* FIXME: Handle the Trap instruction. */
1027 /* For conditional branches, return nPC + 4 iff the annul
1029 return (X_A (insn
) ? *npc
+ 4 : 0);
1033 /* For unconditional branches, return the target if its
1034 specified condition is "always" and return nPC + 4 if the
1035 condition is "never". If the annul bit is 1, set *NPC to
1037 if (X_COND (insn
) == 0x0)
1038 pc
= *npc
, offset
= 4;
1042 gdb_assert (offset
!= 0);
1051 sparc_software_single_step (enum target_signal sig
, int insert_breakpoints_p
)
1053 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1054 static CORE_ADDR npc
, nnpc
;
1055 static char npc_save
[4], nnpc_save
[4];
1057 if (insert_breakpoints_p
)
1059 CORE_ADDR pc
, orig_npc
;
1061 pc
= sparc_address_from_register (tdep
->pc_regnum
);
1062 orig_npc
= npc
= sparc_address_from_register (tdep
->npc_regnum
);
1064 /* Analyze the instruction at PC. */
1065 nnpc
= sparc_analyze_control_transfer (pc
, &npc
);
1067 target_insert_breakpoint (npc
, npc_save
);
1069 target_insert_breakpoint (nnpc
, nnpc_save
);
1071 /* Assert that we have set at least one breakpoint, and that
1072 they're not set at the same spot - unless we're going
1073 from here straight to NULL, i.e. a call or jump to 0. */
1074 gdb_assert (npc
!= 0 || nnpc
!= 0 || orig_npc
== 0);
1075 gdb_assert (nnpc
!= npc
|| orig_npc
== 0);
1080 target_remove_breakpoint (npc
, npc_save
);
1082 target_remove_breakpoint (nnpc
, nnpc_save
);
1087 sparc_write_pc (CORE_ADDR pc
, ptid_t ptid
)
1089 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1091 write_register_pid (tdep
->pc_regnum
, pc
, ptid
);
1092 write_register_pid (tdep
->npc_regnum
, pc
+ 4, ptid
);
1095 /* Unglobalize NAME. */
1098 sparc_stabs_unglobalize_name (char *name
)
1100 /* The Sun compilers (Sun ONE Studio, Forte Developer, Sun WorkShop,
1101 SunPRO) convert file static variables into global values, a
1102 process known as globalization. In order to do this, the
1103 compiler will create a unique prefix and prepend it to each file
1104 static variable. For static variables within a function, this
1105 globalization prefix is followed by the function name (nested
1106 static variables within a function are supposed to generate a
1107 warning message, and are left alone). The procedure is
1108 documented in the Stabs Interface Manual, which is distrubuted
1109 with the compilers, although version 4.0 of the manual seems to
1110 be incorrect in some places, at least for SPARC. The
1111 globalization prefix is encoded into an N_OPT stab, with the form
1112 "G=<prefix>". The globalization prefix always seems to start
1113 with a dollar sign '$'; a dot '.' is used as a seperator. So we
1114 simply strip everything up until the last dot. */
1118 char *p
= strrchr (name
, '.');
1127 /* Return the appropriate register set for the core section identified
1128 by SECT_NAME and SECT_SIZE. */
1130 const struct regset
*
1131 sparc_regset_from_core_section (struct gdbarch
*gdbarch
,
1132 const char *sect_name
, size_t sect_size
)
1134 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1136 if (strcmp (sect_name
, ".reg") == 0 && sect_size
>= tdep
->sizeof_gregset
)
1137 return tdep
->gregset
;
1139 if (strcmp (sect_name
, ".reg2") == 0 && sect_size
>= tdep
->sizeof_fpregset
)
1140 return tdep
->fpregset
;
1146 static struct gdbarch
*
1147 sparc32_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1149 struct gdbarch_tdep
*tdep
;
1150 struct gdbarch
*gdbarch
;
1152 /* If there is already a candidate, use it. */
1153 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1155 return arches
->gdbarch
;
1157 /* Allocate space for the new architecture. */
1158 tdep
= XMALLOC (struct gdbarch_tdep
);
1159 gdbarch
= gdbarch_alloc (&info
, tdep
);
1161 tdep
->pc_regnum
= SPARC32_PC_REGNUM
;
1162 tdep
->npc_regnum
= SPARC32_NPC_REGNUM
;
1163 tdep
->gregset
= NULL
;
1164 tdep
->sizeof_gregset
= 0;
1165 tdep
->fpregset
= NULL
;
1166 tdep
->sizeof_fpregset
= 0;
1167 tdep
->plt_entry_size
= 0;
1169 set_gdbarch_long_double_bit (gdbarch
, 128);
1170 set_gdbarch_long_double_format (gdbarch
, &floatformat_sparc_quad
);
1172 set_gdbarch_num_regs (gdbarch
, SPARC32_NUM_REGS
);
1173 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
1174 set_gdbarch_register_type (gdbarch
, sparc32_register_type
);
1175 set_gdbarch_num_pseudo_regs (gdbarch
, SPARC32_NUM_PSEUDO_REGS
);
1176 set_gdbarch_pseudo_register_read (gdbarch
, sparc32_pseudo_register_read
);
1177 set_gdbarch_pseudo_register_write (gdbarch
, sparc32_pseudo_register_write
);
1179 /* Register numbers of various important registers. */
1180 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
); /* %sp */
1181 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
); /* %pc */
1182 set_gdbarch_fp0_regnum (gdbarch
, SPARC_F0_REGNUM
); /* %f0 */
1184 /* Call dummy code. */
1185 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
1186 set_gdbarch_push_dummy_code (gdbarch
, sparc32_push_dummy_code
);
1187 set_gdbarch_push_dummy_call (gdbarch
, sparc32_push_dummy_call
);
1189 set_gdbarch_return_value (gdbarch
, sparc32_return_value
);
1190 set_gdbarch_stabs_argument_has_addr
1191 (gdbarch
, sparc32_stabs_argument_has_addr
);
1193 set_gdbarch_skip_prologue (gdbarch
, sparc32_skip_prologue
);
1195 /* Stack grows downward. */
1196 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1198 set_gdbarch_breakpoint_from_pc (gdbarch
, sparc_breakpoint_from_pc
);
1200 set_gdbarch_frame_args_skip (gdbarch
, 8);
1202 set_gdbarch_print_insn (gdbarch
, print_insn_sparc
);
1204 set_gdbarch_software_single_step (gdbarch
, sparc_software_single_step
);
1205 set_gdbarch_write_pc (gdbarch
, sparc_write_pc
);
1207 set_gdbarch_unwind_dummy_id (gdbarch
, sparc_unwind_dummy_id
);
1209 set_gdbarch_unwind_pc (gdbarch
, sparc_unwind_pc
);
1211 frame_base_set_default (gdbarch
, &sparc32_frame_base
);
1213 /* Hook in ABI-specific overrides, if they have been registered. */
1214 gdbarch_init_osabi (info
, gdbarch
);
1216 frame_unwind_append_sniffer (gdbarch
, sparc32_frame_sniffer
);
1218 /* If we have register sets, enable the generic core file support. */
1220 set_gdbarch_regset_from_core_section (gdbarch
,
1221 sparc_regset_from_core_section
);
1226 /* Helper functions for dealing with register windows. */
1229 sparc_supply_rwindow (struct regcache
*regcache
, CORE_ADDR sp
, int regnum
)
1237 /* Registers are 64-bit. */
1240 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1242 if (regnum
== i
|| regnum
== -1)
1244 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1245 regcache_raw_supply (regcache
, i
, buf
);
1251 /* Registers are 32-bit. Toss any sign-extension of the stack
1255 /* Clear out the top half of the temporary buffer, and put the
1256 register value in the bottom half if we're in 64-bit mode. */
1257 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1263 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1265 if (regnum
== i
|| regnum
== -1)
1267 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1270 /* Handle StackGhost. */
1271 if (i
== SPARC_I7_REGNUM
)
1273 ULONGEST wcookie
= sparc_fetch_wcookie ();
1274 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1276 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1279 regcache_raw_supply (regcache
, i
, buf
);
1286 sparc_collect_rwindow (const struct regcache
*regcache
,
1287 CORE_ADDR sp
, int regnum
)
1295 /* Registers are 64-bit. */
1298 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1300 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1302 regcache_raw_collect (regcache
, i
, buf
);
1303 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1309 /* Registers are 32-bit. Toss any sign-extension of the stack
1313 /* Only use the bottom half if we're in 64-bit mode. */
1314 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1317 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1319 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1321 regcache_raw_collect (regcache
, i
, buf
);
1323 /* Handle StackGhost. */
1324 if (i
== SPARC_I7_REGNUM
)
1326 ULONGEST wcookie
= sparc_fetch_wcookie ();
1327 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1329 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1332 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1339 /* Helper functions for dealing with register sets. */
1342 sparc32_supply_gregset (const struct sparc_gregset
*gregset
,
1343 struct regcache
*regcache
,
1344 int regnum
, const void *gregs
)
1346 const char *regs
= gregs
;
1349 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1350 regcache_raw_supply (regcache
, SPARC32_PSR_REGNUM
,
1351 regs
+ gregset
->r_psr_offset
);
1353 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1354 regcache_raw_supply (regcache
, SPARC32_PC_REGNUM
,
1355 regs
+ gregset
->r_pc_offset
);
1357 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1358 regcache_raw_supply (regcache
, SPARC32_NPC_REGNUM
,
1359 regs
+ gregset
->r_npc_offset
);
1361 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1362 regcache_raw_supply (regcache
, SPARC32_Y_REGNUM
,
1363 regs
+ gregset
->r_y_offset
);
1365 if (regnum
== SPARC_G0_REGNUM
|| regnum
== -1)
1366 regcache_raw_supply (regcache
, SPARC_G0_REGNUM
, NULL
);
1368 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1370 int offset
= gregset
->r_g1_offset
;
1372 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1374 if (regnum
== i
|| regnum
== -1)
1375 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1380 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1382 /* Not all of the register set variants include Locals and
1383 Inputs. For those that don't, we read them off the stack. */
1384 if (gregset
->r_l0_offset
== -1)
1388 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
1389 sparc_supply_rwindow (regcache
, sp
, regnum
);
1393 int offset
= gregset
->r_l0_offset
;
1395 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1397 if (regnum
== i
|| regnum
== -1)
1398 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1406 sparc32_collect_gregset (const struct sparc_gregset
*gregset
,
1407 const struct regcache
*regcache
,
1408 int regnum
, void *gregs
)
1413 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1414 regcache_raw_collect (regcache
, SPARC32_PSR_REGNUM
,
1415 regs
+ gregset
->r_psr_offset
);
1417 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1418 regcache_raw_collect (regcache
, SPARC32_PC_REGNUM
,
1419 regs
+ gregset
->r_pc_offset
);
1421 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1422 regcache_raw_collect (regcache
, SPARC32_NPC_REGNUM
,
1423 regs
+ gregset
->r_npc_offset
);
1425 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1426 regcache_raw_collect (regcache
, SPARC32_Y_REGNUM
,
1427 regs
+ gregset
->r_y_offset
);
1429 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1431 int offset
= gregset
->r_g1_offset
;
1433 /* %g0 is always zero. */
1434 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1436 if (regnum
== i
|| regnum
== -1)
1437 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1442 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1444 /* Not all of the register set variants include Locals and
1445 Inputs. For those that don't, we read them off the stack. */
1446 if (gregset
->r_l0_offset
!= -1)
1448 int offset
= gregset
->r_l0_offset
;
1450 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1452 if (regnum
== i
|| regnum
== -1)
1453 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1461 sparc32_supply_fpregset (struct regcache
*regcache
,
1462 int regnum
, const void *fpregs
)
1464 const char *regs
= fpregs
;
1467 for (i
= 0; i
< 32; i
++)
1469 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1470 regcache_raw_supply (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1473 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1474 regcache_raw_supply (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1478 sparc32_collect_fpregset (const struct regcache
*regcache
,
1479 int regnum
, void *fpregs
)
1481 char *regs
= fpregs
;
1484 for (i
= 0; i
< 32; i
++)
1486 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1487 regcache_raw_collect (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1490 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1491 regcache_raw_collect (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1497 /* From <machine/reg.h>. */
1498 const struct sparc_gregset sparc32_sunos4_gregset
=
1511 /* Provide a prototype to silence -Wmissing-prototypes. */
1512 void _initialize_sparc_tdep (void);
1515 _initialize_sparc_tdep (void)
1517 register_gdbarch_init (bfd_arch_sparc
, sparc32_gdbarch_init
);