1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "ieee-float.h"
27 #include "symfile.h" /* for objfiles.h */
28 #include "objfiles.h" /* for find_pc_section */
31 #include <sys/procfs.h>
37 extern int stop_after_trap
;
39 /* We don't store all registers immediately when requested, since they
40 get sent over in large chunks anyway. Instead, we accumulate most
41 of the changes and send them over once. "deferred_stores" keeps
42 track of which sets of registers we have locally-changed copies of,
43 so we only need send the groups that have changed. */
45 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
49 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
52 /* Simulate single-step ptrace call for sun4. Code written by Gary
53 Beihl (beihl@mcc.com). */
55 /* npc4 and next_pc describe the situation at the time that the
56 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
57 static CORE_ADDR next_pc
, npc4
, target
;
58 static int brknpc4
, brktrg
;
59 typedef char binsn_quantum
[BREAKPOINT_MAX
];
60 static binsn_quantum break_mem
[3];
62 /* Non-zero if we just simulated a single-step ptrace call. This is
63 needed because we cannot remove the breakpoints in the inferior
64 process until after the `wait' in `wait_for_inferior'. Used for
69 /* single_step() is called just before we want to resume the inferior,
70 if we want to single-step it but there is no hardware or kernel single-step
71 support (as on all SPARCs). We find all the possible targets of the
72 coming instruction and breakpoint them.
74 single_step is also called just after the inferior stops. If we had
75 set up a simulated single-step, we undo our damage. */
79 int ignore
; /* pid, but we don't need it */
81 branch_type br
, isannulled();
87 /* Always set breakpoint for NPC. */
88 next_pc
= read_register (NPC_REGNUM
);
89 npc4
= next_pc
+ 4; /* branch not taken */
91 target_insert_breakpoint (next_pc
, break_mem
[0]);
92 /* printf ("set break at %x\n",next_pc); */
94 pc
= read_register (PC_REGNUM
);
95 pc_instruction
= read_memory_integer (pc
, sizeof(pc_instruction
));
96 br
= isannulled (pc_instruction
, pc
, &target
);
101 /* Conditional annulled branch will either end up at
102 npc (if taken) or at npc+4 (if not taken).
105 target_insert_breakpoint (npc4
, break_mem
[1]);
107 else if (br
== baa
&& target
!= next_pc
)
109 /* Unconditional annulled branch will always end up at
112 target_insert_breakpoint (target
, break_mem
[2]);
115 /* We are ready to let it go */
121 /* Remove breakpoints */
122 target_remove_breakpoint (next_pc
, break_mem
[0]);
125 target_remove_breakpoint (npc4
, break_mem
[1]);
128 target_remove_breakpoint (target
, break_mem
[2]);
134 #define FRAME_SAVED_L0 0 /* Byte offset from SP */
135 #define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (0)) /* Byte offset from SP */
138 sparc_frame_chain (thisframe
)
141 REGISTER_TYPE retval
;
145 addr
= thisframe
->frame
+ FRAME_SAVED_I0
+
146 REGISTER_RAW_SIZE (FP_REGNUM
) * (FP_REGNUM
- I0_REGNUM
);
147 err
= target_read_memory (addr
, (char *) &retval
, sizeof (REGISTER_TYPE
));
150 SWAP_TARGET_AND_HOST (&retval
, sizeof (retval
));
155 sparc_extract_struct_value_address (regbuf
)
156 char regbuf
[REGISTER_BYTES
];
158 /* FIXME, handle byte swapping */
159 return read_memory_integer (((int *)(regbuf
))[SP_REGNUM
]+(16*4),
163 /* Find the pc saved in frame FRAME. */
166 frame_saved_pc (frame
)
169 REGISTER_TYPE retval
;
170 CORE_ADDR addr
,prev_pc
;
172 if (get_current_frame () == frame
) /* FIXME, debug check. Remove >=gdb-4.6 */
174 if (read_register (SP_REGNUM
) != frame
->bottom
) abort();
177 addr
= (frame
->bottom
+ FRAME_SAVED_I0
+
178 REGISTER_RAW_SIZE (I7_REGNUM
) * (I7_REGNUM
- I0_REGNUM
));
179 read_memory (addr
, (char *) &retval
, sizeof (REGISTER_TYPE
));
180 SWAP_TARGET_AND_HOST (&retval
, sizeof (retval
));
182 /* CORE_ADDR isn't always the same size as REGISTER_TYPE, so convert. */
184 prev_pc
= (CORE_ADDR
) retval
;
185 return PC_ADJUST (prev_pc
);
189 * Since an individual frame in the frame cache is defined by two
190 * arguments (a frame pointer and a stack pointer), we need two
191 * arguments to get info for an arbitrary stack frame. This routine
192 * takes two arguments and makes the cached frames look as if these
193 * two arguments defined a frame on the cache. This allows the rest
194 * of info frame to extract the important arguments without
198 setup_arbitrary_frame (argc
, argv
)
205 error ("Sparc frame specifications require two arguments: fp and sp");
207 fid
= create_new_frame (argv
[0], 0);
210 fatal ("internal: create_new_frame returned invalid frame id");
212 fid
->bottom
= argv
[1];
213 fid
->pc
= FRAME_SAVED_PC (fid
);
217 /* This code was written by Gary Beihl (beihl@mcc.com).
218 It was modified by Michael Tiemann (tiemann@corto.inria.fr). */
221 * This routine appears to be passed a size by which to increase the
222 * stack. It then executes a save instruction in the inferior to
223 * increase the stack by this amount. Only the register window system
224 * should be affected by this; the program counter & etc. will not be.
226 * This instructions used for this purpose are:
228 * sethi %hi(0x0),g1 *
231 * sethi %hi(0x0),g1 *
234 * sethi %hi(0x0),g0 (nop)
236 * I presume that these set g1 to be the negative of the size, do a
237 * save (putting the stack pointer at sp - size) and restore the
238 * original contents of g1. A * indicates that the actual value of
239 * the instruction is modified below.
241 static unsigned int save_insn_opcodes
[] = {
242 0x03000000, 0x82007ee0, 0x9de38001, 0x03000000,
243 0x82007ee0, 0x91d02001, 0x01000000 };
246 The person who wrote function calls on the SPARC didn't understand the
247 SPARC stack. There is no need to call into the inferior to run a save
248 instruction and then do it again for a restore instruction. Save and
249 restore amount to add-to-SP and move-to-SP when all has been said and
250 done. You simply modify the stack in memory to look like a function
251 has been called -- the same way any other architecture does it.
253 That would fix the sparc xfail in testsuite/gdb.t06/signals.exp, make
254 function calls much faster, and would clean up some very poor code. */
257 /* Neither do_save_insn or do_restore_insn save stack configuration
258 (current_frame, etc),
259 since the stack is in an indeterminate state through the call to
260 each of them. That is the responsibility of the routine which calls them. */
266 int g1
= read_register (G1_REGNUM
);
267 CORE_ADDR sp
= read_register (SP_REGNUM
);
268 CORE_ADDR pc
= read_register (PC_REGNUM
);
269 CORE_ADDR npc
= read_register (NPC_REGNUM
);
270 CORE_ADDR fake_pc
= sp
- sizeof (save_insn_opcodes
);
271 struct inferior_status inf_status
;
273 save_inferior_status (&inf_status
, 0); /* Don't restore stack info */
277 save_insn_opcodes
[0] = 0x03000000 | ((-size
>> 10) & 0x3fffff);
278 save_insn_opcodes
[1] = 0x82006000 | (-size
& 0x3ff);
279 save_insn_opcodes
[3] = 0x03000000 | ((g1
>> 10) & 0x3fffff);
280 save_insn_opcodes
[4] = 0x82006000 | (g1
& 0x3ff);
281 write_memory (fake_pc
, (char *)save_insn_opcodes
, sizeof (save_insn_opcodes
));
283 clear_proceed_status ();
285 proceed (fake_pc
, 0, 0);
287 write_register (PC_REGNUM
, pc
);
288 write_register (NPC_REGNUM
, npc
);
289 restore_inferior_status (&inf_status
);
293 * This routine takes a program counter value. It restores the
294 * register window system to the frame above the current one.
295 * THIS ROUTINE CLOBBERS PC AND NPC IN THE TARGET!
298 /* The following insns translate to:
304 static unsigned int restore_insn_opcodes
[] = {
305 0x81e80000, 0x91d02001, 0x01000000 };
310 CORE_ADDR sp
= read_register (SP_REGNUM
);
311 CORE_ADDR fake_pc
= sp
- sizeof (restore_insn_opcodes
);
312 struct inferior_status inf_status
;
314 save_inferior_status (&inf_status
, 0); /* Don't restore stack info */
316 write_memory (fake_pc
, (char *)restore_insn_opcodes
,
317 sizeof (restore_insn_opcodes
));
319 clear_proceed_status ();
321 proceed (fake_pc
, 0, 0);
323 restore_inferior_status (&inf_status
);
326 /* Given a pc value, skip it forward past the function prologue by
327 disassembling instructions that appear to be a prologue.
329 If FRAMELESS_P is set, we are only testing to see if the function
330 is frameless. This allows a quicker answer.
332 This routine should be more specific in its actions; making sure
333 that it uses the same register in the initial prologue section. */
335 skip_prologue (start_pc
, frameless_p
)
341 unsigned long int code
;
347 unsigned int imm22
:22;
356 unsigned int simm13
:13;
361 CORE_ADDR pc
= start_pc
;
363 x
.i
= read_memory_integer (pc
, 4);
365 /* Recognize the `sethi' insn and record its destination. */
366 if (x
.sethi
.op
== 0 && x
.sethi
.op2
== 4)
370 x
.i
= read_memory_integer (pc
, 4);
373 /* Recognize an add immediate value to register to either %g1 or
374 the destination register recorded above. Actually, this might
375 well recognize several different arithmetic operations.
376 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
377 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
378 I imagine any compiler really does that, however). */
379 if (x
.add
.op
== 2 && x
.add
.i
&& (x
.add
.rd
== 1 || x
.add
.rd
== dest
))
382 x
.i
= read_memory_integer (pc
, 4);
385 /* This recognizes any SAVE insn. But why do the XOR and then
386 the compare? That's identical to comparing against 60 (as long
387 as there isn't any sign extension). */
388 if (x
.add
.op
== 2 && (x
.add
.op3
^ 32) == 28)
391 if (frameless_p
) /* If the save is all we care about, */
392 return pc
; /* return before doing more work */
393 x
.i
= read_memory_integer (pc
, 4);
397 /* Without a save instruction, it's not a prologue. */
401 /* Now we need to recognize stores into the frame from the input
402 registers. This recognizes all non alternate stores of input
403 register, into a location offset from the frame pointer. */
405 && (x
.add
.op3
& 0x3c) == 4 /* Store, non-alternate. */
406 && (x
.add
.rd
& 0x18) == 0x18 /* Input register. */
407 && x
.add
.i
/* Immediate mode. */
408 && x
.add
.rs1
== 30 /* Off of frame pointer. */
409 /* Into reserved stack space. */
410 && x
.add
.simm13
>= 0x44
411 && x
.add
.simm13
< 0x5b)
414 x
.i
= read_memory_integer (pc
, 4);
419 /* Check instruction at ADDR to see if it is an annulled branch.
420 All other instructions will go to NPC or will trap.
421 Set *TARGET if we find a canidate branch; set to zero if not. */
424 isannulled (instruction
, addr
, target
)
426 CORE_ADDR addr
, *target
;
428 branch_type val
= not_branch
;
429 long int offset
; /* Must be signed for sign-extend. */
432 unsigned long int code
;
439 unsigned int disp22
:22;
444 insn
.code
= instruction
;
447 && (insn
.b
.op2
== 2 || insn
.b
.op2
== 6 || insn
.b
.op2
== 7))
449 if (insn
.b
.cond
== 8)
450 val
= insn
.b
.a
? baa
: ba
;
452 val
= insn
.b
.a
? bicca
: bicc
;
453 offset
= 4 * ((int) (insn
.b
.disp22
<< 10) >> 10);
454 *target
= addr
+ offset
;
460 /* sparc_frame_find_saved_regs ()
462 Stores, into a struct frame_saved_regs,
463 the addresses of the saved registers of frame described by FRAME_INFO.
464 This includes special registers such as pc and fp saved in special
465 ways in the stack frame. sp is even more special:
466 the address we return for it IS the sp for the next frame.
468 Note that on register window machines, we are currently making the
469 assumption that window registers are being saved somewhere in the
470 frame in which they are being used. If they are stored in an
471 inferior frame, find_saved_register will break.
473 On the Sun 4, the only time all registers are saved is when
474 a dummy frame is involved. Otherwise, the only saved registers
475 are the LOCAL and IN registers which are saved as a result
476 of the "save/restore" opcodes. This condition is determined
477 by address rather than by value.
479 The "pc" is not stored in a frame on the SPARC. (What is stored
480 is a return address minus 8.) sparc_pop_frame knows how to
481 deal with that. Other routines might or might not.
483 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
484 about how this works. */
487 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
488 struct frame_info
*fi
;
489 struct frame_saved_regs
*saved_regs_addr
;
492 FRAME_ADDR frame
= read_register (FP_REGNUM
);
493 FRAME fid
= FRAME_INFO_ID (fi
);
496 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
498 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
501 if (fi->pc >= frame - CALL_DUMMY_LENGTH - 0x140
502 && fi->pc <= frame) */
504 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
505 read_register (SP_REGNUM
))
506 && fi
->pc
<= FRAME_FP(fi
))
508 /* Dummy frame. All but the window regs are in there somewhere. */
509 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
510 saved_regs_addr
->regs
[regnum
] =
511 frame
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
512 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
513 saved_regs_addr
->regs
[regnum
] =
514 frame
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
515 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
516 saved_regs_addr
->regs
[regnum
] =
517 frame
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
518 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
519 saved_regs_addr
->regs
[regnum
] =
520 frame
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
522 fi
->bottom
: read_register (SP_REGNUM
);
526 /* Normal frame. Just Local and In registers */
528 fi
->bottom
: read_register (SP_REGNUM
);
529 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+16; regnum
++)
530 saved_regs_addr
->regs
[regnum
] = frame
+ (regnum
-L0_REGNUM
) * 4;
534 /* Pull off either the next frame pointer or the stack pointer */
535 FRAME_ADDR next_next_frame
=
538 read_register (SP_REGNUM
));
539 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
540 saved_regs_addr
->regs
[regnum
] = next_next_frame
+ regnum
* 4;
542 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
543 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
546 /* Push an empty stack frame, and record in it the current PC, regs, etc.
548 Note that the write's are of registers in the context of the newly
549 pushed frame. Thus the the fp*'s, the g*'s, the i*'s, and
550 the randoms, of the new frame, are being saved. The locals and outs
551 are new; they don't need to be saved. The i's and l's of
552 the last frame were saved by the do_save_insn in the register
553 file (now on the stack, since a context switch happended imm after).
555 The return pointer register %i7 does not have
556 the pc saved into it (return from this frame will be accomplished
557 by a POP_FRAME). In fact, we must leave it unclobbered, since we
558 must preserve it in the calling routine except across call instructions. */
560 /* Definitely see tm-sparc.h for more doc of the frame format here. */
563 sparc_push_dummy_frame ()
566 char register_temp
[REGISTER_BYTES
];
568 do_save_insn (0x140); /* FIXME where does this value come from? */
569 fp
= read_register (FP_REGNUM
);
571 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
), register_temp
, 32 * 4);
572 write_memory (fp
- 0x80, register_temp
, 32 * 4);
574 read_register_bytes (REGISTER_BYTE (G0_REGNUM
), register_temp
, 8 * 4);
575 write_memory (fp
- 0xa0, register_temp
, 8 * 4);
577 read_register_bytes (REGISTER_BYTE (I0_REGNUM
), register_temp
, 8 * 4);
578 write_memory (fp
- 0xc0, register_temp
, 8 * 4);
580 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
581 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), register_temp
, 8 * 4);
582 write_memory (fp
- 0xe0, register_temp
, 8 * 4);
585 /* Discard from the stack the innermost frame, restoring all saved registers.
587 Note that the values stored in fsr by get_frame_saved_regs are *in
588 the context of the called frame*. What this means is that the i
589 regs of fsr must be restored into the o regs of the (calling) frame that
590 we pop into. We don't care about the output regs of the calling frame,
591 since unless it's a dummy frame, it won't have any output regs in it.
593 We never have to bother with %l (local) regs, since the called routine's
594 locals get tossed, and the calling routine's locals are already saved
597 /* Definitely see tm-sparc.h for more doc of the frame format here. */
602 register FRAME frame
= get_current_frame ();
603 register CORE_ADDR pc
;
604 struct frame_saved_regs fsr
;
605 struct frame_info
*fi
;
606 char raw_buffer
[REGISTER_BYTES
];
608 fi
= get_frame_info (frame
);
609 get_frame_saved_regs (fi
, &fsr
);
611 if (fsr
.regs
[FP0_REGNUM
])
613 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, 32 * 4);
614 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
), raw_buffer
, 32 * 4);
616 if (fsr
.regs
[G1_REGNUM
])
618 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * 4);
619 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
, 7 * 4);
621 if (fsr
.regs
[I0_REGNUM
])
623 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * 4);
624 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
, 8 * 4);
626 if (fsr
.regs
[PS_REGNUM
])
627 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
628 if (fsr
.regs
[Y_REGNUM
])
629 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], 4));
630 if (fsr
.regs
[PC_REGNUM
])
632 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
633 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
], 4));
634 if (fsr
.regs
[NPC_REGNUM
])
635 write_register (NPC_REGNUM
,
636 read_memory_integer (fsr
.regs
[NPC_REGNUM
], 4));
638 else if (fsr
.regs
[I7_REGNUM
])
640 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
641 pc
= PC_ADJUST (read_memory_integer (fsr
.regs
[I7_REGNUM
], 4));
642 write_register (PC_REGNUM
, pc
);
643 write_register (NPC_REGNUM
, pc
+ 4);
645 flush_cached_frames ();
646 set_current_frame ( create_new_frame (read_register (FP_REGNUM
),
650 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
651 encodes the structure size being returned. If we detect such
652 a fake insn, step past it. */
661 err
= target_read_memory (pc
+ 8, (char *)&insn
, sizeof(long));
662 SWAP_TARGET_AND_HOST (&insn
, sizeof(long));
663 if ((err
== 0) && (insn
& 0xfffffe00) == 0)
670 /* Structure of SPARC extended floating point numbers.
671 This information is not currently used by GDB, since no current SPARC
672 implementations support extended float. */
674 const struct ext_format ext_format_sparc
= {
675 /* tot sbyte smask expbyte manbyte */
676 16, 0, 0x80, 0,1, 4,8, /* sparc */
679 #ifdef USE_PROC_FS /* Target dependent support for /proc */
681 /* The /proc interface divides the target machine's register set up into
682 two different sets, the general register set (gregset) and the floating
683 point register set (fpregset). For each set, there is an ioctl to get
684 the current register set and another ioctl to set the current values.
686 The actual structure passed through the ioctl interface is, of course,
687 naturally machine dependent, and is different for each set of registers.
688 For the sparc for example, the general register set is typically defined
691 typedef int gregset_t[38];
697 and the floating point set by:
699 typedef struct prfpregset {
707 u_char pr_q_entrysize;
712 These routines provide the packing and unpacking of gregset_t and
713 fpregset_t formatted data.
718 /* Given a pointer to a general register set in /proc format (gregset_t *),
719 unpack the register contents and supply them as gdb's idea of the current
723 supply_gregset (gregsetp
)
724 prgregset_t
*gregsetp
;
727 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
729 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
730 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
732 supply_register (regi
, (char *) (regp
+ regi
));
735 /* These require a bit more care. */
736 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
737 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
738 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
739 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
743 fill_gregset (gregsetp
, regno
)
744 prgregset_t
*gregsetp
;
748 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
749 extern char registers
[];
751 for (regi
= 0 ; regi
<= R_I7
; regi
++)
753 if ((regno
== -1) || (regno
== regi
))
755 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
758 if ((regno
== -1) || (regno
== PS_REGNUM
))
760 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
762 if ((regno
== -1) || (regno
== PC_REGNUM
))
764 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
766 if ((regno
== -1) || (regno
== NPC_REGNUM
))
768 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
770 if ((regno
== -1) || (regno
== Y_REGNUM
))
772 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
776 #if defined (FP0_REGNUM)
778 /* Given a pointer to a floating point register set in /proc format
779 (fpregset_t *), unpack the register contents and supply them as gdb's
780 idea of the current floating point register values. */
783 supply_fpregset (fpregsetp
)
784 prfpregset_t
*fpregsetp
;
789 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
791 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
792 supply_register (regi
, from
);
794 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
797 /* Given a pointer to a floating point register set in /proc format
798 (fpregset_t *), update the register specified by REGNO from gdb's idea
799 of the current floating point register set. If REGNO is -1, update
803 fill_fpregset (fpregsetp
, regno
)
804 prfpregset_t
*fpregsetp
;
810 extern char registers
[];
812 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
814 if ((regno
== -1) || (regno
== regi
))
816 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
817 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
818 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
821 if ((regno
== -1) || (regno
== FPS_REGNUM
))
823 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
827 #endif /* defined (FP0_REGNUM) */
829 #endif /* USE_PROC_FS */
832 #ifdef GET_LONGJMP_TARGET
834 /* Figure out where the longjmp will land. We expect that we have just entered
835 longjmp and haven't yet setup the stack frame, so the args are still in the
836 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
837 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
838 This routine returns true on success */
841 get_longjmp_target(pc
)
846 jb_addr
= read_register(O0_REGNUM
);
848 if (target_read_memory(jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, (char *) pc
,
852 SWAP_TARGET_AND_HOST(pc
, sizeof(CORE_ADDR
));
856 #endif /* GET_LONGJMP_TARGET */
858 /* So far used only for sparc solaris. In sparc solaris, we recognize
859 a trampoline by it's section name. That is, if the pc is in a
860 section named ".plt" then we are in a trampline. */
863 in_solib_trampoline(pc
, name
)
867 struct obj_section
*s
;
870 s
= find_pc_section(pc
);
873 && s
->sec_ptr
->name
!= NULL
874 && STREQ (s
->sec_ptr
->name
, ".plt"));