1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
4 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation,
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
27 #include "arch-utils.h"
34 #include "gdb_string.h"
40 #include <sys/procfs.h>
41 /* Prototypes for supply_gregset etc. */
47 #include "symfile.h" /* for 'entry_point_address' */
49 #include "sparc-tdep.h"
51 /* Now make GDB_TARGET_IS_SPARC64 a runtime test. */
52 /* FIXME MVS: or try testing bfd_arch_info.arch and bfd_arch_info.mach ...
53 * define GDB_TARGET_IS_SPARC64 \
54 * (TARGET_ARCHITECTURE->arch == bfd_arch_sparc && \
55 * (TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9 || \
56 * TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9a))
60 extern int stop_after_trap
;
62 /* We don't store all registers immediately when requested, since they
63 get sent over in large chunks anyway. Instead, we accumulate most
64 of the changes and send them over once. "deferred_stores" keeps
65 track of which sets of registers we have locally-changed copies of,
66 so we only need send the groups that have changed. */
68 int deferred_stores
= 0; /* Accumulated stores we want to do eventually. */
71 /* Some machines, such as Fujitsu SPARClite 86x, have a bi-endian mode
72 where instructions are big-endian and data are little-endian.
73 This flag is set when we detect that the target is of this type. */
78 /* Fetch a single instruction. Even on bi-endian machines
79 such as sparc86x, instructions are always big-endian. */
82 fetch_instruction (CORE_ADDR pc
)
88 read_memory (pc
, buf
, sizeof (buf
));
90 /* Start at the most significant end of the integer, and work towards
91 the least significant. */
93 for (i
= 0; i
< sizeof (buf
); ++i
)
94 retval
= (retval
<< 8) | buf
[i
];
99 /* Branches with prediction are treated like their non-predicting cousins. */
100 /* FIXME: What about floating point branches? */
102 /* Macros to extract fields from sparc instructions. */
103 #define X_OP(i) (((i) >> 30) & 0x3)
104 #define X_RD(i) (((i) >> 25) & 0x1f)
105 #define X_A(i) (((i) >> 29) & 1)
106 #define X_COND(i) (((i) >> 25) & 0xf)
107 #define X_OP2(i) (((i) >> 22) & 0x7)
108 #define X_IMM22(i) ((i) & 0x3fffff)
109 #define X_OP3(i) (((i) >> 19) & 0x3f)
110 #define X_RS1(i) (((i) >> 14) & 0x1f)
111 #define X_I(i) (((i) >> 13) & 1)
112 #define X_IMM13(i) ((i) & 0x1fff)
113 /* Sign extension macros. */
114 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
115 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
116 #define X_CC(i) (((i) >> 20) & 3)
117 #define X_P(i) (((i) >> 19) & 1)
118 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
119 #define X_RCOND(i) (((i) >> 25) & 7)
120 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
121 #define X_FCN(i) (((i) >> 25) & 31)
125 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
, done_retry
128 /* Simulate single-step ptrace call for sun4. Code written by Gary
129 Beihl (beihl@mcc.com). */
131 /* npc4 and next_pc describe the situation at the time that the
132 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
133 static CORE_ADDR next_pc
, npc4
, target
;
134 static int brknpc4
, brktrg
;
135 typedef char binsn_quantum
[BREAKPOINT_MAX
];
136 static binsn_quantum break_mem
[3];
138 static branch_type
isbranch (long, CORE_ADDR
, CORE_ADDR
*);
140 /* single_step() is called just before we want to resume the inferior,
141 if we want to single-step it but there is no hardware or kernel single-step
142 support (as on all SPARCs). We find all the possible targets of the
143 coming instruction and breakpoint them.
145 single_step is also called just after the inferior stops. If we had
146 set up a simulated single-step, we undo our damage. */
149 sparc_software_single_step (enum target_signal ignore
, /* pid, but we don't need it */
150 int insert_breakpoints_p
)
156 if (insert_breakpoints_p
)
158 /* Always set breakpoint for NPC. */
159 next_pc
= read_register (NPC_REGNUM
);
160 npc4
= next_pc
+ 4; /* branch not taken */
162 target_insert_breakpoint (next_pc
, break_mem
[0]);
163 /* printf_unfiltered ("set break at %x\n",next_pc); */
165 pc
= read_register (PC_REGNUM
);
166 pc_instruction
= fetch_instruction (pc
);
167 br
= isbranch (pc_instruction
, pc
, &target
);
168 brknpc4
= brktrg
= 0;
172 /* Conditional annulled branch will either end up at
173 npc (if taken) or at npc+4 (if not taken).
176 target_insert_breakpoint (npc4
, break_mem
[1]);
178 else if (br
== baa
&& target
!= next_pc
)
180 /* Unconditional annulled branch will always end up at
183 target_insert_breakpoint (target
, break_mem
[2]);
185 else if (GDB_TARGET_IS_SPARC64
&& br
== done_retry
)
188 target_insert_breakpoint (target
, break_mem
[2]);
193 /* Remove breakpoints */
194 target_remove_breakpoint (next_pc
, break_mem
[0]);
197 target_remove_breakpoint (npc4
, break_mem
[1]);
200 target_remove_breakpoint (target
, break_mem
[2]);
204 struct frame_extra_info
209 /* Following fields only relevant for flat frames. */
212 /* Add this to ->frame to get the value of the stack pointer at the
213 time of the register saves. */
217 /* Call this for each newly created frame. For SPARC, we need to
218 calculate the bottom of the frame, and do some extra work if the
219 prologue has been generated via the -mflat option to GCC. In
220 particular, we need to know where the previous fp and the pc have
221 been stashed, since their exact position within the frame may vary. */
224 sparc_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
227 CORE_ADDR prologue_start
, prologue_end
;
230 fi
->extra_info
= (struct frame_extra_info
*)
231 frame_obstack_alloc (sizeof (struct frame_extra_info
));
232 frame_saved_regs_zalloc (fi
);
234 fi
->extra_info
->bottom
=
236 (fi
->frame
== fi
->next
->frame
? fi
->next
->extra_info
->bottom
:
237 fi
->next
->frame
) : read_sp ());
239 /* If fi->next is NULL, then we already set ->frame by passing read_fp()
240 to create_new_frame. */
245 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
247 /* Compute ->frame as if not flat. If it is flat, we'll change
249 if (fi
->next
->next
!= NULL
250 && (fi
->next
->next
->signal_handler_caller
251 || frame_in_dummy (fi
->next
->next
))
252 && frameless_look_for_prologue (fi
->next
))
254 /* A frameless function interrupted by a signal did not change
255 the frame pointer, fix up frame pointer accordingly. */
256 fi
->frame
= FRAME_FP (fi
->next
);
257 fi
->extra_info
->bottom
= fi
->next
->extra_info
->bottom
;
261 /* Should we adjust for stack bias here? */
262 get_saved_register (buf
, 0, 0, fi
, FP_REGNUM
, 0);
263 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
265 if (GDB_TARGET_IS_SPARC64
&& (fi
->frame
& 1))
270 /* Decide whether this is a function with a ``flat register window''
271 frame. For such functions, the frame pointer is actually in %i7. */
272 fi
->extra_info
->flat
= 0;
273 fi
->extra_info
->in_prologue
= 0;
274 if (find_pc_partial_function (fi
->pc
, &name
, &prologue_start
, &prologue_end
))
276 /* See if the function starts with an add (which will be of a
277 negative number if a flat frame) to the sp. FIXME: Does not
278 handle large frames which will need more than one instruction
280 insn
= fetch_instruction (prologue_start
);
281 if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0
282 && X_I (insn
) && X_SIMM13 (insn
) < 0)
284 int offset
= X_SIMM13 (insn
);
286 /* Then look for a save of %i7 into the frame. */
287 insn
= fetch_instruction (prologue_start
+ 4);
291 && X_RS1 (insn
) == 14)
295 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
297 /* We definitely have a flat frame now. */
298 fi
->extra_info
->flat
= 1;
300 fi
->extra_info
->sp_offset
= offset
;
302 /* Overwrite the frame's address with the value in %i7. */
303 get_saved_register (buf
, 0, 0, fi
, I7_REGNUM
, 0);
304 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
306 if (GDB_TARGET_IS_SPARC64
&& (fi
->frame
& 1))
309 /* Record where the fp got saved. */
310 fi
->extra_info
->fp_addr
=
311 fi
->frame
+ fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
313 /* Also try to collect where the pc got saved to. */
314 fi
->extra_info
->pc_addr
= 0;
315 insn
= fetch_instruction (prologue_start
+ 12);
319 && X_RS1 (insn
) == 14)
320 fi
->extra_info
->pc_addr
=
321 fi
->frame
+ fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
326 /* Check if the PC is in the function prologue before a SAVE
327 instruction has been executed yet. If so, set the frame
328 to the current value of the stack pointer and set
329 the in_prologue flag. */
331 struct symtab_and_line sal
;
333 sal
= find_pc_line (prologue_start
, 0);
334 if (sal
.line
== 0) /* no line info, use PC */
335 prologue_end
= fi
->pc
;
336 else if (sal
.end
< prologue_end
)
337 prologue_end
= sal
.end
;
338 if (fi
->pc
< prologue_end
)
340 for (addr
= prologue_start
; addr
< fi
->pc
; addr
+= 4)
342 insn
= read_memory_integer (addr
, 4);
343 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
344 break; /* SAVE seen, stop searching */
348 fi
->extra_info
->in_prologue
= 1;
349 fi
->frame
= read_register (SP_REGNUM
);
354 if (fi
->next
&& fi
->frame
== 0)
356 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
357 fi
->frame
= fi
->next
->frame
;
358 fi
->pc
= fi
->next
->pc
;
363 sparc_frame_chain (struct frame_info
*frame
)
365 /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain
366 value. If it really is zero, we detect it later in
367 sparc_init_prev_frame. */
368 return (CORE_ADDR
) 1;
372 sparc_extract_struct_value_address (char *regbuf
)
374 return extract_address (regbuf
+ REGISTER_BYTE (O0_REGNUM
),
375 REGISTER_RAW_SIZE (O0_REGNUM
));
378 /* Find the pc saved in frame FRAME. */
381 sparc_frame_saved_pc (struct frame_info
*frame
)
386 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
387 if (frame
->signal_handler_caller
)
389 /* This is the signal trampoline frame.
390 Get the saved PC from the sigcontext structure. */
392 #ifndef SIGCONTEXT_PC_OFFSET
393 #define SIGCONTEXT_PC_OFFSET 12
396 CORE_ADDR sigcontext_addr
;
398 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
401 scbuf
= alloca (TARGET_PTR_BIT
/ HOST_CHAR_BIT
);
403 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
404 as the third parameter. The offset to the saved pc is 12. */
405 find_pc_partial_function (frame
->pc
, &name
,
406 (CORE_ADDR
*) NULL
, (CORE_ADDR
*) NULL
);
407 if (name
&& STREQ (name
, "ucbsigvechandler"))
408 saved_pc_offset
= 12;
410 /* The sigcontext address is contained in register O2. */
411 get_saved_register (buf
, (int *) NULL
, (CORE_ADDR
*) NULL
,
412 frame
, O0_REGNUM
+ 2, (enum lval_type
*) NULL
);
413 sigcontext_addr
= extract_address (buf
, REGISTER_RAW_SIZE (O0_REGNUM
+ 2));
415 /* Don't cause a memory_error when accessing sigcontext in case the
416 stack layout has changed or the stack is corrupt. */
417 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
418 scbuf
, sizeof (scbuf
));
419 return extract_address (scbuf
, sizeof (scbuf
));
421 else if (frame
->extra_info
->in_prologue
||
422 (frame
->next
!= NULL
&&
423 (frame
->next
->signal_handler_caller
||
424 frame_in_dummy (frame
->next
)) &&
425 frameless_look_for_prologue (frame
)))
427 /* A frameless function interrupted by a signal did not save
428 the PC, it is still in %o7. */
429 get_saved_register (buf
, (int *) NULL
, (CORE_ADDR
*) NULL
,
430 frame
, O7_REGNUM
, (enum lval_type
*) NULL
);
431 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
433 if (frame
->extra_info
->flat
)
434 addr
= frame
->extra_info
->pc_addr
;
436 addr
= frame
->extra_info
->bottom
+ FRAME_SAVED_I0
+
437 SPARC_INTREG_SIZE
* (I7_REGNUM
- I0_REGNUM
);
440 /* A flat frame leaf function might not save the PC anywhere,
441 just leave it in %o7. */
442 return PC_ADJUST (read_register (O7_REGNUM
));
444 read_memory (addr
, buf
, SPARC_INTREG_SIZE
);
445 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
448 /* Since an individual frame in the frame cache is defined by two
449 arguments (a frame pointer and a stack pointer), we need two
450 arguments to get info for an arbitrary stack frame. This routine
451 takes two arguments and makes the cached frames look as if these
452 two arguments defined a frame on the cache. This allows the rest
453 of info frame to extract the important arguments without
457 setup_arbitrary_frame (int argc
, CORE_ADDR
*argv
)
459 struct frame_info
*frame
;
462 error ("Sparc frame specifications require two arguments: fp and sp");
464 frame
= create_new_frame (argv
[0], 0);
467 internal_error (__FILE__
, __LINE__
,
468 "create_new_frame returned invalid frame");
470 frame
->extra_info
->bottom
= argv
[1];
471 frame
->pc
= FRAME_SAVED_PC (frame
);
475 /* Given a pc value, skip it forward past the function prologue by
476 disassembling instructions that appear to be a prologue.
478 If FRAMELESS_P is set, we are only testing to see if the function
479 is frameless. This allows a quicker answer.
481 This routine should be more specific in its actions; making sure
482 that it uses the same register in the initial prologue section. */
484 static CORE_ADDR
examine_prologue (CORE_ADDR
, int, struct frame_info
*,
488 examine_prologue (CORE_ADDR start_pc
, int frameless_p
, struct frame_info
*fi
,
489 CORE_ADDR
*saved_regs
)
493 CORE_ADDR pc
= start_pc
;
496 insn
= fetch_instruction (pc
);
498 /* Recognize the `sethi' insn and record its destination. */
499 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 4)
503 insn
= fetch_instruction (pc
);
506 /* Recognize an add immediate value to register to either %g1 or
507 the destination register recorded above. Actually, this might
508 well recognize several different arithmetic operations.
509 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
510 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
511 I imagine any compiler really does that, however). */
514 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
517 insn
= fetch_instruction (pc
);
520 /* Recognize any SAVE insn. */
521 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 60)
524 if (frameless_p
) /* If the save is all we care about, */
525 return pc
; /* return before doing more work */
526 insn
= fetch_instruction (pc
);
528 /* Recognize add to %sp. */
529 else if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0)
532 if (frameless_p
) /* If the add is all we care about, */
533 return pc
; /* return before doing more work */
535 insn
= fetch_instruction (pc
);
536 /* Recognize store of frame pointer (i7). */
540 && X_RS1 (insn
) == 14)
543 insn
= fetch_instruction (pc
);
545 /* Recognize sub %sp, <anything>, %i7. */
548 && X_RS1 (insn
) == 14
549 && X_RD (insn
) == 31)
552 insn
= fetch_instruction (pc
);
561 /* Without a save or add instruction, it's not a prologue. */
566 /* Recognize stores into the frame from the input registers.
567 This recognizes all non alternate stores of an input register,
568 into a location offset from the frame pointer between
571 /* The above will fail for arguments that are promoted
572 (eg. shorts to ints or floats to doubles), because the compiler
573 will pass them in positive-offset frame space, but the prologue
574 will save them (after conversion) in negative frame space at an
575 unpredictable offset. Therefore I am going to remove the
576 restriction on the target-address of the save, on the theory
577 that any unbroken sequence of saves from input registers must
578 be part of the prologue. In un-optimized code (at least), I'm
579 fairly sure that the compiler would emit SOME other instruction
580 (eg. a move or add) before emitting another save that is actually
581 a part of the function body.
583 Besides, the reserved stack space is different for SPARC64 anyway.
588 && (X_OP3 (insn
) & 0x3c) == 4 /* Store, non-alternate. */
589 && (X_RD (insn
) & 0x18) == 0x18 /* Input register. */
590 && X_I (insn
) /* Immediate mode. */
591 && X_RS1 (insn
) == 30) /* Off of frame pointer. */
592 ; /* empty statement -- fall thru to end of loop */
593 else if (GDB_TARGET_IS_SPARC64
595 && (X_OP3 (insn
) & 0x3c) == 12 /* store, extended (64-bit) */
596 && (X_RD (insn
) & 0x18) == 0x18 /* input register */
597 && X_I (insn
) /* immediate mode */
598 && X_RS1 (insn
) == 30) /* off of frame pointer */
599 ; /* empty statement -- fall thru to end of loop */
600 else if (X_OP (insn
) == 3
601 && (X_OP3 (insn
) & 0x3c) == 36 /* store, floating-point */
602 && X_I (insn
) /* immediate mode */
603 && X_RS1 (insn
) == 30) /* off of frame pointer */
604 ; /* empty statement -- fall thru to end of loop */
607 && X_OP3 (insn
) == 4 /* store? */
608 && X_RS1 (insn
) == 14) /* off of frame pointer */
610 if (saved_regs
&& X_I (insn
))
611 saved_regs
[X_RD (insn
)] =
612 fi
->frame
+ fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
617 insn
= fetch_instruction (pc
);
624 sparc_skip_prologue (CORE_ADDR start_pc
, int frameless_p
)
626 return examine_prologue (start_pc
, frameless_p
, NULL
, NULL
);
629 /* Is the prologue at IP frameless? */
632 sparc_prologue_frameless_p (CORE_ADDR ip
)
634 return ip
== sparc_skip_prologue (ip
, 1);
637 /* Check instruction at ADDR to see if it is a branch.
638 All non-annulled instructions will go to NPC or will trap.
639 Set *TARGET if we find a candidate branch; set to zero if not.
641 This isn't static as it's used by remote-sa.sparc.c. */
644 isbranch (long instruction
, CORE_ADDR addr
, CORE_ADDR
*target
)
646 branch_type val
= not_branch
;
647 long int offset
= 0; /* Must be signed for sign-extend. */
651 if (X_OP (instruction
) == 0
652 && (X_OP2 (instruction
) == 2
653 || X_OP2 (instruction
) == 6
654 || X_OP2 (instruction
) == 1
655 || X_OP2 (instruction
) == 3
656 || X_OP2 (instruction
) == 5
657 || (GDB_TARGET_IS_SPARC64
&& X_OP2 (instruction
) == 7)))
659 if (X_COND (instruction
) == 8)
660 val
= X_A (instruction
) ? baa
: ba
;
662 val
= X_A (instruction
) ? bicca
: bicc
;
663 switch (X_OP2 (instruction
))
666 if (!GDB_TARGET_IS_SPARC64
)
671 offset
= 4 * X_DISP22 (instruction
);
675 offset
= 4 * X_DISP19 (instruction
);
678 offset
= 4 * X_DISP16 (instruction
);
681 *target
= addr
+ offset
;
683 else if (GDB_TARGET_IS_SPARC64
684 && X_OP (instruction
) == 2
685 && X_OP3 (instruction
) == 62)
687 if (X_FCN (instruction
) == 0)
690 *target
= read_register (TNPC_REGNUM
);
693 else if (X_FCN (instruction
) == 1)
696 *target
= read_register (TPC_REGNUM
);
704 /* Find register number REGNUM relative to FRAME and put its
705 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
706 was optimized out (and thus can't be fetched). If the variable
707 was fetched from memory, set *ADDRP to where it was fetched from,
708 otherwise it was fetched from a register.
710 The argument RAW_BUFFER must point to aligned memory. */
713 sparc_get_saved_register (char *raw_buffer
, int *optimized
, CORE_ADDR
*addrp
,
714 struct frame_info
*frame
, int regnum
,
715 enum lval_type
*lval
)
717 struct frame_info
*frame1
;
720 if (!target_has_registers
)
721 error ("No registers.");
728 /* FIXME This code extracted from infcmd.c; should put elsewhere! */
731 /* error ("No selected frame."); */
732 if (!target_has_registers
)
733 error ("The program has no registers now.");
734 if (selected_frame
== NULL
)
735 error ("No selected frame.");
736 /* Try to use selected frame */
737 frame
= get_prev_frame (selected_frame
);
739 error ("Cmd not meaningful in the outermost frame.");
743 frame1
= frame
->next
;
745 /* Get saved PC from the frame info if not in innermost frame. */
746 if (regnum
== PC_REGNUM
&& frame1
!= NULL
)
750 if (raw_buffer
!= NULL
)
752 /* Put it back in target format. */
753 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), frame
->pc
);
760 while (frame1
!= NULL
)
762 /* FIXME MVS: wrong test for dummy frame at entry. */
764 if (frame1
->pc
>= (frame1
->extra_info
->bottom
?
765 frame1
->extra_info
->bottom
: read_sp ())
766 && frame1
->pc
<= FRAME_FP (frame1
))
768 /* Dummy frame. All but the window regs are in there somewhere.
769 The window registers are saved on the stack, just like in a
771 if (regnum
>= G1_REGNUM
&& regnum
< G1_REGNUM
+ 7)
772 addr
= frame1
->frame
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
773 - (FP_REGISTER_BYTES
+ 8 * SPARC_INTREG_SIZE
);
774 else if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
775 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
776 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
778 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
779 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
780 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
782 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
783 addr
= frame1
->frame
+ (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
784 - (FP_REGISTER_BYTES
+ 16 * SPARC_INTREG_SIZE
);
785 else if (SPARC_HAS_FPU
&&
786 regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+ 32)
787 addr
= frame1
->frame
+ (regnum
- FP0_REGNUM
) * 4
788 - (FP_REGISTER_BYTES
);
789 else if (GDB_TARGET_IS_SPARC64
&& SPARC_HAS_FPU
&&
790 regnum
>= FP0_REGNUM
+ 32 && regnum
< FP_MAX_REGNUM
)
791 addr
= frame1
->frame
+ 32 * 4 + (regnum
- FP0_REGNUM
- 32) * 8
792 - (FP_REGISTER_BYTES
);
793 else if (regnum
>= Y_REGNUM
&& regnum
< NUM_REGS
)
794 addr
= frame1
->frame
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
795 - (FP_REGISTER_BYTES
+ 24 * SPARC_INTREG_SIZE
);
797 else if (frame1
->extra_info
->flat
)
800 if (regnum
== RP_REGNUM
)
801 addr
= frame1
->extra_info
->pc_addr
;
802 else if (regnum
== I7_REGNUM
)
803 addr
= frame1
->extra_info
->fp_addr
;
806 CORE_ADDR func_start
;
809 regs
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
810 memset (regs
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
812 find_pc_partial_function (frame1
->pc
, NULL
, &func_start
, NULL
);
813 examine_prologue (func_start
, 0, frame1
, regs
);
819 /* Normal frame. Local and In registers are saved on stack. */
820 if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
821 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
822 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
824 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
825 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
826 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
828 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
830 /* Outs become ins. */
831 get_saved_register (raw_buffer
, optimized
, addrp
, frame1
,
832 (regnum
- O0_REGNUM
+ I0_REGNUM
), lval
);
838 frame1
= frame1
->next
;
844 if (regnum
== SP_REGNUM
)
846 if (raw_buffer
!= NULL
)
848 /* Put it back in target format. */
849 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), addr
);
855 if (raw_buffer
!= NULL
)
856 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
861 *lval
= lval_register
;
862 addr
= REGISTER_BYTE (regnum
);
863 if (raw_buffer
!= NULL
)
864 read_register_gen (regnum
, raw_buffer
);
870 /* Push an empty stack frame, and record in it the current PC, regs, etc.
872 We save the non-windowed registers and the ins. The locals and outs
873 are new; they don't need to be saved. The i's and l's of
874 the last frame were already saved on the stack. */
876 /* Definitely see tm-sparc.h for more doc of the frame format here. */
878 /* See tm-sparc.h for how this is calculated. */
880 #define DUMMY_STACK_REG_BUF_SIZE \
881 (((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
882 #define DUMMY_STACK_SIZE \
883 (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
886 sparc_push_dummy_frame (void)
888 CORE_ADDR sp
, old_sp
;
891 register_temp
= alloca (DUMMY_STACK_SIZE
);
893 old_sp
= sp
= read_sp ();
895 if (GDB_TARGET_IS_SPARC64
)
897 /* PC, NPC, CCR, FSR, FPRS, Y, ASI */
898 read_register_bytes (REGISTER_BYTE (PC_REGNUM
), ®ister_temp
[0],
899 REGISTER_RAW_SIZE (PC_REGNUM
) * 7);
900 read_register_bytes (REGISTER_BYTE (PSTATE_REGNUM
),
901 ®ister_temp
[7 * SPARC_INTREG_SIZE
],
902 REGISTER_RAW_SIZE (PSTATE_REGNUM
));
903 /* FIXME: not sure what needs to be saved here. */
907 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
908 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), ®ister_temp
[0],
909 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
912 read_register_bytes (REGISTER_BYTE (O0_REGNUM
),
913 ®ister_temp
[8 * SPARC_INTREG_SIZE
],
914 SPARC_INTREG_SIZE
* 8);
916 read_register_bytes (REGISTER_BYTE (G0_REGNUM
),
917 ®ister_temp
[16 * SPARC_INTREG_SIZE
],
918 SPARC_INTREG_SIZE
* 8);
921 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
922 ®ister_temp
[24 * SPARC_INTREG_SIZE
],
925 sp
-= DUMMY_STACK_SIZE
;
929 write_memory (sp
+ DUMMY_REG_SAVE_OFFSET
, ®ister_temp
[0],
930 DUMMY_STACK_REG_BUF_SIZE
);
932 if (strcmp (target_shortname
, "sim") != 0)
934 /* NOTE: cagney/2002-04-04: The code below originally contained
935 GDB's _only_ call to write_fp(). That call was eliminated by
936 inlining the corresponding code. For the 64 bit case, the
937 old function (sparc64_write_fp) did the below although I'm
938 not clear why. The same goes for why this is only done when
939 the underlying target is a simulator. */
940 if (GDB_TARGET_IS_SPARC64
)
942 /* Target is a 64 bit SPARC. */
943 CORE_ADDR oldfp
= read_register (FP_REGNUM
);
945 write_register (FP_REGNUM
, old_sp
- 2047);
947 write_register (FP_REGNUM
, old_sp
);
951 /* Target is a 32 bit SPARC. */
952 write_register (FP_REGNUM
, old_sp
);
954 /* Set return address register for the call dummy to the current PC. */
955 write_register (I7_REGNUM
, read_pc () - 8);
959 /* The call dummy will write this value to FP before executing
960 the 'save'. This ensures that register window flushes work
961 correctly in the simulator. */
962 write_register (G0_REGNUM
+ 1, read_register (FP_REGNUM
));
964 /* The call dummy will write this value to FP after executing
966 write_register (G0_REGNUM
+ 2, old_sp
);
968 /* The call dummy will write this value to the return address (%i7) after
969 executing the 'save'. */
970 write_register (G0_REGNUM
+ 3, read_pc () - 8);
972 /* Set the FP that the call dummy will be using after the 'save'.
973 This makes backtraces from an inferior function call work properly. */
974 write_register (FP_REGNUM
, old_sp
);
978 /* sparc_frame_find_saved_regs (). This function is here only because
979 pop_frame uses it. Note there is an interesting corner case which
980 I think few ports of GDB get right--if you are popping a frame
981 which does not save some register that *is* saved by a more inner
982 frame (such a frame will never be a dummy frame because dummy
983 frames save all registers). Rewriting pop_frame to use
984 get_saved_register would solve this problem and also get rid of the
985 ugly duplication between sparc_frame_find_saved_regs and
988 Stores, into an array of CORE_ADDR,
989 the addresses of the saved registers of frame described by FRAME_INFO.
990 This includes special registers such as pc and fp saved in special
991 ways in the stack frame. sp is even more special:
992 the address we return for it IS the sp for the next frame.
994 Note that on register window machines, we are currently making the
995 assumption that window registers are being saved somewhere in the
996 frame in which they are being used. If they are stored in an
997 inferior frame, find_saved_register will break.
999 On the Sun 4, the only time all registers are saved is when
1000 a dummy frame is involved. Otherwise, the only saved registers
1001 are the LOCAL and IN registers which are saved as a result
1002 of the "save/restore" opcodes. This condition is determined
1003 by address rather than by value.
1005 The "pc" is not stored in a frame on the SPARC. (What is stored
1006 is a return address minus 8.) sparc_pop_frame knows how to
1007 deal with that. Other routines might or might not.
1009 See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
1010 about how this works. */
1012 static void sparc_frame_find_saved_regs (struct frame_info
*, CORE_ADDR
*);
1015 sparc_frame_find_saved_regs (struct frame_info
*fi
, CORE_ADDR
*saved_regs_addr
)
1017 register int regnum
;
1018 CORE_ADDR frame_addr
= FRAME_FP (fi
);
1021 internal_error (__FILE__
, __LINE__
,
1022 "Bad frame info struct in FRAME_FIND_SAVED_REGS");
1024 memset (saved_regs_addr
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
1026 if (fi
->pc
>= (fi
->extra_info
->bottom
?
1027 fi
->extra_info
->bottom
: read_sp ())
1028 && fi
->pc
<= FRAME_FP (fi
))
1030 /* Dummy frame. All but the window regs are in there somewhere. */
1031 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+ 7; regnum
++)
1032 saved_regs_addr
[regnum
] =
1033 frame_addr
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
1034 - DUMMY_STACK_REG_BUF_SIZE
+ 16 * SPARC_INTREG_SIZE
;
1036 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1037 saved_regs_addr
[regnum
] =
1038 frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1039 - DUMMY_STACK_REG_BUF_SIZE
+ 8 * SPARC_INTREG_SIZE
;
1042 for (regnum
= FP0_REGNUM
; regnum
< FP_MAX_REGNUM
; regnum
++)
1043 saved_regs_addr
[regnum
] = frame_addr
+ (regnum
- FP0_REGNUM
) * 4
1044 - DUMMY_STACK_REG_BUF_SIZE
+ 24 * SPARC_INTREG_SIZE
;
1046 if (GDB_TARGET_IS_SPARC64
)
1048 for (regnum
= PC_REGNUM
; regnum
< PC_REGNUM
+ 7; regnum
++)
1050 saved_regs_addr
[regnum
] =
1051 frame_addr
+ (regnum
- PC_REGNUM
) * SPARC_INTREG_SIZE
1052 - DUMMY_STACK_REG_BUF_SIZE
;
1054 saved_regs_addr
[PSTATE_REGNUM
] =
1055 frame_addr
+ 8 * SPARC_INTREG_SIZE
- DUMMY_STACK_REG_BUF_SIZE
;
1058 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
1059 saved_regs_addr
[regnum
] =
1060 frame_addr
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
1061 - DUMMY_STACK_REG_BUF_SIZE
;
1063 frame_addr
= fi
->extra_info
->bottom
?
1064 fi
->extra_info
->bottom
: read_sp ();
1066 else if (fi
->extra_info
->flat
)
1068 CORE_ADDR func_start
;
1069 find_pc_partial_function (fi
->pc
, NULL
, &func_start
, NULL
);
1070 examine_prologue (func_start
, 0, fi
, saved_regs_addr
);
1072 /* Flat register window frame. */
1073 saved_regs_addr
[RP_REGNUM
] = fi
->extra_info
->pc_addr
;
1074 saved_regs_addr
[I7_REGNUM
] = fi
->extra_info
->fp_addr
;
1078 /* Normal frame. Just Local and In registers */
1079 frame_addr
= fi
->extra_info
->bottom
?
1080 fi
->extra_info
->bottom
: read_sp ();
1081 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; regnum
++)
1082 saved_regs_addr
[regnum
] =
1083 (frame_addr
+ (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
1085 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1086 saved_regs_addr
[regnum
] =
1087 (frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1092 if (fi
->extra_info
->flat
)
1094 saved_regs_addr
[O7_REGNUM
] = fi
->extra_info
->pc_addr
;
1098 /* Pull off either the next frame pointer or the stack pointer */
1099 CORE_ADDR next_next_frame_addr
=
1100 (fi
->next
->extra_info
->bottom
?
1101 fi
->next
->extra_info
->bottom
: read_sp ());
1102 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 8; regnum
++)
1103 saved_regs_addr
[regnum
] =
1104 (next_next_frame_addr
1105 + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
1109 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
1110 /* FIXME -- should this adjust for the sparc64 offset? */
1111 saved_regs_addr
[SP_REGNUM
] = FRAME_FP (fi
);
1114 /* Discard from the stack the innermost frame, restoring all saved registers.
1116 Note that the values stored in fsr by get_frame_saved_regs are *in
1117 the context of the called frame*. What this means is that the i
1118 regs of fsr must be restored into the o regs of the (calling) frame that
1119 we pop into. We don't care about the output regs of the calling frame,
1120 since unless it's a dummy frame, it won't have any output regs in it.
1122 We never have to bother with %l (local) regs, since the called routine's
1123 locals get tossed, and the calling routine's locals are already saved
1126 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1129 sparc_pop_frame (void)
1131 register struct frame_info
*frame
= get_current_frame ();
1132 register CORE_ADDR pc
;
1137 fsr
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
1138 raw_buffer
= alloca (REGISTER_BYTES
);
1139 sparc_frame_find_saved_regs (frame
, &fsr
[0]);
1142 if (fsr
[FP0_REGNUM
])
1144 read_memory (fsr
[FP0_REGNUM
], raw_buffer
, FP_REGISTER_BYTES
);
1145 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1146 raw_buffer
, FP_REGISTER_BYTES
);
1148 if (!(GDB_TARGET_IS_SPARC64
))
1150 if (fsr
[FPS_REGNUM
])
1152 read_memory (fsr
[FPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1153 write_register_gen (FPS_REGNUM
, raw_buffer
);
1155 if (fsr
[CPS_REGNUM
])
1157 read_memory (fsr
[CPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1158 write_register_gen (CPS_REGNUM
, raw_buffer
);
1164 read_memory (fsr
[G1_REGNUM
], raw_buffer
, 7 * SPARC_INTREG_SIZE
);
1165 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
,
1166 7 * SPARC_INTREG_SIZE
);
1169 if (frame
->extra_info
->flat
)
1171 /* Each register might or might not have been saved, need to test
1173 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; ++regnum
)
1175 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1176 SPARC_INTREG_SIZE
));
1177 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; ++regnum
)
1179 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1180 SPARC_INTREG_SIZE
));
1182 /* Handle all outs except stack pointer (o0-o5; o7). */
1183 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 6; ++regnum
)
1185 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1186 SPARC_INTREG_SIZE
));
1187 if (fsr
[O0_REGNUM
+ 7])
1188 write_register (O0_REGNUM
+ 7,
1189 read_memory_integer (fsr
[O0_REGNUM
+ 7],
1190 SPARC_INTREG_SIZE
));
1192 write_sp (frame
->frame
);
1194 else if (fsr
[I0_REGNUM
])
1200 reg_temp
= alloca (REGISTER_BYTES
);
1202 read_memory (fsr
[I0_REGNUM
], raw_buffer
, 8 * SPARC_INTREG_SIZE
);
1204 /* Get the ins and locals which we are about to restore. Just
1205 moving the stack pointer is all that is really needed, except
1206 store_inferior_registers is then going to write the ins and
1207 locals from the registers array, so we need to muck with the
1209 sp
= fsr
[SP_REGNUM
];
1211 if (GDB_TARGET_IS_SPARC64
&& (sp
& 1))
1214 read_memory (sp
, reg_temp
, SPARC_INTREG_SIZE
* 16);
1216 /* Restore the out registers.
1217 Among other things this writes the new stack pointer. */
1218 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
1219 SPARC_INTREG_SIZE
* 8);
1221 write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
1222 SPARC_INTREG_SIZE
* 16);
1225 if (!(GDB_TARGET_IS_SPARC64
))
1227 write_register (PS_REGNUM
,
1228 read_memory_integer (fsr
[PS_REGNUM
],
1229 REGISTER_RAW_SIZE (PS_REGNUM
)));
1232 write_register (Y_REGNUM
,
1233 read_memory_integer (fsr
[Y_REGNUM
],
1234 REGISTER_RAW_SIZE (Y_REGNUM
)));
1237 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
1238 write_register (PC_REGNUM
,
1239 read_memory_integer (fsr
[PC_REGNUM
],
1240 REGISTER_RAW_SIZE (PC_REGNUM
)));
1241 if (fsr
[NPC_REGNUM
])
1242 write_register (NPC_REGNUM
,
1243 read_memory_integer (fsr
[NPC_REGNUM
],
1244 REGISTER_RAW_SIZE (NPC_REGNUM
)));
1246 else if (frame
->extra_info
->flat
)
1248 if (frame
->extra_info
->pc_addr
)
1249 pc
= PC_ADJUST ((CORE_ADDR
)
1250 read_memory_integer (frame
->extra_info
->pc_addr
,
1251 REGISTER_RAW_SIZE (PC_REGNUM
)));
1254 /* I think this happens only in the innermost frame, if so then
1255 it is a complicated way of saying
1256 "pc = read_register (O7_REGNUM);". */
1259 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
1260 get_saved_register (buf
, 0, 0, frame
, O7_REGNUM
, 0);
1261 pc
= PC_ADJUST (extract_address
1262 (buf
, REGISTER_RAW_SIZE (O7_REGNUM
)));
1265 write_register (PC_REGNUM
, pc
);
1266 write_register (NPC_REGNUM
, pc
+ 4);
1268 else if (fsr
[I7_REGNUM
])
1270 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1271 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
[I7_REGNUM
],
1272 SPARC_INTREG_SIZE
));
1273 write_register (PC_REGNUM
, pc
);
1274 write_register (NPC_REGNUM
, pc
+ 4);
1276 flush_cached_frames ();
1279 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1280 encodes the structure size being returned. If we detect such
1281 a fake insn, step past it. */
1284 sparc_pc_adjust (CORE_ADDR pc
)
1290 err
= target_read_memory (pc
+ 8, buf
, 4);
1291 insn
= extract_unsigned_integer (buf
, 4);
1292 if ((err
== 0) && (insn
& 0xffc00000) == 0)
1298 /* If pc is in a shared library trampoline, return its target.
1299 The SunOs 4.x linker rewrites the jump table entries for PIC
1300 compiled modules in the main executable to bypass the dynamic linker
1301 with jumps of the form
1304 and removes the corresponding jump table relocation entry in the
1305 dynamic relocations.
1306 find_solib_trampoline_target relies on the presence of the jump
1307 table relocation entry, so we have to detect these jump instructions
1311 sunos4_skip_trampoline_code (CORE_ADDR pc
)
1313 unsigned long insn1
;
1317 err
= target_read_memory (pc
, buf
, 4);
1318 insn1
= extract_unsigned_integer (buf
, 4);
1319 if (err
== 0 && (insn1
& 0xffc00000) == 0x03000000)
1321 unsigned long insn2
;
1323 err
= target_read_memory (pc
+ 4, buf
, 4);
1324 insn2
= extract_unsigned_integer (buf
, 4);
1325 if (err
== 0 && (insn2
& 0xffffe000) == 0x81c06000)
1327 CORE_ADDR target_pc
= (insn1
& 0x3fffff) << 10;
1328 int delta
= insn2
& 0x1fff;
1330 /* Sign extend the displacement. */
1333 return target_pc
+ delta
;
1336 return find_solib_trampoline_target (pc
);
1339 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1341 /* The /proc interface divides the target machine's register set up into
1342 two different sets, the general register set (gregset) and the floating
1343 point register set (fpregset). For each set, there is an ioctl to get
1344 the current register set and another ioctl to set the current values.
1346 The actual structure passed through the ioctl interface is, of course,
1347 naturally machine dependent, and is different for each set of registers.
1348 For the sparc for example, the general register set is typically defined
1351 typedef int gregset_t[38];
1357 and the floating point set by:
1359 typedef struct prfpregset {
1362 double pr_dregs[16];
1367 u_char pr_q_entrysize;
1372 These routines provide the packing and unpacking of gregset_t and
1373 fpregset_t formatted data.
1378 /* Given a pointer to a general register set in /proc format (gregset_t *),
1379 unpack the register contents and supply them as gdb's idea of the current
1383 supply_gregset (gdb_gregset_t
*gregsetp
)
1385 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1386 int regi
, offset
= 0;
1388 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1389 then the gregset may contain 64-bit ints while supply_register
1390 is expecting 32-bit ints. Compensate. */
1391 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1394 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1395 /* FIXME MVS: assumes the order of the first 32 elements... */
1396 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
1398 supply_register (regi
, ((char *) (regp
+ regi
)) + offset
);
1401 /* These require a bit more care. */
1402 supply_register (PC_REGNUM
, ((char *) (regp
+ R_PC
)) + offset
);
1403 supply_register (NPC_REGNUM
, ((char *) (regp
+ R_nPC
)) + offset
);
1404 supply_register (Y_REGNUM
, ((char *) (regp
+ R_Y
)) + offset
);
1406 if (GDB_TARGET_IS_SPARC64
)
1409 supply_register (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1411 supply_register (CCR_REGNUM
, NULL
);
1414 supply_register (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1416 supply_register (FPRS_REGNUM
, NULL
);
1419 supply_register (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1421 supply_register (ASI_REGNUM
, NULL
);
1427 supply_register (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1429 supply_register (PS_REGNUM
, NULL
);
1432 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1433 Steal R_ASI and R_FPRS, and hope for the best! */
1435 #if !defined (R_WIM) && defined (R_ASI)
1439 #if !defined (R_TBR) && defined (R_FPRS)
1440 #define R_TBR R_FPRS
1444 supply_register (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1446 supply_register (WIM_REGNUM
, NULL
);
1450 supply_register (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1452 supply_register (TBR_REGNUM
, NULL
);
1456 /* Fill inaccessible registers with zero. */
1457 if (GDB_TARGET_IS_SPARC64
)
1460 * don't know how to get value of any of the following:
1462 supply_register (VER_REGNUM
, NULL
);
1463 supply_register (TICK_REGNUM
, NULL
);
1464 supply_register (PIL_REGNUM
, NULL
);
1465 supply_register (PSTATE_REGNUM
, NULL
);
1466 supply_register (TSTATE_REGNUM
, NULL
);
1467 supply_register (TBA_REGNUM
, NULL
);
1468 supply_register (TL_REGNUM
, NULL
);
1469 supply_register (TT_REGNUM
, NULL
);
1470 supply_register (TPC_REGNUM
, NULL
);
1471 supply_register (TNPC_REGNUM
, NULL
);
1472 supply_register (WSTATE_REGNUM
, NULL
);
1473 supply_register (CWP_REGNUM
, NULL
);
1474 supply_register (CANSAVE_REGNUM
, NULL
);
1475 supply_register (CANRESTORE_REGNUM
, NULL
);
1476 supply_register (CLEANWIN_REGNUM
, NULL
);
1477 supply_register (OTHERWIN_REGNUM
, NULL
);
1478 supply_register (ASR16_REGNUM
, NULL
);
1479 supply_register (ASR17_REGNUM
, NULL
);
1480 supply_register (ASR18_REGNUM
, NULL
);
1481 supply_register (ASR19_REGNUM
, NULL
);
1482 supply_register (ASR20_REGNUM
, NULL
);
1483 supply_register (ASR21_REGNUM
, NULL
);
1484 supply_register (ASR22_REGNUM
, NULL
);
1485 supply_register (ASR23_REGNUM
, NULL
);
1486 supply_register (ASR24_REGNUM
, NULL
);
1487 supply_register (ASR25_REGNUM
, NULL
);
1488 supply_register (ASR26_REGNUM
, NULL
);
1489 supply_register (ASR27_REGNUM
, NULL
);
1490 supply_register (ASR28_REGNUM
, NULL
);
1491 supply_register (ASR29_REGNUM
, NULL
);
1492 supply_register (ASR30_REGNUM
, NULL
);
1493 supply_register (ASR31_REGNUM
, NULL
);
1494 supply_register (ICC_REGNUM
, NULL
);
1495 supply_register (XCC_REGNUM
, NULL
);
1499 supply_register (CPS_REGNUM
, NULL
);
1504 fill_gregset (gdb_gregset_t
*gregsetp
, int regno
)
1506 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1507 int regi
, offset
= 0;
1509 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1510 then the gregset may contain 64-bit ints while supply_register
1511 is expecting 32-bit ints. Compensate. */
1512 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1515 for (regi
= 0; regi
<= R_I7
; regi
++)
1516 if ((regno
== -1) || (regno
== regi
))
1517 read_register_gen (regi
, (char *) (regp
+ regi
) + offset
);
1519 if ((regno
== -1) || (regno
== PC_REGNUM
))
1520 read_register_gen (PC_REGNUM
, (char *) (regp
+ R_PC
) + offset
);
1522 if ((regno
== -1) || (regno
== NPC_REGNUM
))
1523 read_register_gen (NPC_REGNUM
, (char *) (regp
+ R_nPC
) + offset
);
1525 if ((regno
== -1) || (regno
== Y_REGNUM
))
1526 read_register_gen (Y_REGNUM
, (char *) (regp
+ R_Y
) + offset
);
1528 if (GDB_TARGET_IS_SPARC64
)
1531 if (regno
== -1 || regno
== CCR_REGNUM
)
1532 read_register_gen (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1535 if (regno
== -1 || regno
== FPRS_REGNUM
)
1536 read_register_gen (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1539 if (regno
== -1 || regno
== ASI_REGNUM
)
1540 read_register_gen (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1546 if (regno
== -1 || regno
== PS_REGNUM
)
1547 read_register_gen (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1550 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1551 Steal R_ASI and R_FPRS, and hope for the best! */
1553 #if !defined (R_WIM) && defined (R_ASI)
1557 #if !defined (R_TBR) && defined (R_FPRS)
1558 #define R_TBR R_FPRS
1562 if (regno
== -1 || regno
== WIM_REGNUM
)
1563 read_register_gen (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1565 if (regno
== -1 || regno
== WIM_REGNUM
)
1566 read_register_gen (WIM_REGNUM
, NULL
);
1570 if (regno
== -1 || regno
== TBR_REGNUM
)
1571 read_register_gen (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1573 if (regno
== -1 || regno
== TBR_REGNUM
)
1574 read_register_gen (TBR_REGNUM
, NULL
);
1579 /* Given a pointer to a floating point register set in /proc format
1580 (fpregset_t *), unpack the register contents and supply them as gdb's
1581 idea of the current floating point register values. */
1584 supply_fpregset (gdb_fpregset_t
*fpregsetp
)
1592 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1594 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1595 supply_register (regi
, from
);
1598 if (GDB_TARGET_IS_SPARC64
)
1601 * don't know how to get value of the following.
1603 supply_register (FSR_REGNUM
, NULL
); /* zero it out for now */
1604 supply_register (FCC0_REGNUM
, NULL
);
1605 supply_register (FCC1_REGNUM
, NULL
); /* don't know how to get value */
1606 supply_register (FCC2_REGNUM
, NULL
); /* don't know how to get value */
1607 supply_register (FCC3_REGNUM
, NULL
); /* don't know how to get value */
1611 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
1615 /* Given a pointer to a floating point register set in /proc format
1616 (fpregset_t *), update the register specified by REGNO from gdb's idea
1617 of the current floating point register set. If REGNO is -1, update
1619 /* This will probably need some changes for sparc64. */
1622 fill_fpregset (gdb_fpregset_t
*fpregsetp
, int regno
)
1631 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1633 if ((regno
== -1) || (regno
== regi
))
1635 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
1636 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1637 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
1641 if (!(GDB_TARGET_IS_SPARC64
)) /* FIXME: does Sparc64 have this register? */
1642 if ((regno
== -1) || (regno
== FPS_REGNUM
))
1644 from
= (char *)®isters
[REGISTER_BYTE (FPS_REGNUM
)];
1645 to
= (char *) &fpregsetp
->pr_fsr
;
1646 memcpy (to
, from
, REGISTER_RAW_SIZE (FPS_REGNUM
));
1650 #endif /* USE_PROC_FS */
1652 /* Because of Multi-arch, GET_LONGJMP_TARGET is always defined. So test
1653 for a definition of JB_PC. */
1656 /* Figure out where the longjmp will land. We expect that we have just entered
1657 longjmp and haven't yet setup the stack frame, so the args are still in the
1658 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1659 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1660 This routine returns true on success */
1663 get_longjmp_target (CORE_ADDR
*pc
)
1666 #define LONGJMP_TARGET_SIZE 4
1667 char buf
[LONGJMP_TARGET_SIZE
];
1669 jb_addr
= read_register (O0_REGNUM
);
1671 if (target_read_memory (jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
1672 LONGJMP_TARGET_SIZE
))
1675 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
1679 #endif /* GET_LONGJMP_TARGET */
1681 #ifdef STATIC_TRANSFORM_NAME
1682 /* SunPRO (3.0 at least), encodes the static variables. This is not
1683 related to C++ mangling, it is done for C too. */
1686 sunpro_static_transform_name (char *name
)
1691 /* For file-local statics there will be a dollar sign, a bunch
1692 of junk (the contents of which match a string given in the
1693 N_OPT), a period and the name. For function-local statics
1694 there will be a bunch of junk (which seems to change the
1695 second character from 'A' to 'B'), a period, the name of the
1696 function, and the name. So just skip everything before the
1698 p
= strrchr (name
, '.');
1704 #endif /* STATIC_TRANSFORM_NAME */
1707 /* Utilities for printing registers.
1708 Page numbers refer to the SPARC Architecture Manual. */
1710 static void dump_ccreg (char *, int);
1713 dump_ccreg (char *reg
, int val
)
1716 printf_unfiltered ("%s:%s,%s,%s,%s", reg
,
1717 val
& 8 ? "N" : "NN",
1718 val
& 4 ? "Z" : "NZ",
1719 val
& 2 ? "O" : "NO",
1720 val
& 1 ? "C" : "NC");
1724 decode_asi (int val
)
1730 return "ASI_NUCLEUS";
1732 return "ASI_NUCLEUS_LITTLE";
1734 return "ASI_AS_IF_USER_PRIMARY";
1736 return "ASI_AS_IF_USER_SECONDARY";
1738 return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1740 return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1742 return "ASI_PRIMARY";
1744 return "ASI_SECONDARY";
1746 return "ASI_PRIMARY_NOFAULT";
1748 return "ASI_SECONDARY_NOFAULT";
1750 return "ASI_PRIMARY_LITTLE";
1752 return "ASI_SECONDARY_LITTLE";
1754 return "ASI_PRIMARY_NOFAULT_LITTLE";
1756 return "ASI_SECONDARY_NOFAULT_LITTLE";
1762 /* PRINT_REGISTER_HOOK routine.
1763 Pretty print various registers. */
1764 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1767 sparc_print_register_hook (int regno
)
1771 /* Handle double/quad versions of lower 32 fp regs. */
1772 if (regno
>= FP0_REGNUM
&& regno
< FP0_REGNUM
+ 32
1773 && (regno
& 1) == 0)
1777 if (frame_register_read (selected_frame
, regno
, value
)
1778 && frame_register_read (selected_frame
, regno
+ 1, value
+ 4))
1780 printf_unfiltered ("\t");
1781 print_floating (value
, builtin_type_double
, gdb_stdout
);
1783 #if 0 /* FIXME: gdb doesn't handle long doubles */
1784 if ((regno
& 3) == 0)
1786 if (frame_register_read (selected_frame
, regno
+ 2, value
+ 8)
1787 && frame_register_read (selected_frame
, regno
+ 3, value
+ 12))
1789 printf_unfiltered ("\t");
1790 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1797 #if 0 /* FIXME: gdb doesn't handle long doubles */
1798 /* Print upper fp regs as long double if appropriate. */
1799 if (regno
>= FP0_REGNUM
+ 32 && regno
< FP_MAX_REGNUM
1800 /* We test for even numbered regs and not a multiple of 4 because
1801 the upper fp regs are recorded as doubles. */
1802 && (regno
& 1) == 0)
1806 if (frame_register_read (selected_frame
, regno
, value
)
1807 && frame_register_read (selected_frame
, regno
+ 1, value
+ 8))
1809 printf_unfiltered ("\t");
1810 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1816 /* FIXME: Some of these are priviledged registers.
1817 Not sure how they should be handled. */
1819 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1821 val
= read_register (regno
);
1824 if (GDB_TARGET_IS_SPARC64
)
1828 printf_unfiltered ("\t");
1829 dump_ccreg ("xcc", val
>> 4);
1830 printf_unfiltered (", ");
1831 dump_ccreg ("icc", val
& 15);
1834 printf ("\tfef:%d, du:%d, dl:%d",
1835 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1839 static char *fcc
[4] =
1840 {"=", "<", ">", "?"};
1841 static char *rd
[4] =
1842 {"N", "0", "+", "-"};
1843 /* Long, but I'd rather leave it as is and use a wide screen. */
1844 printf_filtered ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ",
1845 fcc
[BITS (10, 3)], fcc
[BITS (32, 3)],
1846 fcc
[BITS (34, 3)], fcc
[BITS (36, 3)],
1847 rd
[BITS (30, 3)], BITS (23, 31));
1848 printf_filtered ("ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1849 BITS (22, 1), BITS (17, 7), BITS (14, 7),
1850 BITS (13, 1), BITS (5, 31), BITS (0, 31));
1855 char *asi
= decode_asi (val
);
1857 printf ("\t%s", asi
);
1861 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1862 BITS (48, 0xffff), BITS (32, 0xffff),
1863 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1867 static char *mm
[4] =
1868 {"tso", "pso", "rso", "?"};
1869 printf_filtered ("\tcle:%d, tle:%d, mm:%s, red:%d, ",
1870 BITS (9, 1), BITS (8, 1),
1871 mm
[BITS (6, 3)], BITS (5, 1));
1872 printf_filtered ("pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
1873 BITS (4, 1), BITS (3, 1), BITS (2, 1),
1874 BITS (1, 1), BITS (0, 1));
1878 /* FIXME: print all 4? */
1881 /* FIXME: print all 4? */
1884 /* FIXME: print all 4? */
1887 /* FIXME: print all 4? */
1890 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
1893 printf ("\t%d", BITS (0, 31));
1895 case CANSAVE_REGNUM
:
1896 printf ("\t%-2d before spill", BITS (0, 31));
1898 case CANRESTORE_REGNUM
:
1899 printf ("\t%-2d before fill", BITS (0, 31));
1901 case CLEANWIN_REGNUM
:
1902 printf ("\t%-2d before clean", BITS (0, 31));
1904 case OTHERWIN_REGNUM
:
1905 printf ("\t%d", BITS (0, 31));
1912 printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
1913 BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
1914 BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
1915 BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
1920 static char *fcc
[4] =
1921 {"=", "<", ">", "?"};
1922 static char *rd
[4] =
1923 {"N", "0", "+", "-"};
1924 /* Long, but I'd rather leave it as is and use a wide screen. */
1925 printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
1926 "fcc:%s, aexc:%d, cexc:%d",
1927 rd
[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
1928 BITS (14, 7), BITS (13, 1), fcc
[BITS (10, 3)], BITS (5, 31),
1938 gdb_print_insn_sparc (bfd_vma memaddr
, disassemble_info
*info
)
1940 /* It's necessary to override mach again because print_insn messes it up. */
1941 info
->mach
= TARGET_ARCHITECTURE
->mach
;
1942 return print_insn_sparc (memaddr
, info
);
1945 /* The SPARC passes the arguments on the stack; arguments smaller
1946 than an int are promoted to an int. The first 6 words worth of
1947 args are also passed in registers o0 - o5. */
1950 sparc32_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1951 int struct_return
, CORE_ADDR struct_addr
)
1954 int accumulate_size
= 0;
1961 struct sparc_arg
*sparc_args
=
1962 (struct sparc_arg
*) alloca (nargs
* sizeof (struct sparc_arg
));
1963 struct sparc_arg
*m_arg
;
1965 /* Promote arguments if necessary, and calculate their stack offsets
1967 for (i
= 0, m_arg
= sparc_args
; i
< nargs
; i
++, m_arg
++)
1969 struct value
*arg
= args
[i
];
1970 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
1971 /* Cast argument to long if necessary as the compiler does it too. */
1972 switch (TYPE_CODE (arg_type
))
1975 case TYPE_CODE_BOOL
:
1976 case TYPE_CODE_CHAR
:
1977 case TYPE_CODE_RANGE
:
1978 case TYPE_CODE_ENUM
:
1979 if (TYPE_LENGTH (arg_type
) < TYPE_LENGTH (builtin_type_long
))
1981 arg_type
= builtin_type_long
;
1982 arg
= value_cast (arg_type
, arg
);
1988 m_arg
->len
= TYPE_LENGTH (arg_type
);
1989 m_arg
->offset
= accumulate_size
;
1990 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) & ~3;
1991 m_arg
->contents
= VALUE_CONTENTS (arg
);
1994 /* Make room for the arguments on the stack. */
1995 accumulate_size
+= CALL_DUMMY_STACK_ADJUST
;
1996 sp
= ((sp
- accumulate_size
) & ~7) + CALL_DUMMY_STACK_ADJUST
;
1998 /* `Push' arguments on the stack. */
1999 for (i
= 0, oregnum
= 0, m_arg
= sparc_args
;
2003 write_memory (sp
+ m_arg
->offset
, m_arg
->contents
, m_arg
->len
);
2005 j
< m_arg
->len
&& oregnum
< 6;
2006 j
+= SPARC_INTREG_SIZE
, oregnum
++)
2007 write_register_gen (O0_REGNUM
+ oregnum
, m_arg
->contents
+ j
);
2014 /* Extract from an array REGBUF containing the (raw) register state
2015 a function return value of type TYPE, and copy that, in virtual format,
2019 sparc32_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2021 int typelen
= TYPE_LENGTH (type
);
2022 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2024 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2025 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2028 ®buf
[O0_REGNUM
* regsize
+
2030 || TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
? 0
2031 : regsize
- typelen
)],
2036 /* Write into appropriate registers a function return value
2037 of type TYPE, given in virtual format. On SPARCs with FPUs,
2038 float values are returned in %f0 (and %f1). In all other cases,
2039 values are returned in register %o0. */
2042 sparc_store_return_value (struct type
*type
, char *valbuf
)
2047 buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2049 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2050 /* Floating-point values are returned in the register pair */
2051 /* formed by %f0 and %f1 (doubles are, anyway). */
2054 /* Other values are returned in register %o0. */
2057 /* Add leading zeros to the value. */
2058 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (regno
))
2060 memset (buffer
, 0, REGISTER_RAW_SIZE (regno
));
2061 memcpy (buffer
+ REGISTER_RAW_SIZE (regno
) - TYPE_LENGTH (type
), valbuf
,
2062 TYPE_LENGTH (type
));
2063 write_register_gen (regno
, buffer
);
2066 write_register_bytes (REGISTER_BYTE (regno
), valbuf
, TYPE_LENGTH (type
));
2070 sparclet_store_return_value (struct type
*type
, char *valbuf
)
2072 /* Other values are returned in register %o0. */
2073 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), valbuf
,
2074 TYPE_LENGTH (type
));
2078 /* Insert the function address into a call dummy instruction sequence
2081 For structs and unions, if the function was compiled with Sun cc,
2082 it expects 'unimp' after the call. But gcc doesn't use that
2083 (twisted) convention. So leave a nop there for gcc (FIX_CALL_DUMMY
2084 can assume it is operating on a pristine CALL_DUMMY, not one that
2085 has already been customized for a different function). */
2088 sparc_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
,
2089 struct type
*value_type
, int using_gcc
)
2093 /* Store the relative adddress of the target function into the
2094 'call' instruction. */
2095 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
, 4,
2097 | (((fun
- (pc
+ CALL_DUMMY_CALL_OFFSET
)) >> 2)
2100 /* If the called function returns an aggregate value, fill in the UNIMP
2101 instruction containing the size of the returned aggregate return value,
2102 which follows the call instruction.
2103 For details see the SPARC Architecture Manual Version 8, Appendix D.3.
2105 Adjust the call_dummy_breakpoint_offset for the bp_call_dummy breakpoint
2106 to the proper address in the call dummy, so that `finish' after a stop
2107 in a call dummy works.
2108 Tweeking current_gdbarch is not an optimal solution, but the call to
2109 sparc_fix_call_dummy is immediately followed by a call to run_stack_dummy,
2110 which is the only function where dummy_breakpoint_offset is actually
2111 used, if it is non-zero. */
2112 if (TYPE_CODE (value_type
) == TYPE_CODE_STRUCT
2113 || TYPE_CODE (value_type
) == TYPE_CODE_UNION
)
2115 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
+ 8, 4,
2116 TYPE_LENGTH (value_type
) & 0x1fff);
2117 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x30);
2120 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x2c);
2122 if (!(GDB_TARGET_IS_SPARC64
))
2124 /* If this is not a simulator target, change the first four
2125 instructions of the call dummy to NOPs. Those instructions
2126 include a 'save' instruction and are designed to work around
2127 problems with register window flushing in the simulator. */
2129 if (strcmp (target_shortname
, "sim") != 0)
2131 for (i
= 0; i
< 4; i
++)
2132 store_unsigned_integer (dummy
+ (i
* 4), 4, 0x01000000);
2136 /* If this is a bi-endian target, GDB has written the call dummy
2137 in little-endian order. We must byte-swap it back to big-endian. */
2140 for (i
= 0; i
< CALL_DUMMY_LENGTH
; i
+= 4)
2142 char tmp
= dummy
[i
];
2143 dummy
[i
] = dummy
[i
+ 3];
2146 dummy
[i
+ 1] = dummy
[i
+ 2];
2153 /* Set target byte order based on machine type. */
2156 sparc_target_architecture_hook (const bfd_arch_info_type
*ap
)
2160 if (ap
->mach
== bfd_mach_sparc_sparclite_le
)
2162 target_byte_order
= BFD_ENDIAN_LITTLE
;
2172 * Module "constructor" function.
2175 static struct gdbarch
* sparc_gdbarch_init (struct gdbarch_info info
,
2176 struct gdbarch_list
*arches
);
2178 static void sparc_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
);
2181 _initialize_sparc_tdep (void)
2183 /* Hook us into the gdbarch mechanism. */
2184 gdbarch_register (bfd_arch_sparc
, sparc_gdbarch_init
, sparc_dump_tdep
);
2186 tm_print_insn
= gdb_print_insn_sparc
;
2187 tm_print_insn_info
.mach
= TM_PRINT_INSN_MACH
; /* Selects sparc/sparclite */
2188 target_architecture_hook
= sparc_target_architecture_hook
;
2191 /* Compensate for stack bias. Note that we currently don't handle
2192 mixed 32/64 bit code. */
2195 sparc64_read_sp (void)
2197 CORE_ADDR sp
= read_register (SP_REGNUM
);
2205 sparc64_read_fp (void)
2207 CORE_ADDR fp
= read_register (FP_REGNUM
);
2215 sparc64_write_sp (CORE_ADDR val
)
2217 CORE_ADDR oldsp
= read_register (SP_REGNUM
);
2219 write_register (SP_REGNUM
, val
- 2047);
2221 write_register (SP_REGNUM
, val
);
2224 /* The SPARC 64 ABI passes floating-point arguments in FP0 to FP31,
2225 and all other arguments in O0 to O5. They are also copied onto
2226 the stack in the correct places. Apparently (empirically),
2227 structs of less than 16 bytes are passed member-by-member in
2228 separate registers, but I am unable to figure out the algorithm.
2229 Some members go in floating point regs, but I don't know which.
2231 FIXME: Handle small structs (less than 16 bytes containing floats).
2233 The counting regimen for using both integer and FP registers
2234 for argument passing is rather odd -- a single counter is used
2235 for both; this means that if the arguments alternate between
2236 int and float, we will waste every other register of both types. */
2239 sparc64_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2240 int struct_return
, CORE_ADDR struct_retaddr
)
2242 int i
, j
, register_counter
= 0;
2244 struct type
*sparc_intreg_type
=
2245 TYPE_LENGTH (builtin_type_long
) == SPARC_INTREG_SIZE
?
2246 builtin_type_long
: builtin_type_long_long
;
2248 sp
= (sp
& ~(((unsigned long) SPARC_INTREG_SIZE
) - 1UL));
2250 /* Figure out how much space we'll need. */
2251 for (i
= nargs
- 1; i
>= 0; i
--)
2253 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2254 struct value
*copyarg
= args
[i
];
2257 if (copylen
< SPARC_INTREG_SIZE
)
2259 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2260 copylen
= SPARC_INTREG_SIZE
;
2269 /* if STRUCT_RETURN, then first argument is the struct return location. */
2271 write_register (O0_REGNUM
+ register_counter
++, struct_retaddr
);
2273 /* Now write the arguments onto the stack, while writing FP
2274 arguments into the FP registers, and other arguments into the
2275 first six 'O' registers. */
2277 for (i
= 0; i
< nargs
; i
++)
2279 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2280 struct value
*copyarg
= args
[i
];
2281 enum type_code typecode
= TYPE_CODE (VALUE_TYPE (args
[i
]));
2284 if (typecode
== TYPE_CODE_INT
||
2285 typecode
== TYPE_CODE_BOOL
||
2286 typecode
== TYPE_CODE_CHAR
||
2287 typecode
== TYPE_CODE_RANGE
||
2288 typecode
== TYPE_CODE_ENUM
)
2289 if (len
< SPARC_INTREG_SIZE
)
2291 /* Small ints will all take up the size of one intreg on
2293 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2294 copylen
= SPARC_INTREG_SIZE
;
2297 write_memory (tempsp
, VALUE_CONTENTS (copyarg
), copylen
);
2300 /* Corner case: Structs consisting of a single float member are floats.
2301 * FIXME! I don't know about structs containing multiple floats!
2302 * Structs containing mixed floats and ints are even more weird.
2307 /* Separate float args from all other args. */
2308 if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2310 if (register_counter
< 16)
2312 /* This arg gets copied into a FP register. */
2316 case 4: /* Single-precision (float) */
2317 fpreg
= FP0_REGNUM
+ 2 * register_counter
+ 1;
2318 register_counter
+= 1;
2320 case 8: /* Double-precision (double) */
2321 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2322 register_counter
+= 1;
2324 case 16: /* Quad-precision (long double) */
2325 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2326 register_counter
+= 2;
2329 internal_error (__FILE__
, __LINE__
, "bad switch");
2331 write_register_bytes (REGISTER_BYTE (fpreg
),
2332 VALUE_CONTENTS (args
[i
]),
2336 else /* all other args go into the first six 'o' registers */
2339 j
< len
&& register_counter
< 6;
2340 j
+= SPARC_INTREG_SIZE
)
2342 int oreg
= O0_REGNUM
+ register_counter
;
2344 write_register_gen (oreg
, VALUE_CONTENTS (copyarg
) + j
);
2345 register_counter
+= 1;
2352 /* Values <= 32 bytes are returned in o0-o3 (floating-point values are
2353 returned in f0-f3). */
2356 sp64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
,
2359 int typelen
= TYPE_LENGTH (type
);
2360 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2362 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2364 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2368 if (TYPE_CODE (type
) != TYPE_CODE_STRUCT
2369 || (TYPE_LENGTH (type
) > 32))
2372 ®buf
[O0_REGNUM
* regsize
+
2373 (typelen
>= regsize
? 0 : regsize
- typelen
)],
2379 char *o0
= ®buf
[O0_REGNUM
* regsize
];
2380 char *f0
= ®buf
[FP0_REGNUM
* regsize
];
2383 for (x
= 0; x
< TYPE_NFIELDS (type
); x
++)
2385 struct field
*f
= &TYPE_FIELDS (type
)[x
];
2386 /* FIXME: We may need to handle static fields here. */
2387 int whichreg
= (f
->loc
.bitpos
+ bitoffset
) / 32;
2388 int remainder
= ((f
->loc
.bitpos
+ bitoffset
) % 32) / 8;
2389 int where
= (f
->loc
.bitpos
+ bitoffset
) / 8;
2390 int size
= TYPE_LENGTH (f
->type
);
2391 int typecode
= TYPE_CODE (f
->type
);
2393 if (typecode
== TYPE_CODE_STRUCT
)
2395 sp64_extract_return_value (f
->type
,
2398 bitoffset
+ f
->loc
.bitpos
);
2400 else if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2402 memcpy (valbuf
+ where
, &f0
[whichreg
* 4] + remainder
, size
);
2406 memcpy (valbuf
+ where
, &o0
[whichreg
* 4] + remainder
, size
);
2413 sparc64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2415 sp64_extract_return_value (type
, regbuf
, valbuf
, 0);
2419 sparclet_extract_return_value (struct type
*type
,
2423 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) * 8;
2424 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (O0_REGNUM
))
2425 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) - TYPE_LENGTH (type
);
2427 memcpy ((void *) valbuf
, regbuf
, TYPE_LENGTH (type
));
2432 sparc32_stack_align (CORE_ADDR addr
)
2434 return ((addr
+ 7) & -8);
2438 sparc64_stack_align (CORE_ADDR addr
)
2440 return ((addr
+ 15) & -16);
2444 sparc_print_extra_frame_info (struct frame_info
*fi
)
2446 if (fi
&& fi
->extra_info
&& fi
->extra_info
->flat
)
2447 printf_filtered (" flat, pc saved at 0x%s, fp saved at 0x%s\n",
2448 paddr_nz (fi
->extra_info
->pc_addr
),
2449 paddr_nz (fi
->extra_info
->fp_addr
));
2452 /* MULTI_ARCH support */
2455 sparc32_register_name (int regno
)
2457 static char *register_names
[] =
2458 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2459 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2460 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2461 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2463 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2464 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2465 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2466 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2468 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr"
2472 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2475 return register_names
[regno
];
2479 sparc64_register_name (int regno
)
2481 static char *register_names
[] =
2482 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2483 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2484 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2485 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2487 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2488 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2489 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2490 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2491 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
2492 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
2494 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", "ver",
2495 "tick", "pil", "pstate", "tstate", "tba", "tl", "tt", "tpc",
2496 "tnpc", "wstate", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
2497 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", "asr22", "asr23",
2498 "asr24", "asr25", "asr26", "asr27", "asr28", "asr29", "asr30", "asr31",
2499 /* These are here at the end to simplify removing them if we have to. */
2500 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"
2504 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2507 return register_names
[regno
];
2511 sparclite_register_name (int regno
)
2513 static char *register_names
[] =
2514 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2515 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2516 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2517 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2519 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2520 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2521 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2522 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2524 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr",
2525 "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr"
2529 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2532 return register_names
[regno
];
2536 sparclet_register_name (int regno
)
2538 static char *register_names
[] =
2539 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2540 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2541 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2542 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2544 "", "", "", "", "", "", "", "", /* no floating point registers */
2545 "", "", "", "", "", "", "", "",
2546 "", "", "", "", "", "", "", "",
2547 "", "", "", "", "", "", "", "",
2549 "y", "psr", "wim", "tbr", "pc", "npc", "", "", /* no FPSR or CPSR */
2550 "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "",
2552 /* ASR15 ASR19 (don't display them) */
2553 "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22"
2554 /* None of the rest get displayed */
2556 "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7",
2557 "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15",
2558 "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23",
2559 "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31",
2565 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2568 return register_names
[regno
];
2572 sparc_push_return_address (CORE_ADDR pc_unused
, CORE_ADDR sp
)
2574 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2576 /* The return PC of the dummy_frame is the former 'current' PC
2577 (where we were before we made the target function call).
2578 This is saved in %i7 by push_dummy_frame.
2580 We will save the 'call dummy location' (ie. the address
2581 to which the target function will return) in %o7.
2582 This address will actually be the program's entry point.
2583 There will be a special call_dummy breakpoint there. */
2585 write_register (O7_REGNUM
,
2586 CALL_DUMMY_ADDRESS () - 8);
2592 /* Should call_function allocate stack space for a struct return? */
2595 sparc64_use_struct_convention (int gcc_p
, struct type
*type
)
2597 return (TYPE_LENGTH (type
) > 32);
2600 /* Store the address of the place in which to copy the structure the
2601 subroutine will return. This is called from call_function_by_hand.
2602 The ultimate mystery is, tho, what is the value "16"?
2604 MVS: That's the offset from where the sp is now, to where the
2605 subroutine is gonna expect to find the struct return address. */
2608 sparc32_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2613 val
= alloca (SPARC_INTREG_SIZE
);
2614 store_unsigned_integer (val
, SPARC_INTREG_SIZE
, addr
);
2615 write_memory (sp
+ (16 * SPARC_INTREG_SIZE
), val
, SPARC_INTREG_SIZE
);
2617 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2619 /* Now adjust the value of the link register, which was previously
2620 stored by push_return_address. Functions that return structs are
2621 peculiar in that they return to link register + 12, rather than
2622 link register + 8. */
2624 o7
= read_register (O7_REGNUM
);
2625 write_register (O7_REGNUM
, o7
- 4);
2630 sparc64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2632 /* FIXME: V9 uses %o0 for this. */
2633 /* FIXME MVS: Only for small enough structs!!! */
2635 target_write_memory (sp
+ (16 * SPARC_INTREG_SIZE
),
2636 (char *) &addr
, SPARC_INTREG_SIZE
);
2638 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2640 /* Now adjust the value of the link register, which was previously
2641 stored by push_return_address. Functions that return structs are
2642 peculiar in that they return to link register + 12, rather than
2643 link register + 8. */
2645 write_register (O7_REGNUM
, read_register (O7_REGNUM
) - 4);
2650 /* Default target data type for register REGNO. */
2652 static struct type
*
2653 sparc32_register_virtual_type (int regno
)
2655 if (regno
== PC_REGNUM
||
2656 regno
== FP_REGNUM
||
2658 return builtin_type_unsigned_int
;
2660 return builtin_type_int
;
2662 return builtin_type_float
;
2663 return builtin_type_int
;
2666 static struct type
*
2667 sparc64_register_virtual_type (int regno
)
2669 if (regno
== PC_REGNUM
||
2670 regno
== FP_REGNUM
||
2672 return builtin_type_unsigned_long_long
;
2674 return builtin_type_long_long
;
2676 return builtin_type_float
;
2678 return builtin_type_double
;
2679 return builtin_type_long_long
;
2682 /* Number of bytes of storage in the actual machine representation for
2686 sparc32_register_size (int regno
)
2692 sparc64_register_size (int regno
)
2694 return (regno
< 32 ? 8 : regno
< 64 ? 4 : 8);
2697 /* Index within the `registers' buffer of the first byte of the space
2698 for register REGNO. */
2701 sparc32_register_byte (int regno
)
2707 sparc64_register_byte (int regno
)
2711 else if (regno
< 64)
2712 return 32 * 8 + (regno
- 32) * 4;
2713 else if (regno
< 80)
2714 return 32 * 8 + 32 * 4 + (regno
- 64) * 8;
2716 return 64 * 8 + (regno
- 80) * 8;
2719 /* Advance PC across any function entry prologue instructions to reach
2720 some "real" code. */
2723 sparc_gdbarch_skip_prologue (CORE_ADDR ip
)
2725 return examine_prologue (ip
, 0, NULL
, NULL
);
2728 /* Immediately after a function call, return the saved pc.
2729 Can't go through the frames for this because on some machines
2730 the new frame is not set up until the new function executes
2731 some instructions. */
2734 sparc_saved_pc_after_call (struct frame_info
*fi
)
2736 return sparc_pc_adjust (read_register (RP_REGNUM
));
2739 /* Convert registers between 'raw' and 'virtual' formats.
2740 They are the same on sparc, so there's nothing to do. */
2743 sparc_convert_to_virtual (int regnum
, struct type
*type
, char *from
, char *to
)
2744 { /* do nothing (should never be called) */
2748 sparc_convert_to_raw (struct type
*type
, int regnum
, char *from
, char *to
)
2749 { /* do nothing (should never be called) */
2752 /* Init saved regs: nothing to do, just a place-holder function. */
2755 sparc_frame_init_saved_regs (struct frame_info
*fi_ignored
)
2759 /* gdbarch fix call dummy:
2760 All this function does is rearrange the arguments before calling
2761 sparc_fix_call_dummy (which does the real work). */
2764 sparc_gdbarch_fix_call_dummy (char *dummy
,
2768 struct value
**args
,
2772 if (CALL_DUMMY_LOCATION
== ON_STACK
)
2773 sparc_fix_call_dummy (dummy
, pc
, fun
, type
, gcc_p
);
2776 /* Coerce float to double: a no-op. */
2779 sparc_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
2784 /* CALL_DUMMY_ADDRESS: fetch the breakpoint address for a call dummy. */
2787 sparc_call_dummy_address (void)
2789 return (CALL_DUMMY_START_OFFSET
) + CALL_DUMMY_BREAKPOINT_OFFSET
;
2792 /* Supply the Y register number to those that need it. */
2795 sparc_y_regnum (void)
2797 return gdbarch_tdep (current_gdbarch
)->y_regnum
;
2801 sparc_reg_struct_has_addr (int gcc_p
, struct type
*type
)
2803 if (GDB_TARGET_IS_SPARC64
)
2804 return (TYPE_LENGTH (type
) > 32);
2806 return (gcc_p
!= 1);
2810 sparc_intreg_size (void)
2812 return SPARC_INTREG_SIZE
;
2816 sparc_return_value_on_stack (struct type
*type
)
2818 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&&
2819 TYPE_LENGTH (type
) > 8)
2827 process_note_abi_tag_sections (bfd
*abfd
, asection
*sect
, void *obj
)
2829 int *os_ident_ptr
= obj
;
2831 unsigned int sect_size
;
2833 name
= bfd_get_section_name (abfd
, sect
);
2834 sect_size
= bfd_section_size (abfd
, sect
);
2835 if (strcmp (name
, ".note.ABI-tag") == 0 && sect_size
> 0)
2837 unsigned int name_length
, data_length
, note_type
;
2838 char *note
= alloca (sect_size
);
2840 bfd_get_section_contents (abfd
, sect
, note
,
2841 (file_ptr
) 0, (bfd_size_type
) sect_size
);
2843 name_length
= bfd_h_get_32 (abfd
, note
);
2844 data_length
= bfd_h_get_32 (abfd
, note
+ 4);
2845 note_type
= bfd_h_get_32 (abfd
, note
+ 8);
2847 if (name_length
== 4 && data_length
== 16 && note_type
== 1
2848 && strcmp (note
+ 12, "GNU") == 0)
2850 int os_number
= bfd_h_get_32 (abfd
, note
+ 16);
2852 /* The case numbers are from abi-tags in glibc. */
2856 *os_ident_ptr
= ELFOSABI_LINUX
;
2859 *os_ident_ptr
= ELFOSABI_HURD
;
2862 *os_ident_ptr
= ELFOSABI_SOLARIS
;
2865 internal_error (__FILE__
, __LINE__
,
2866 "process_note_abi_sections: "
2867 "unknown OS number %d", os_number
);
2874 struct sparc_abi_handler
2876 struct sparc_abi_handler
*next
;
2878 void (*init_abi
)(struct gdbarch_info
, struct gdbarch
*);
2881 struct sparc_abi_handler
*sparc_abi_handler_list
= NULL
;
2884 sparc_gdbarch_register_os_abi (int os_ident
,
2885 void (*init_abi
)(struct gdbarch_info
,
2888 struct sparc_abi_handler
*p
;
2890 for (p
= sparc_abi_handler_list
; p
!= NULL
; p
= p
->next
)
2892 if (p
->os_ident
== os_ident
)
2895 (__FILE__
, __LINE__
,
2896 "sparc_gdbarch_register_os_abi: A handler for this ABI variant (%d)"
2897 " has already been registered", (int)os_ident
);
2898 /* If user wants to continue, override previous definition. */
2899 p
->init_abi
= init_abi
;
2904 p
= (struct sparc_abi_handler
*) xmalloc (sizeof (*p
));
2905 p
->os_ident
= os_ident
;
2906 p
->init_abi
= init_abi
;
2907 p
->next
= sparc_abi_handler_list
;
2908 sparc_abi_handler_list
= p
;
2912 * Gdbarch "constructor" function.
2915 #define SPARC32_CALL_DUMMY_ON_STACK
2917 #define SPARC_SP_REGNUM 14
2918 #define SPARC_FP_REGNUM 30
2919 #define SPARC_FP0_REGNUM 32
2920 #define SPARC32_NPC_REGNUM 69
2921 #define SPARC32_PC_REGNUM 68
2922 #define SPARC32_Y_REGNUM 64
2923 #define SPARC64_PC_REGNUM 80
2924 #define SPARC64_NPC_REGNUM 81
2925 #define SPARC64_Y_REGNUM 85
2927 static struct gdbarch
*
2928 sparc_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2930 struct gdbarch
*gdbarch
;
2931 struct gdbarch_tdep
*tdep
;
2932 struct sparc_abi_handler
*abi_handler
;
2935 static LONGEST call_dummy_32
[] =
2936 { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,
2937 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,
2938 0xd203a048, 0x40000000, 0xd003a044, 0x01000000,
2939 0x91d02001, 0x01000000
2941 static LONGEST call_dummy_64
[] =
2942 { 0x9de3bec0fd3fa7f7LL
, 0xf93fa7eff53fa7e7LL
,
2943 0xf13fa7dfed3fa7d7LL
, 0xe93fa7cfe53fa7c7LL
,
2944 0xe13fa7bfdd3fa7b7LL
, 0xd93fa7afd53fa7a7LL
,
2945 0xd13fa79fcd3fa797LL
, 0xc93fa78fc53fa787LL
,
2946 0xc13fa77fcc3fa777LL
, 0xc83fa76fc43fa767LL
,
2947 0xc03fa75ffc3fa757LL
, 0xf83fa74ff43fa747LL
,
2948 0xf03fa73f01000000LL
, 0x0100000001000000LL
,
2949 0x0100000091580000LL
, 0xd027a72b93500000LL
,
2950 0xd027a72791480000LL
, 0xd027a72391400000LL
,
2951 0xd027a71fda5ba8a7LL
, 0xd85ba89fd65ba897LL
,
2952 0xd45ba88fd25ba887LL
, 0x9fc02000d05ba87fLL
,
2953 0x0100000091d02001LL
, 0x0100000001000000LL
2955 static LONGEST call_dummy_nil
[] = {0};
2957 if (info
.abfd
!= NULL
2958 && bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
2960 os_ident
= elf_elfheader (info
.abfd
)->e_ident
[EI_OSABI
];
2962 /* If os_ident is 0, it is not necessarily the case that we're
2963 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2964 GNU/Linux uses a note section to record OS/ABI info, but
2965 leaves e_ident[EI_OSABI] zero. So we have to check for note
2967 if (os_ident
== ELFOSABI_NONE
)
2968 bfd_map_over_sections (info
.abfd
,
2969 process_note_abi_tag_sections
,
2975 /* First see if there is already a gdbarch that can satisfy the request. */
2976 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2978 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2980 tdep
= gdbarch_tdep (arches
->gdbarch
);
2981 if (tdep
&& tdep
->os_ident
== os_ident
)
2982 return arches
->gdbarch
;
2985 /* None found: is the request for a sparc architecture? */
2986 if (info
.bfd_arch_info
->arch
!= bfd_arch_sparc
)
2987 return NULL
; /* No; then it's not for us. */
2989 /* Yes: create a new gdbarch for the specified machine type. */
2990 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
2991 gdbarch
= gdbarch_alloc (&info
, tdep
);
2993 tdep
->os_ident
= os_ident
;
2995 /* First set settings that are common for all sparc architectures. */
2996 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2997 set_gdbarch_breakpoint_from_pc (gdbarch
, memory_breakpoint_from_pc
);
2998 set_gdbarch_coerce_float_to_double (gdbarch
,
2999 sparc_coerce_float_to_double
);
3000 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
3001 set_gdbarch_call_dummy_p (gdbarch
, 1);
3002 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 1);
3003 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
3004 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3005 set_gdbarch_extract_struct_value_address (gdbarch
,
3006 sparc_extract_struct_value_address
);
3007 set_gdbarch_fix_call_dummy (gdbarch
, sparc_gdbarch_fix_call_dummy
);
3008 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3009 set_gdbarch_fp_regnum (gdbarch
, SPARC_FP_REGNUM
);
3010 set_gdbarch_fp0_regnum (gdbarch
, SPARC_FP0_REGNUM
);
3011 set_gdbarch_frame_args_address (gdbarch
, default_frame_address
);
3012 set_gdbarch_frame_chain (gdbarch
, sparc_frame_chain
);
3013 set_gdbarch_frame_init_saved_regs (gdbarch
, sparc_frame_init_saved_regs
);
3014 set_gdbarch_frame_locals_address (gdbarch
, default_frame_address
);
3015 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
3016 set_gdbarch_frame_saved_pc (gdbarch
, sparc_frame_saved_pc
);
3017 set_gdbarch_frameless_function_invocation (gdbarch
,
3018 frameless_look_for_prologue
);
3019 set_gdbarch_get_saved_register (gdbarch
, sparc_get_saved_register
);
3020 set_gdbarch_init_extra_frame_info (gdbarch
, sparc_init_extra_frame_info
);
3021 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3022 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3023 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
3024 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3025 set_gdbarch_max_register_raw_size (gdbarch
, 8);
3026 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
3027 set_gdbarch_pop_frame (gdbarch
, sparc_pop_frame
);
3028 set_gdbarch_push_return_address (gdbarch
, sparc_push_return_address
);
3029 set_gdbarch_push_dummy_frame (gdbarch
, sparc_push_dummy_frame
);
3030 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
3031 set_gdbarch_register_convert_to_raw (gdbarch
, sparc_convert_to_raw
);
3032 set_gdbarch_register_convert_to_virtual (gdbarch
,
3033 sparc_convert_to_virtual
);
3034 set_gdbarch_register_convertible (gdbarch
,
3035 generic_register_convertible_not
);
3036 set_gdbarch_reg_struct_has_addr (gdbarch
, sparc_reg_struct_has_addr
);
3037 set_gdbarch_return_value_on_stack (gdbarch
, sparc_return_value_on_stack
);
3038 set_gdbarch_saved_pc_after_call (gdbarch
, sparc_saved_pc_after_call
);
3039 set_gdbarch_prologue_frameless_p (gdbarch
, sparc_prologue_frameless_p
);
3040 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
3041 set_gdbarch_skip_prologue (gdbarch
, sparc_gdbarch_skip_prologue
);
3042 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
);
3043 set_gdbarch_use_generic_dummy_frames (gdbarch
, 0);
3044 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
3047 * Settings that depend only on 32/64 bit word size
3050 switch (info
.bfd_arch_info
->mach
)
3052 case bfd_mach_sparc
:
3053 case bfd_mach_sparc_sparclet
:
3054 case bfd_mach_sparc_sparclite
:
3055 case bfd_mach_sparc_v8plus
:
3056 case bfd_mach_sparc_v8plusa
:
3057 case bfd_mach_sparc_sparclite_le
:
3058 /* 32-bit machine types: */
3060 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3061 set_gdbarch_pc_in_call_dummy (gdbarch
, pc_in_call_dummy_on_stack
);
3062 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3063 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0x30);
3064 set_gdbarch_call_dummy_length (gdbarch
, 0x38);
3065 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3066 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_32
);
3068 set_gdbarch_pc_in_call_dummy (gdbarch
, pc_in_call_dummy_at_entry_point
);
3069 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3070 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3071 set_gdbarch_call_dummy_length (gdbarch
, 0);
3072 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
3073 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3075 set_gdbarch_call_dummy_stack_adjust (gdbarch
, 68);
3076 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3077 set_gdbarch_frame_args_skip (gdbarch
, 68);
3078 set_gdbarch_function_start_offset (gdbarch
, 0);
3079 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3080 set_gdbarch_npc_regnum (gdbarch
, SPARC32_NPC_REGNUM
);
3081 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
);
3082 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3083 set_gdbarch_push_arguments (gdbarch
, sparc32_push_arguments
);
3084 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
3085 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
3087 set_gdbarch_register_byte (gdbarch
, sparc32_register_byte
);
3088 set_gdbarch_register_raw_size (gdbarch
, sparc32_register_size
);
3089 set_gdbarch_register_size (gdbarch
, 4);
3090 set_gdbarch_register_virtual_size (gdbarch
, sparc32_register_size
);
3091 set_gdbarch_register_virtual_type (gdbarch
,
3092 sparc32_register_virtual_type
);
3093 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3094 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_32
));
3096 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3098 set_gdbarch_stack_align (gdbarch
, sparc32_stack_align
);
3099 set_gdbarch_store_struct_return (gdbarch
, sparc32_store_struct_return
);
3100 set_gdbarch_use_struct_convention (gdbarch
,
3101 generic_use_struct_convention
);
3102 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
3103 tdep
->y_regnum
= SPARC32_Y_REGNUM
;
3104 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 32;
3105 tdep
->intreg_size
= 4;
3106 tdep
->reg_save_offset
= 0x60;
3107 tdep
->call_dummy_call_offset
= 0x24;
3110 case bfd_mach_sparc_v9
:
3111 case bfd_mach_sparc_v9a
:
3112 /* 64-bit machine types: */
3113 default: /* Any new machine type is likely to be 64-bit. */
3115 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3116 set_gdbarch_pc_in_call_dummy (gdbarch
, pc_in_call_dummy_on_stack
);
3117 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3118 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 8 * 4);
3119 set_gdbarch_call_dummy_length (gdbarch
, 192);
3120 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3121 set_gdbarch_call_dummy_start_offset (gdbarch
, 148);
3122 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_64
);
3124 set_gdbarch_pc_in_call_dummy (gdbarch
, pc_in_call_dummy_at_entry_point
);
3125 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3126 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3127 set_gdbarch_call_dummy_length (gdbarch
, 0);
3128 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
3129 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3130 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3132 set_gdbarch_call_dummy_stack_adjust (gdbarch
, 128);
3133 set_gdbarch_frame_args_skip (gdbarch
, 136);
3134 set_gdbarch_function_start_offset (gdbarch
, 0);
3135 set_gdbarch_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3136 set_gdbarch_npc_regnum (gdbarch
, SPARC64_NPC_REGNUM
);
3137 set_gdbarch_pc_regnum (gdbarch
, SPARC64_PC_REGNUM
);
3138 set_gdbarch_ptr_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3139 set_gdbarch_push_arguments (gdbarch
, sparc64_push_arguments
);
3140 /* NOTE different for at_entry */
3141 set_gdbarch_read_fp (gdbarch
, sparc64_read_fp
);
3142 set_gdbarch_read_sp (gdbarch
, sparc64_read_sp
);
3143 /* Some of the registers aren't 64 bits, but it's a lot simpler just
3144 to assume they all are (since most of them are). */
3145 set_gdbarch_register_byte (gdbarch
, sparc64_register_byte
);
3146 set_gdbarch_register_raw_size (gdbarch
, sparc64_register_size
);
3147 set_gdbarch_register_size (gdbarch
, 8);
3148 set_gdbarch_register_virtual_size (gdbarch
, sparc64_register_size
);
3149 set_gdbarch_register_virtual_type (gdbarch
,
3150 sparc64_register_virtual_type
);
3151 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3152 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_64
));
3154 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3156 set_gdbarch_stack_align (gdbarch
, sparc64_stack_align
);
3157 set_gdbarch_store_struct_return (gdbarch
, sparc64_store_struct_return
);
3158 set_gdbarch_use_struct_convention (gdbarch
,
3159 sparc64_use_struct_convention
);
3160 set_gdbarch_write_sp (gdbarch
, sparc64_write_sp
);
3161 tdep
->y_regnum
= SPARC64_Y_REGNUM
;
3162 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 48;
3163 tdep
->intreg_size
= 8;
3164 tdep
->reg_save_offset
= 0x90;
3165 tdep
->call_dummy_call_offset
= 148 + 4 * 5;
3170 * Settings that vary per-architecture:
3173 switch (info
.bfd_arch_info
->mach
)
3175 case bfd_mach_sparc
:
3176 set_gdbarch_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3177 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3178 set_gdbarch_num_regs (gdbarch
, 72);
3179 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3180 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3181 set_gdbarch_store_return_value (gdbarch
, sparc_store_return_value
);
3182 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3183 tdep
->fp_register_bytes
= 32 * 4;
3184 tdep
->print_insn_mach
= bfd_mach_sparc
;
3186 case bfd_mach_sparc_sparclet
:
3187 set_gdbarch_extract_return_value (gdbarch
,
3188 sparclet_extract_return_value
);
3189 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3190 set_gdbarch_num_regs (gdbarch
, 32 + 32 + 8 + 8 + 8);
3191 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4 + 8*4);
3192 set_gdbarch_register_name (gdbarch
, sparclet_register_name
);
3193 set_gdbarch_store_return_value (gdbarch
, sparclet_store_return_value
);
3194 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3195 tdep
->fp_register_bytes
= 0;
3196 tdep
->print_insn_mach
= bfd_mach_sparc_sparclet
;
3198 case bfd_mach_sparc_sparclite
:
3199 set_gdbarch_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3200 set_gdbarch_frame_chain_valid (gdbarch
, func_frame_chain_valid
);
3201 set_gdbarch_num_regs (gdbarch
, 80);
3202 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3203 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3204 set_gdbarch_store_return_value (gdbarch
, sparc_store_return_value
);
3205 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3206 tdep
->fp_register_bytes
= 0;
3207 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3209 case bfd_mach_sparc_v8plus
:
3210 set_gdbarch_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3211 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3212 set_gdbarch_num_regs (gdbarch
, 72);
3213 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3214 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3215 set_gdbarch_store_return_value (gdbarch
, sparc_store_return_value
);
3216 tdep
->print_insn_mach
= bfd_mach_sparc
;
3217 tdep
->fp_register_bytes
= 32 * 4;
3218 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3220 case bfd_mach_sparc_v8plusa
:
3221 set_gdbarch_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3222 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3223 set_gdbarch_num_regs (gdbarch
, 72);
3224 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3225 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3226 set_gdbarch_store_return_value (gdbarch
, sparc_store_return_value
);
3227 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3228 tdep
->fp_register_bytes
= 32 * 4;
3229 tdep
->print_insn_mach
= bfd_mach_sparc
;
3231 case bfd_mach_sparc_sparclite_le
:
3232 set_gdbarch_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3233 set_gdbarch_frame_chain_valid (gdbarch
, func_frame_chain_valid
);
3234 set_gdbarch_num_regs (gdbarch
, 80);
3235 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3236 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3237 set_gdbarch_store_return_value (gdbarch
, sparc_store_return_value
);
3238 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3239 tdep
->fp_register_bytes
= 0;
3240 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3242 case bfd_mach_sparc_v9
:
3243 set_gdbarch_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3244 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3245 set_gdbarch_num_regs (gdbarch
, 125);
3246 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3247 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3248 set_gdbarch_store_return_value (gdbarch
, sparc_store_return_value
);
3249 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3250 tdep
->fp_register_bytes
= 64 * 4;
3251 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3253 case bfd_mach_sparc_v9a
:
3254 set_gdbarch_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3255 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3256 set_gdbarch_num_regs (gdbarch
, 125);
3257 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3258 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3259 set_gdbarch_store_return_value (gdbarch
, sparc_store_return_value
);
3260 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3261 tdep
->fp_register_bytes
= 64 * 4;
3262 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3266 for (abi_handler
= sparc_abi_handler_list
;
3268 abi_handler
= abi_handler
->next
)
3269 if (abi_handler
->os_ident
== os_ident
)
3273 abi_handler
->init_abi (info
, gdbarch
);
3279 sparc_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
3281 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3286 fprintf_unfiltered (file
, "sparc_dump_tdep: os_ident ");
3287 switch (tdep
->os_ident
)
3290 fprintf_unfiltered (file
, "ELFOSABI_NONE");
3292 case ELFOSABI_NETBSD
:
3293 fprintf_unfiltered (file
, "ELFOSABI_NETBSD");
3295 case ELFOSABI_LINUX
:
3296 fprintf_unfiltered (file
, "ELFOSABI_LINUX");
3299 fprintf_unfiltered (file
, "ELFOSABI_HURD");
3301 case ELFOSABI_SOLARIS
:
3302 fprintf_unfiltered (file
, "ELFOSABI_SOLARIS");
3304 case ELFOSABI_FREEBSD
:
3305 fprintf_unfiltered (file
, "ELFOSABI_FREEBSD");
3307 case ELFOSABI_OPENBSD
:
3308 fprintf_unfiltered (file
, "ELFOSABI_OPENBSD");
3310 case ELFOSABI_STANDALONE
:
3311 fprintf_unfiltered (file
, "ELFOSABI_STANDALONE");
3314 fprintf_unfiltered (file
, "UNKNOWN");
3318 fprintf_unfiltered (file
, "sparc_dump_tdep: has_fpu %d\n",
3320 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_register_bytes %d\n",
3321 tdep
->fp_register_bytes
);
3322 fprintf_unfiltered (file
, "sparc_dump_tdep: y_regnum %d\n",
3324 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_max_regnum %d\n",
3325 tdep
->fp_max_regnum
);
3326 fprintf_unfiltered (file
, "sparc_dump_tdep: intreg_size %d\n",
3328 fprintf_unfiltered (file
, "sparc_dump_tdep: reg_save_offset %d\n",
3329 tdep
->reg_save_offset
);
3330 fprintf_unfiltered (file
, "sparc_dump_tdep: call_dummy_call_offset %d\n",
3331 tdep
->call_dummy_call_offset
);
3332 fprintf_unfiltered (file
, "sparc_dump_tdep: print_insn_mach ");
3333 switch (tdep
->print_insn_mach
)
3335 case bfd_mach_sparc
:
3336 fprintf_unfiltered (file
, "bfd_mach_sparc\n");
3338 case bfd_mach_sparc_sparclet
:
3339 fprintf_unfiltered (file
, "bfd_mach_sparc_sparclet\n");
3341 case bfd_mach_sparc_sparclite
:
3342 fprintf_unfiltered (file
, "bfd_mach_sparc_sparclite\n");
3344 case bfd_mach_sparc_sparclite_le
:
3345 fprintf_unfiltered (file
, "bfd_mach_sparc_sparclite_le\n");
3347 case bfd_mach_sparc_v8plus
:
3348 fprintf_unfiltered (file
, "bfd_mach_sparc_v8plus\n");
3350 case bfd_mach_sparc_v8plusa
:
3351 fprintf_unfiltered (file
, "bfd_mach_sparc_v8plusa\n");
3353 case bfd_mach_sparc_v8plusb
:
3354 fprintf_unfiltered (file
, "bfd_mach_sparc_v8plusb\n");
3356 case bfd_mach_sparc_v9
:
3357 fprintf_unfiltered (file
, "bfd_mach_sparc_v9\n");
3359 case bfd_mach_sparc_v9a
:
3360 fprintf_unfiltered (file
, "bfd_mach_sparc_v9a\n");
3362 case bfd_mach_sparc_v9b
:
3363 fprintf_unfiltered (file
, "bfd_mach_sparc_v9b\n");
3366 fprintf_unfiltered (file
, "UNKNOWN\n");