1 /* Machine-dependent code which would otherwise be in inflow.c and core.c,
2 for GDB, the GNU debugger.
3 Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
4 This code is for the sparc cpu.
6 This file is part of GDB.
8 GDB is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 1, or (at your option)
13 GDB is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GDB; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
30 #include "ieee-float.h"
32 #include <sys/param.h>
36 #include <sys/ioctl.h>
39 #include <sys/ptrace.h>
48 extern int stop_after_trap
;
52 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
,
55 /* Simulate single-step ptrace call for sun4. Code written by Gary
56 Beihl (beihl@mcc.com). */
58 /* npc4 and next_pc describe the situation at the time that the
59 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
60 static CORE_ADDR next_pc
, npc4
, target
;
61 static int brknpc4
, brktrg
;
62 typedef char binsn_quantum
[BREAKPOINT_MAX
];
63 static binsn_quantum break_mem
[3];
65 /* Non-zero if we just simulated a single-step ptrace call. This is
66 needed because we cannot remove the breakpoints in the inferior
67 process until after the `wait' in `wait_for_inferior'. Used for
76 branch_type br
, isannulled();
82 /* Always set breakpoint for NPC. */
83 next_pc
= read_register (NPC_REGNUM
);
84 npc4
= next_pc
+ 4; /* branch not taken */
86 target_insert_breakpoint (next_pc
, break_mem
[0]);
87 /* printf ("set break at %x\n",next_pc); */
89 pc
= read_register (PC_REGNUM
);
90 pc_instruction
= read_memory_integer (pc
, sizeof(pc_instruction
));
91 br
= isannulled (pc_instruction
, pc
, &target
);
96 /* Conditional annulled branch will either end up at
97 npc (if taken) or at npc+4 (if not taken).
100 target_insert_breakpoint (npc4
, break_mem
[1]);
102 else if (br
== baa
&& target
!= next_pc
)
104 /* Unconditional annulled branch will always end up at
107 target_insert_breakpoint (target
, break_mem
[2]);
111 ptrace (7, inferior_pid
, 1, signal
);
117 /* Remove breakpoints */
118 target_remove_breakpoint (next_pc
, break_mem
[0]);
121 target_remove_breakpoint (npc4
, break_mem
[1]);
124 target_remove_breakpoint (target
, break_mem
[2]);
131 * Find the pc saved in frame FRAME.
134 frame_saved_pc (frame
)
139 /* If it's at the bottom, the return value's stored in i7/rp */
140 if (get_current_frame () == frame
)
141 prev_pc
= GET_RWINDOW_REG (read_register (SP_REGNUM
), rw_in
[7]);
143 /* Wouldn't this always work? This would allow this routine to
144 be completely a macro. */
145 prev_pc
= GET_RWINDOW_REG (frame
->bottom
, rw_in
[7]);
147 return PC_ADJUST (prev_pc
);
151 * Since an individual frame in the frame cache is defined by two
152 * arguments (a frame pointer and a stack pointer), we need two
153 * arguments to get info for an arbitrary stack frame. This routine
154 * takes two arguments and makes the cached frames look as if these
155 * two arguments defined a frame on the cache. This allows the rest
156 * of info frame to extract the important arguments without
160 setup_arbitrary_frame (frame
, stack
)
161 FRAME_ADDR frame
, stack
;
163 FRAME fid
= create_new_frame (frame
, 0);
166 fatal ("internal: create_new_frame returned invalid frame id");
173 /* This code was written by Gary Beihl (beihl@mcc.com).
174 It was modified by Michael Tiemann (tiemann@corto.inria.fr). */
177 * This routine appears to be passed a size by which to increase the
178 * stack. It then executes a save instruction in the inferior to
179 * increase the stack by this amount. Only the register window system
180 * should be affected by this; the program counter & etc. will not be.
182 * This instructions used for this purpose are:
184 * sethi %hi(0x0),g1 *
187 * sethi %hi(0x0),g1 *
190 * sethi %hi(0x0),g0 (nop)
192 * I presume that these set g1 to be the negative of the size, do a
193 * save (putting the stack pointer at sp - size) and restore the
194 * original contents of g1. A * indicates that the actual value of
195 * the instruction is modified below.
197 static int save_insn_opcodes
[] = {
198 0x03000000, 0x82007ee0, 0x9de38001, 0x03000000,
199 0x82007ee0, 0x91d02001, 0x01000000 };
201 /* Neither do_save_insn or do_restore_insn save stack configuration
202 (current_frame, etc),
203 since the stack is in an indeterminate state through the call to
204 each of them. That responsibility of the routine which calls them. */
210 int g1
= read_register (G1_REGNUM
);
211 CORE_ADDR sp
= read_register (SP_REGNUM
);
212 CORE_ADDR pc
= read_register (PC_REGNUM
);
213 CORE_ADDR npc
= read_register (NPC_REGNUM
);
214 CORE_ADDR fake_pc
= sp
- sizeof (save_insn_opcodes
);
215 struct inferior_status inf_status
;
217 save_inferior_status (&inf_status
, 0); /* Don't restore stack info */
221 save_insn_opcodes
[0] = 0x03000000 | ((-size
>> 10) & 0x3fffff);
222 save_insn_opcodes
[1] = 0x82006000 | (-size
& 0x3ff);
223 save_insn_opcodes
[3] = 0x03000000 | ((g1
>> 10) & 0x3fffff);
224 save_insn_opcodes
[4] = 0x82006000 | (g1
& 0x3ff);
225 write_memory (fake_pc
, (char *)save_insn_opcodes
, sizeof (save_insn_opcodes
));
227 clear_proceed_status ();
229 proceed (fake_pc
, 0, 0);
231 write_register (PC_REGNUM
, pc
);
232 write_register (NPC_REGNUM
, npc
);
233 restore_inferior_status (&inf_status
);
237 * This routine takes a program counter value. It restores the
238 * register window system to the frame above the current one.
239 * THIS ROUTINE CLOBBERS PC AND NPC IN THE TARGET!
242 /* The following insns translate to:
248 static int restore_insn_opcodes
[] = { 0x81e80000, 0x91d02001, 0x01000000 };
253 CORE_ADDR sp
= read_register (SP_REGNUM
);
254 CORE_ADDR fake_pc
= sp
- sizeof (restore_insn_opcodes
);
255 struct inferior_status inf_status
;
257 save_inferior_status (&inf_status
, 0); /* Don't restore stack info */
259 write_memory (fake_pc
, (char *)restore_insn_opcodes
,
260 sizeof (restore_insn_opcodes
));
262 clear_proceed_status ();
264 proceed (fake_pc
, 0, 0);
266 restore_inferior_status (&inf_status
);
269 /* This routine should be more specific in it's actions; making sure
270 that it uses the same register in the initial prologue section. */
272 skip_prologue (start_pc
)
277 unsigned long int code
;
283 unsigned int imm22
:22;
292 unsigned int simm13
:13;
297 CORE_ADDR pc
= start_pc
;
298 /* Have we found a save instruction? */
301 x
.i
= read_memory_integer (pc
, 4);
303 /* Recognize the `sethi' insn and record its destination. */
304 if (x
.sethi
.op
== 0 && x
.sethi
.op2
== 4)
308 x
.i
= read_memory_integer (pc
, 4);
311 /* Recognize an add immediate value to register to either %g1 or
312 the destination register recorded above. Actually, this might
313 well recognize several different arithmetic operations.
314 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
315 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
316 I imagine any compiler really does that, however). */
317 if (x
.add
.op
== 2 && x
.add
.i
&& (x
.add
.rd
== 1 || x
.add
.rd
== dest
))
320 x
.i
= read_memory_integer (pc
, 4);
323 /* This recognizes any SAVE insn. But why do the XOR and then
324 the compare? That's identical to comparing against 60 (as long
325 as there isn't any sign extension). */
326 if (x
.add
.op
== 2 && (x
.add
.op3
^ 32) == 28)
330 x
.i
= read_memory_integer (pc
, 4);
333 /* Now we need to recognize stores into the frame from the input
334 registers. This recognizes all non alternate stores of input
335 register, into a location offset from the frame pointer. */
337 && (x
.add
.op3
& 0x3c) == 4 /* Store, non-alternate. */
338 && (x
.add
.rd
& 0x18) == 0x18 /* Input register. */
339 && x
.add
.i
/* Immediate mode. */
340 && x
.add
.rs1
== 30 /* Off of frame pointer. */
341 /* Into reserved stack space. */
342 && x
.add
.simm13
>= 0x44
343 && x
.add
.simm13
< 0x5b)
346 x
.i
= read_memory_integer (pc
, 4);
351 /* Without a save instruction, it's not a prologue. */
355 /* Check instruction at ADDR to see if it is an annulled branch.
356 All other instructions will go to NPC or will trap.
357 Set *TARGET if we find a canidate branch; set to zero if not. */
360 isannulled (instruction
, addr
, target
)
362 CORE_ADDR addr
, *target
;
364 branch_type val
= not_branch
;
365 long int offset
; /* Must be signed for sign-extend. */
368 unsigned long int code
;
375 unsigned int disp22
:22;
380 insn
.code
= instruction
;
383 && (insn
.b
.op2
== 2 || insn
.b
.op2
== 6 || insn
.b
.op2
== 7))
385 if (insn
.b
.cond
== 8)
386 val
= insn
.b
.a
? baa
: ba
;
388 val
= insn
.b
.a
? bicca
: bicc
;
389 offset
= 4 * ((int) (insn
.b
.disp22
<< 10) >> 10);
390 *target
= addr
+ offset
;
396 /* sparc_frame_find_saved_regs ()
398 Stores, into a struct frame_saved_regs,
399 the addresses of the saved registers of frame described by FRAME_INFO.
400 This includes special registers such as pc and fp saved in special
401 ways in the stack frame. sp is even more special:
402 the address we return for it IS the sp for the next frame.
404 Note that on register window machines, we are currently making the
405 assumption that window registers are being saved somewhere in the
406 frame in which they are being used. If they are stored in an
407 inferior frame, find_saved_register will break.
409 On the Sun 4, the only time all registers are saved is when
410 a dummy frame is involved. Otherwise, the only saved registers
411 are the LOCAL and IN registers which are saved as a result
412 of the "save/restore" opcodes. This condition is determined
413 by address rather than by value.
415 The "pc" is not stored in a frame on the SPARC. (What is stored
416 is a return address minus 8.) sparc_pop_frame knows how to
417 deal with that. Other routines might or might not.
419 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
420 about how this works. */
423 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
424 struct frame_info
*fi
;
425 struct frame_saved_regs
*saved_regs_addr
;
428 FRAME_ADDR frame
= read_register (FP_REGNUM
);
429 FRAME fid
= FRAME_INFO_ID (fi
);
432 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
434 bzero (saved_regs_addr
, sizeof (*saved_regs_addr
));
437 if (fi->pc >= frame - CALL_DUMMY_LENGTH - 0x140
438 && fi->pc <= frame) */
440 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
441 read_register (SP_REGNUM
))
442 && fi
->pc
<= FRAME_FP(fi
))
444 /* Dummy frame. All but the window regs are in there somewhere. */
445 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
446 saved_regs_addr
->regs
[regnum
] =
447 frame
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
448 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
449 saved_regs_addr
->regs
[regnum
] =
450 frame
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
451 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
452 saved_regs_addr
->regs
[regnum
] =
453 frame
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
454 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
455 saved_regs_addr
->regs
[regnum
] =
456 frame
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
458 fi
->bottom
: read_register (SP_REGNUM
);
462 /* Normal frame. Just Local and In registers */
464 fi
->bottom
: read_register (SP_REGNUM
);
465 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+16; regnum
++)
466 saved_regs_addr
->regs
[regnum
] = frame
+ (regnum
-L0_REGNUM
) * 4;
470 /* Pull off either the next frame pointer or the stack pointer */
471 FRAME_ADDR next_next_frame
=
474 read_register (SP_REGNUM
));
475 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
476 saved_regs_addr
->regs
[regnum
] = next_next_frame
+ regnum
* 4;
478 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
479 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
482 /* Push an empty stack frame, and record in it the current PC, regs, etc.
484 Note that the write's are of registers in the context of the newly
485 pushed frame. Thus the the fp*'s, the g*'s, the i*'s, and
486 the randoms, of the new frame, are being saved. The locals and outs
487 are new; they don't need to be saved. The i's and l's of
488 the last frame were saved by the do_save_insn in the register
489 file (now on the stack, since a context switch happended imm after).
491 The return pointer register %i7 does not have
492 the pc saved into it (return from this frame will be accomplished
493 by a POP_FRAME). In fact, we must leave it unclobbered, since we
494 must preserve it in the calling routine except across call instructions. */
496 /* Definitely see tm-sparc.h for more doc of the frame format here. */
499 sparc_push_dummy_frame ()
502 char register_temp
[REGISTER_BYTES
];
504 do_save_insn (0x140); /* FIXME where does this value come from? */
505 fp
= read_register (FP_REGNUM
);
507 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
), register_temp
, 32 * 4);
508 write_memory (fp
- 0x80, register_temp
, 32 * 4);
510 read_register_bytes (REGISTER_BYTE (G0_REGNUM
), register_temp
, 8 * 4);
511 write_memory (fp
- 0xa0, register_temp
, 8 * 4);
513 read_register_bytes (REGISTER_BYTE (I0_REGNUM
), register_temp
, 8 * 4);
514 write_memory (fp
- 0xc0, register_temp
, 8 * 4);
516 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
517 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), register_temp
, 8 * 4);
518 write_memory (fp
- 0xe0, register_temp
, 8 * 4);
521 /* Discard from the stack the innermost frame, restoring all saved registers.
523 Note that the values stored in fsr by get_frame_saved_regs are *in
524 the context of the called frame*. What this means is that the i
525 regs of fsr must be restored into the o regs of the (calling) frame that
526 we pop into. We don't care about the output regs of the calling frame,
527 since unless it's a dummy frame, it won't have any output regs in it.
529 We never have to bother with %l (local) regs, since the called routine's
530 locals get tossed, and the calling routine's locals are already saved
533 /* Definitely see tm-sparc.h for more doc of the frame format here. */
538 register FRAME frame
= get_current_frame ();
539 register CORE_ADDR pc
;
540 struct frame_saved_regs fsr
;
541 struct frame_info
*fi
;
542 char raw_buffer
[REGISTER_BYTES
];
544 fi
= get_frame_info (frame
);
545 get_frame_saved_regs (fi
, &fsr
);
547 if (fsr
.regs
[FP0_REGNUM
])
549 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, 32 * 4);
550 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
), raw_buffer
, 32 * 4);
552 if (fsr
.regs
[G1_REGNUM
])
554 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * 4);
555 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
, 7 * 4);
557 if (fsr
.regs
[I0_REGNUM
])
559 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * 4);
560 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
, 8 * 4);
562 if (fsr
.regs
[PS_REGNUM
])
563 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
564 if (fsr
.regs
[Y_REGNUM
])
565 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], 4));
566 if (fsr
.regs
[PC_REGNUM
])
568 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
569 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
], 4));
570 if (fsr
.regs
[NPC_REGNUM
])
571 write_register (NPC_REGNUM
,
572 read_memory_integer (fsr
.regs
[NPC_REGNUM
], 4));
574 else if (fsr
.regs
[I7_REGNUM
])
576 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
577 pc
= PC_ADJUST (read_memory_integer (fsr
.regs
[I7_REGNUM
], 4));
578 write_register (PC_REGNUM
, pc
);
579 write_register (NPC_REGNUM
, pc
+ 4);
581 flush_cached_frames ();
582 set_current_frame ( create_new_frame (read_register (FP_REGNUM
),
586 /* Structure of SPARC extended floating point numbers.
587 This information is not currently used by GDB, since no current SPARC
588 implementations support extended float. */
590 const struct ext_format ext_format_sparc
[] = {
591 /* tot sbyte smask expbyte manbyte */
592 { 16, 0, 0x80, 0,1, 4,8 }, /* sparc */