1 # Copyright 2007-2021 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with this program. If not, see <http://www.gnu.org/licenses/>.
16 if {[gdb_skip_xml_test]} {
17 unsupported "tdesc-regs.exp"
23 # To test adding registers, we need a core set of registers for this
24 # architecture, or the description will be rejected.
29 switch -glob -- [istarget] {
31 set core-regs {aarch64-core.xml}
34 set architecture "arc:ARCv2"
36 set core-regs {v2-core.xml v2-aux.xml}
40 set core-regs {arm-core.xml}
43 set core-regs {m68k-core.xml}
46 set core-regs {mips-cpu.xml mips-cp0.xml mips-fpu.xml mips-dsp.xml}
49 set core-regs {nds32-core.xml}
52 set core-regs {nios2-cpu.xml}
55 set core-regs {or1k-core.xml}
59 set core-regs {power-core.xml}
62 set core-regs {s390-core32.xml s390-acr.xml s390-fpr.xml}
66 set core-regs {sparc32-cpu.xml sparc32-fpu.xml sparc32-cp0.xml}
69 set architecture "sparc:v9"
71 set core-regs {sparc64-cpu.xml sparc64-fpu.xml sparc64-cp0.xml}
74 set core-regs {tic6x-core.xml}
77 set architecture "i386"
79 set core-regs {32bit-core.xml 32bit-sse.xml}
82 set architecture "i386:x86-64"
84 set core-regs {64bit-core.xml 64bit-sse.xml}
88 # If no core registers were specified, assume this target does not
89 # support target-defined registers. Verify that we get a warning if
90 # we try to use them. This not only tests the warning, but also
91 # reminds maintainers to add test support when they add the feature.
93 set single_reg_xml [gdb_remote_download host \
94 "$srcdir/$subdir/single-reg.xml"]
96 if {[string equal ${core-regs} ""]} {
97 gdb_test "set tdesc file $single_reg_xml" \
98 "warning: Target-supplied registers are not supported.*" \
99 "set tdesc file single-reg.xml"
100 unsupported "register tests"
104 # Otherwise, we support both XML and target defined registers.
106 # Make sure we reject a description missing standard registers,
108 gdb_test "set tdesc file $single_reg_xml" \
109 "warning: Architecture rejected target-supplied description" \
110 "set tdesc file single-reg.xml"
112 # Copy the core registers into the objdir if necessary, so that they
113 # will be found by <xi:include>.
114 foreach src ${core-regs} {
115 set remote_filename($src) \
116 [gdb_remote_download host "$srcdir/../features/$regdir$src"]
119 # Similarly, we need to copy files under test into the objdir.
120 proc load_description { file errmsg xml_file } {
126 global remote_filename
128 set regs_file [standard_output_file $xml_file]
130 file delete $regs_file
131 set ifd [open "$srcdir/$subdir/$file" r]
132 set ofd [open $regs_file w]
133 while {[gets $ifd line] >= 0} {
134 if {[regexp {<xi:include href="core-regs.xml"/>} $line]} {
135 if {! [string equal ${architecture} ""]} {
136 puts $ofd " <architecture>${architecture}</architecture>"
138 foreach src ${core-regs} {
139 puts $ofd " <xi:include href=\"$src\"/>"
148 if {[is_remote host]} {
149 set regs_file [remote_download host "$regs_file" $xml_file]
152 # Anchor the test output, so that error messages are detected.
153 set cmd "set tdesc filename [file tail $regs_file]"
154 set msg "set tdesc filename $xml_file - from $file"
155 set cmd_regex [string_to_regexp $cmd]
156 gdb_test_multiple $cmd $msg {
157 -re "^$cmd_regex\r\n$errmsg$gdb_prompt $" {
163 if {![is_remote host]} {
164 gdb_test "cd [standard_output_file {}]" "Working directory .*" \
165 "cd to directory holding xml"
168 load_description "extra-regs.xml" "" "test-extra-regs.xml"
169 gdb_test "ptype \$extrareg" "type = (int32_t|int|long|long long)"
170 gdb_test "ptype \$uintreg" "type = uint32_t"
171 gdb_test "ptype \$vecreg" "type = int8_t __attribute__ \\(\\(vector_size\\(4\\)\\)\\)"
172 gdb_test "ptype \$unionreg" \
173 "type = union vecint {\r\n *v4int8 v4;\r\n *v2int16 v2;\r\n}"
174 gdb_test "ptype \$unionreg.v4" "type = int8_t __attribute__ \\(\\(vector_size\\(4\\)\\)\\)"
175 gdb_test "ptype \$structreg" \
176 "type = struct struct1 {\r\n *v4int8 v4;\r\n *v2int16 v2;\r\n}"
177 gdb_test "ptype \$structreg.v4" "type = int8_t __attribute__ \\(\\(vector_size\\(4\\)\\)\\)"
178 gdb_test "ptype \$bitfields" \
179 "type = struct struct2 {\r\n *uint64_t f1 : 35;\r\n *uint64_t f2 : 1;\r\n}"
180 gdb_test "ptype \$flags" \
181 "type = flag flags {\r\n *bool X @0;\r\n *uint32_t Y @2;\r\n}"
182 gdb_test "ptype \$mixed_flags" \
183 "type = flag mixed_flags {\r\n *bool A @0;\r\n *uint32_t B @1-3;\r\n *bool C @4;\r\n *uint32_t D @5;\r\n *uint32_t @6-7;\r\n *enum Z_values {yes = 1, no = 0, maybe = 2, so} Z @8-9;\r\n}"
184 # Reggroups should have at least general and the extra foo group
185 gdb_test "maintenance print reggroups" \
186 " Group\[ \t\]+Type\[ \t\]+\r\n.* general\[ \t\]+user\[ \t\]+\r\n.* foo\[ \t\]+user\[ \t\]+"
188 with_test_prefix "core-only.xml" {
189 load_description "core-only.xml" "" "test-regs.xml"
190 # The extra register from the previous description should be gone.
191 gdb_test "ptype \$extrareg" "type = void"