1 /* Target-dependent code for the x86-64 for GDB, the GNU debugger.
3 Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
28 #include "frame-base.h"
29 #include "frame-unwind.h"
37 #include "gdb_assert.h"
39 #include "x86-64-tdep.h"
40 #include "i387-tdep.h"
42 /* Register numbers of various important registers. */
44 #define X86_64_RAX_REGNUM 0 /* %rax */
45 #define X86_64_RDX_REGNUM 3 /* %rdx */
46 #define X86_64_RDI_REGNUM 5 /* %rdi */
47 #define X86_64_RBP_REGNUM 6 /* %rbp */
48 #define X86_64_RSP_REGNUM 7 /* %rsp */
49 #define X86_64_RIP_REGNUM 16 /* %rip */
50 #define X86_64_EFLAGS_REGNUM 17 /* %eflags */
51 #define X86_64_ST0_REGNUM 22 /* %st0 */
52 #define X86_64_XMM0_REGNUM 38 /* %xmm0 */
53 #define X86_64_XMM1_REGNUM 39 /* %xmm1 */
55 struct x86_64_register_info
61 static struct x86_64_register_info x86_64_register_info
[] =
63 { "rax", &builtin_type_int64
},
64 { "rbx", &builtin_type_int64
},
65 { "rcx", &builtin_type_int64
},
66 { "rdx", &builtin_type_int64
},
67 { "rsi", &builtin_type_int64
},
68 { "rdi", &builtin_type_int64
},
69 { "rbp", &builtin_type_void_data_ptr
},
70 { "rsp", &builtin_type_void_data_ptr
},
72 /* %r8 is indeed register number 8. */
73 { "r8", &builtin_type_int64
},
74 { "r9", &builtin_type_int64
},
75 { "r10", &builtin_type_int64
},
76 { "r11", &builtin_type_int64
},
77 { "r12", &builtin_type_int64
},
78 { "r13", &builtin_type_int64
},
79 { "r14", &builtin_type_int64
},
80 { "r15", &builtin_type_int64
},
81 { "rip", &builtin_type_void_func_ptr
},
82 { "eflags", &builtin_type_int32
},
83 { "ds", &builtin_type_int32
},
84 { "es", &builtin_type_int32
},
85 { "fs", &builtin_type_int32
},
86 { "gs", &builtin_type_int32
},
88 /* %st0 is register number 22. */
89 { "st0", &builtin_type_i387_ext
},
90 { "st1", &builtin_type_i387_ext
},
91 { "st2", &builtin_type_i387_ext
},
92 { "st3", &builtin_type_i387_ext
},
93 { "st4", &builtin_type_i387_ext
},
94 { "st5", &builtin_type_i387_ext
},
95 { "st6", &builtin_type_i387_ext
},
96 { "st7", &builtin_type_i387_ext
},
97 { "fctrl", &builtin_type_int32
},
98 { "fstat", &builtin_type_int32
},
99 { "ftag", &builtin_type_int32
},
100 { "fiseg", &builtin_type_int32
},
101 { "fioff", &builtin_type_int32
},
102 { "foseg", &builtin_type_int32
},
103 { "fooff", &builtin_type_int32
},
104 { "fop", &builtin_type_int32
},
106 /* %xmm0 is register number 38. */
107 { "xmm0", &builtin_type_v4sf
},
108 { "xmm1", &builtin_type_v4sf
},
109 { "xmm2", &builtin_type_v4sf
},
110 { "xmm3", &builtin_type_v4sf
},
111 { "xmm4", &builtin_type_v4sf
},
112 { "xmm5", &builtin_type_v4sf
},
113 { "xmm6", &builtin_type_v4sf
},
114 { "xmm7", &builtin_type_v4sf
},
115 { "xmm8", &builtin_type_v4sf
},
116 { "xmm9", &builtin_type_v4sf
},
117 { "xmm10", &builtin_type_v4sf
},
118 { "xmm11", &builtin_type_v4sf
},
119 { "xmm12", &builtin_type_v4sf
},
120 { "xmm13", &builtin_type_v4sf
},
121 { "xmm14", &builtin_type_v4sf
},
122 { "xmm15", &builtin_type_v4sf
},
123 { "mxcsr", &builtin_type_int32
}
126 /* Total number of registers. */
127 #define X86_64_NUM_REGS \
128 (sizeof (x86_64_register_info) / sizeof (x86_64_register_info[0]))
130 /* Return the name of register REGNUM. */
133 x86_64_register_name (int regnum
)
135 if (regnum
>= 0 && regnum
< X86_64_NUM_REGS
)
136 return x86_64_register_info
[regnum
].name
;
141 /* Return the GDB type object for the "standard" data type of data in
145 x86_64_register_type (struct gdbarch
*gdbarch
, int regnum
)
147 gdb_assert (regnum
>= 0 && regnum
< X86_64_NUM_REGS
);
149 return *x86_64_register_info
[regnum
].type
;
152 /* DWARF Register Number Mapping as defined in the System V psABI,
155 static int x86_64_dwarf_regmap
[] =
157 /* General Purpose Registers RAX, RDX, RCX, RBX, RSI, RDI. */
158 X86_64_RAX_REGNUM
, X86_64_RDX_REGNUM
, 3, 2,
159 4, X86_64_RDI_REGNUM
,
161 /* Frame Pointer Register RBP. */
164 /* Stack Pointer Register RSP. */
167 /* Extended Integer Registers 8 - 15. */
168 8, 9, 10, 11, 12, 13, 14, 15,
170 /* Return Address RA. Not mapped. */
173 /* SSE Registers 0 - 7. */
174 X86_64_XMM0_REGNUM
+ 0, X86_64_XMM1_REGNUM
,
175 X86_64_XMM0_REGNUM
+ 2, X86_64_XMM0_REGNUM
+ 3,
176 X86_64_XMM0_REGNUM
+ 4, X86_64_XMM0_REGNUM
+ 5,
177 X86_64_XMM0_REGNUM
+ 6, X86_64_XMM0_REGNUM
+ 7,
179 /* Extended SSE Registers 8 - 15. */
180 X86_64_XMM0_REGNUM
+ 8, X86_64_XMM0_REGNUM
+ 9,
181 X86_64_XMM0_REGNUM
+ 10, X86_64_XMM0_REGNUM
+ 11,
182 X86_64_XMM0_REGNUM
+ 12, X86_64_XMM0_REGNUM
+ 13,
183 X86_64_XMM0_REGNUM
+ 14, X86_64_XMM0_REGNUM
+ 15,
185 /* Floating Point Registers 0-7. */
186 X86_64_ST0_REGNUM
+ 0, X86_64_ST0_REGNUM
+ 1,
187 X86_64_ST0_REGNUM
+ 2, X86_64_ST0_REGNUM
+ 3,
188 X86_64_ST0_REGNUM
+ 4, X86_64_ST0_REGNUM
+ 5,
189 X86_64_ST0_REGNUM
+ 6, X86_64_ST0_REGNUM
+ 7
192 static const int x86_64_dwarf_regmap_len
=
193 (sizeof (x86_64_dwarf_regmap
) / sizeof (x86_64_dwarf_regmap
[0]));
195 /* Convert DWARF register number REG to the appropriate register
196 number used by GDB. */
199 x86_64_dwarf_reg_to_regnum (int reg
)
203 if (reg
>= 0 || reg
< x86_64_dwarf_regmap_len
)
204 regnum
= x86_64_dwarf_regmap
[reg
];
207 warning ("Unmapped DWARF Register #%d encountered\n", reg
);
212 /* Return nonzero if a value of type TYPE stored in register REGNUM
213 needs any special handling. */
216 x86_64_convert_register_p (int regnum
, struct type
*type
)
218 return i386_fp_regnum_p (regnum
);
222 /* The returning of values is done according to the special algorithm.
223 Some types are returned in registers an some (big structures) in
224 memory. See the System V psABI for details. */
226 #define MAX_CLASSES 4
228 enum x86_64_reg_class
231 X86_64_INTEGER_CLASS
,
232 X86_64_INTEGERSI_CLASS
,
242 /* Return the union class of CLASS1 and CLASS2.
243 See the System V psABI for details. */
245 static enum x86_64_reg_class
246 merge_classes (enum x86_64_reg_class class1
, enum x86_64_reg_class class2
)
248 /* Rule (a): If both classes are equal, this is the resulting class. */
249 if (class1
== class2
)
252 /* Rule (b): If one of the classes is NO_CLASS, the resulting class
253 is the other class. */
254 if (class1
== X86_64_NO_CLASS
)
256 if (class2
== X86_64_NO_CLASS
)
259 /* Rule (c): If one of the classes is MEMORY, the result is MEMORY. */
260 if (class1
== X86_64_MEMORY_CLASS
|| class2
== X86_64_MEMORY_CLASS
)
261 return X86_64_MEMORY_CLASS
;
263 /* Rule (d): If one of the classes is INTEGER, the result is INTEGER. */
264 if ((class1
== X86_64_INTEGERSI_CLASS
&& class2
== X86_64_SSESF_CLASS
)
265 || (class2
== X86_64_INTEGERSI_CLASS
&& class1
== X86_64_SSESF_CLASS
))
266 return X86_64_INTEGERSI_CLASS
;
267 if (class1
== X86_64_INTEGER_CLASS
|| class1
== X86_64_INTEGERSI_CLASS
268 || class2
== X86_64_INTEGER_CLASS
|| class2
== X86_64_INTEGERSI_CLASS
)
269 return X86_64_INTEGER_CLASS
;
271 /* Rule (e): If one of the classes is X87 or X87UP class, MEMORY is
273 if (class1
== X86_64_X87_CLASS
|| class1
== X86_64_X87UP_CLASS
274 || class2
== X86_64_X87_CLASS
|| class2
== X86_64_X87UP_CLASS
)
275 return X86_64_MEMORY_CLASS
;
277 /* Rule (f): Otherwise class SSE is used. */
278 return X86_64_SSE_CLASS
;
281 /* Classify the argument type. CLASSES will be filled by the register
282 class used to pass each word of the operand. The number of words
283 is returned. In case the parameter should be passed in memory, 0
284 is returned. As a special case for zero sized containers,
285 classes[0] will be NO_CLASS and 1 is returned.
287 See the System V psABI for details. */
290 classify_argument (struct type
*type
,
291 enum x86_64_reg_class classes
[MAX_CLASSES
], int bit_offset
)
293 int bytes
= TYPE_LENGTH (type
);
294 int words
= (bytes
+ 8 - 1) / 8;
296 switch (TYPE_CODE (type
))
298 case TYPE_CODE_ARRAY
:
299 case TYPE_CODE_STRUCT
:
300 case TYPE_CODE_UNION
:
303 enum x86_64_reg_class subclasses
[MAX_CLASSES
];
305 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
309 for (i
= 0; i
< words
; i
++)
310 classes
[i
] = X86_64_NO_CLASS
;
312 /* Zero sized arrays or structures are NO_CLASS. We return 0
313 to signalize memory class, so handle it as special case. */
316 classes
[0] = X86_64_NO_CLASS
;
319 switch (TYPE_CODE (type
))
321 case TYPE_CODE_STRUCT
:
324 for (j
= 0; j
< TYPE_NFIELDS (type
); ++j
)
326 int num
= classify_argument (TYPE_FIELDS (type
)[j
].type
,
328 (TYPE_FIELDS (type
)[j
].loc
.
329 bitpos
+ bit_offset
) % 256);
332 for (i
= 0; i
< num
; i
++)
335 (TYPE_FIELDS (type
)[j
].loc
.bitpos
+
338 merge_classes (subclasses
[i
], classes
[i
+ pos
]);
343 case TYPE_CODE_ARRAY
:
347 num
= classify_argument (TYPE_TARGET_TYPE (type
),
348 subclasses
, bit_offset
);
352 /* The partial classes are now full classes. */
353 if (subclasses
[0] == X86_64_SSESF_CLASS
&& bytes
!= 4)
354 subclasses
[0] = X86_64_SSE_CLASS
;
355 if (subclasses
[0] == X86_64_INTEGERSI_CLASS
&& bytes
!= 4)
356 subclasses
[0] = X86_64_INTEGER_CLASS
;
358 for (i
= 0; i
< words
; i
++)
359 classes
[i
] = subclasses
[i
% num
];
362 case TYPE_CODE_UNION
:
366 for (j
= 0; j
< TYPE_NFIELDS (type
); ++j
)
369 num
= classify_argument (TYPE_FIELDS (type
)[j
].type
,
370 subclasses
, bit_offset
);
373 for (i
= 0; i
< num
; i
++)
374 classes
[i
] = merge_classes (subclasses
[i
], classes
[i
]);
382 /* Final merger cleanup. */
383 for (i
= 0; i
< words
; i
++)
385 /* If one class is MEMORY, everything should be passed in
387 if (classes
[i
] == X86_64_MEMORY_CLASS
)
390 /* The X86_64_SSEUP_CLASS should be always preceeded by
392 if (classes
[i
] == X86_64_SSEUP_CLASS
393 && (i
== 0 || classes
[i
- 1] != X86_64_SSE_CLASS
))
394 classes
[i
] = X86_64_SSE_CLASS
;
396 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
397 if (classes
[i
] == X86_64_X87UP_CLASS
398 && (i
== 0 || classes
[i
- 1] != X86_64_X87_CLASS
))
399 classes
[i
] = X86_64_SSE_CLASS
;
408 if (!(bit_offset
% 64))
409 classes
[0] = X86_64_SSESF_CLASS
;
411 classes
[0] = X86_64_SSE_CLASS
;
414 classes
[0] = X86_64_SSEDF_CLASS
;
417 classes
[0] = X86_64_X87_CLASS
;
418 classes
[1] = X86_64_X87UP_CLASS
;
432 if (bytes
* 8 + bit_offset
<= 32)
433 classes
[0] = X86_64_INTEGERSI_CLASS
;
435 classes
[0] = X86_64_INTEGER_CLASS
;
438 classes
[0] = classes
[1] = X86_64_INTEGER_CLASS
;
445 default: /* Avoid warning. */
448 internal_error (__FILE__
, __LINE__
,
449 "classify_argument: unknown argument type");
452 /* Examine the argument and set *INT_NREGS and *SSE_NREGS to the
453 number of registers required based on the information passed in
454 CLASSES. Return 0 if parameter should be passed in memory. */
457 examine_argument (enum x86_64_reg_class classes
[MAX_CLASSES
],
458 int n
, int *int_nregs
, int *sse_nregs
)
464 for (n
--; n
>= 0; n
--)
467 case X86_64_INTEGER_CLASS
:
468 case X86_64_INTEGERSI_CLASS
:
471 case X86_64_SSE_CLASS
:
472 case X86_64_SSESF_CLASS
:
473 case X86_64_SSEDF_CLASS
:
476 case X86_64_NO_CLASS
:
477 case X86_64_SSEUP_CLASS
:
478 case X86_64_X87_CLASS
:
479 case X86_64_X87UP_CLASS
:
481 case X86_64_MEMORY_CLASS
:
482 internal_error (__FILE__
, __LINE__
,
483 "examine_argument: unexpected memory class");
488 #define RET_INT_REGS 2
489 #define RET_SSE_REGS 2
491 /* Check if the structure in value_type is returned in registers or in
492 memory. If this function returns 1, GDB will call
493 STORE_STRUCT_RETURN and EXTRACT_STRUCT_VALUE_ADDRESS else
494 STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE will be used. */
497 x86_64_use_struct_convention (int gcc_p
, struct type
*value_type
)
499 enum x86_64_reg_class
class[MAX_CLASSES
];
500 int n
= classify_argument (value_type
, class, 0);
505 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
) ||
506 needed_intregs
> RET_INT_REGS
|| needed_sseregs
> RET_SSE_REGS
);
509 /* Extract from an array REGBUF containing the (raw) register state, a
510 function return value of TYPE, and copy that, in virtual format,
514 x86_64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
517 enum x86_64_reg_class
class[MAX_CLASSES
];
518 int n
= classify_argument (type
, class, 0);
524 int ret_int_r
[RET_INT_REGS
] = { X86_64_RAX_REGNUM
, X86_64_RDX_REGNUM
};
525 int ret_sse_r
[RET_SSE_REGS
] = { X86_64_XMM0_REGNUM
, X86_64_XMM1_REGNUM
};
528 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
) ||
529 needed_intregs
> RET_INT_REGS
|| needed_sseregs
> RET_SSE_REGS
)
532 regcache_cooked_read (regcache
, X86_64_RAX_REGNUM
, &addr
);
533 read_memory (addr
, valbuf
, TYPE_LENGTH (type
));
539 for (i
= 0; i
< n
; i
++)
543 case X86_64_NO_CLASS
:
545 case X86_64_INTEGER_CLASS
:
546 regcache_cooked_read (regcache
, ret_int_r
[(intreg
+ 1) / 2],
547 (char *) valbuf
+ offset
);
551 case X86_64_INTEGERSI_CLASS
:
552 regcache_cooked_read_part (regcache
, ret_int_r
[intreg
/ 2],
553 0, 4, (char *) valbuf
+ offset
);
557 case X86_64_SSEDF_CLASS
:
558 case X86_64_SSESF_CLASS
:
559 case X86_64_SSE_CLASS
:
560 regcache_cooked_read_part (regcache
,
561 ret_sse_r
[(ssereg
+ 1) / 2], 0, 8,
562 (char *) valbuf
+ offset
);
566 case X86_64_SSEUP_CLASS
:
567 regcache_cooked_read_part (regcache
, ret_sse_r
[ssereg
/ 2],
568 0, 8, (char *) valbuf
+ offset
);
572 case X86_64_X87_CLASS
:
573 regcache_cooked_read_part (regcache
, X86_64_ST0_REGNUM
,
574 0, 8, (char *) valbuf
+ offset
);
577 case X86_64_X87UP_CLASS
:
578 regcache_cooked_read_part (regcache
, X86_64_ST0_REGNUM
,
579 8, 2, (char *) valbuf
+ offset
);
582 case X86_64_MEMORY_CLASS
:
584 internal_error (__FILE__
, __LINE__
,
585 "Unexpected argument class");
595 x86_64_push_arguments (struct regcache
*regcache
, int nargs
,
596 struct value
**args
, CORE_ADDR sp
)
601 static int int_parameter_registers
[INT_REGS
] =
603 X86_64_RDI_REGNUM
, 4, /* %rdi, %rsi */
604 X86_64_RDX_REGNUM
, 2, /* %rdx, %rcx */
608 static int sse_parameter_registers
[SSE_REGS
] =
610 X86_64_XMM0_REGNUM
+ 0, X86_64_XMM1_REGNUM
,
611 X86_64_XMM0_REGNUM
+ 2, X86_64_XMM0_REGNUM
+ 3,
612 X86_64_XMM0_REGNUM
+ 4, X86_64_XMM0_REGNUM
+ 5,
613 X86_64_XMM0_REGNUM
+ 6, X86_64_XMM0_REGNUM
+ 7,
615 int stack_values_count
= 0;
617 stack_values
= alloca (nargs
* sizeof (int));
618 for (i
= 0; i
< nargs
; i
++)
620 enum x86_64_reg_class
class[MAX_CLASSES
];
621 int n
= classify_argument (args
[i
]->type
, class, 0);
626 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
)
627 || intreg
/ 2 + needed_intregs
> INT_REGS
628 || ssereg
/ 2 + needed_sseregs
> SSE_REGS
)
630 stack_values
[stack_values_count
++] = i
;
636 for (j
= 0; j
< n
; j
++)
640 case X86_64_NO_CLASS
:
642 case X86_64_INTEGER_CLASS
:
643 regcache_cooked_write
644 (regcache
, int_parameter_registers
[(intreg
+ 1) / 2],
645 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
649 case X86_64_INTEGERSI_CLASS
:
651 LONGEST val
= extract_signed_integer
652 (VALUE_CONTENTS_ALL (args
[i
]) + offset
, 4);
653 regcache_cooked_write_signed
654 (regcache
, int_parameter_registers
[intreg
/ 2], val
);
660 case X86_64_SSEDF_CLASS
:
661 case X86_64_SSESF_CLASS
:
662 case X86_64_SSE_CLASS
:
663 regcache_cooked_write
664 (regcache
, sse_parameter_registers
[(ssereg
+ 1) / 2],
665 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
669 case X86_64_SSEUP_CLASS
:
670 regcache_cooked_write
671 (regcache
, sse_parameter_registers
[ssereg
/ 2],
672 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
676 case X86_64_X87_CLASS
:
677 case X86_64_MEMORY_CLASS
:
678 stack_values
[stack_values_count
++] = i
;
680 case X86_64_X87UP_CLASS
:
683 internal_error (__FILE__
, __LINE__
,
684 "Unexpected argument class");
686 intreg
+= intreg
% 2;
687 ssereg
+= ssereg
% 2;
692 /* Push any remaining arguments onto the stack. */
693 while (--stack_values_count
>= 0)
695 struct value
*arg
= args
[stack_values
[stack_values_count
]];
696 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg
));
698 /* Make sure the stack stays eightbyte-aligned. */
699 sp
-= (len
+ 7) & ~7;
700 write_memory (sp
, VALUE_CONTENTS_ALL (arg
), len
);
706 /* Write into the appropriate registers a function return value stored
707 in VALBUF of type TYPE, given in virtual format. */
710 x86_64_store_return_value (struct type
*type
, struct regcache
*regcache
,
713 int len
= TYPE_LENGTH (type
);
715 if (TYPE_CODE_FLT
== TYPE_CODE (type
))
718 char buf
[FPU_REG_RAW_SIZE
];
720 /* Returning floating-point values is a bit tricky. Apart from
721 storing the return value in %st(0), we have to simulate the
722 state of the FPU at function return point. */
724 /* Convert the value found in VALBUF to the extended
725 floating-point format used by the FPU. This is probably
726 not exactly how it would happen on the target itself, but
727 it is the best we can do. */
728 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
729 regcache_raw_write (regcache
, X86_64_ST0_REGNUM
, buf
);
731 /* Set the top of the floating-point register stack to 7. The
732 actual value doesn't really matter, but 7 is what a normal
733 function return would end up with if the program started out
734 with a freshly initialized FPU. */
735 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
737 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
739 /* Mark %st(1) through %st(7) as empty. Since we set the top of
740 the floating-point register stack to 7, the appropriate value
741 for the tag word is 0x3fff. */
742 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
746 int low_size
= REGISTER_RAW_SIZE (0);
747 int high_size
= REGISTER_RAW_SIZE (1);
750 regcache_cooked_write_part (regcache
, 0, 0, len
, valbuf
);
751 else if (len
<= (low_size
+ high_size
))
753 regcache_cooked_write_part (regcache
, 0, 0, low_size
, valbuf
);
754 regcache_cooked_write_part (regcache
, 1, 0,
756 (const char *) valbuf
+ low_size
);
759 internal_error (__FILE__
, __LINE__
,
760 "Cannot store return value of %d bytes long.", len
);
766 x86_64_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
767 struct regcache
*regcache
, CORE_ADDR bp_addr
,
768 int nargs
, struct value
**args
, CORE_ADDR sp
,
769 int struct_return
, CORE_ADDR struct_addr
)
773 /* Pass arguments. */
774 sp
= x86_64_push_arguments (regcache
, nargs
, args
, sp
);
776 /* Pass "hidden" argument". */
779 store_unsigned_integer (buf
, 8, struct_addr
);
780 regcache_cooked_write (regcache
, X86_64_RDI_REGNUM
, buf
);
783 /* Store return address. */
785 store_unsigned_integer (buf
, 8, bp_addr
);
786 write_memory (sp
, buf
, 8);
788 /* Finally, update the stack pointer... */
789 store_unsigned_integer (buf
, 8, sp
);
790 regcache_cooked_write (regcache
, X86_64_RSP_REGNUM
, buf
);
792 /* ...and fake a frame pointer. */
793 regcache_cooked_write (regcache
, X86_64_RBP_REGNUM
, buf
);
799 /* The maximum number of saved registers. This should include %rip. */
800 #define X86_64_NUM_SAVED_REGS X86_64_NUM_GREGS
802 struct x86_64_frame_cache
809 /* Saved registers. */
810 CORE_ADDR saved_regs
[X86_64_NUM_SAVED_REGS
];
813 /* Do we have a frame? */
817 /* Allocate and initialize a frame cache. */
819 static struct x86_64_frame_cache
*
820 x86_64_alloc_frame_cache (void)
822 struct x86_64_frame_cache
*cache
;
825 cache
= FRAME_OBSTACK_ZALLOC (struct x86_64_frame_cache
);
829 cache
->sp_offset
= -8;
832 /* Saved registers. We initialize these to -1 since zero is a valid
833 offset (that's where %rbp is supposed to be stored). */
834 for (i
= 0; i
< X86_64_NUM_SAVED_REGS
; i
++)
835 cache
->saved_regs
[i
] = -1;
838 /* Frameless until proven otherwise. */
839 cache
->frameless_p
= 1;
844 /* Do a limited analysis of the prologue at PC and update CACHE
845 accordingly. Bail out early if CURRENT_PC is reached. Return the
846 address where the analysis stopped.
848 We will handle only functions beginning with:
851 movq %rsp, %rbp 0x48 0x89 0xe5
853 Any function that doesn't start with this sequence will be assumed
854 to have no prologue and thus no valid frame pointer in %rbp. */
857 x86_64_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
858 struct x86_64_frame_cache
*cache
)
860 static unsigned char proto
[3] = { 0x48, 0x89, 0xe5 };
861 unsigned char buf
[3];
864 if (current_pc
<= pc
)
867 op
= read_memory_unsigned_integer (pc
, 1);
869 if (op
== 0x55) /* pushq %rbp */
871 /* Take into account that we've executed the `pushq %rbp' that
872 starts this instruction sequence. */
873 cache
->saved_regs
[X86_64_RBP_REGNUM
] = 0;
874 cache
->sp_offset
+= 8;
876 /* If that's all, return now. */
877 if (current_pc
<= pc
+ 1)
880 /* Check for `movq %rsp, %rbp'. */
881 read_memory (pc
+ 1, buf
, 3);
882 if (memcmp (buf
, proto
, 3) != 0)
885 /* OK, we actually have a frame. */
886 cache
->frameless_p
= 0;
893 /* Return PC of first real instruction. */
896 x86_64_skip_prologue (CORE_ADDR start_pc
)
898 struct x86_64_frame_cache cache
;
901 pc
= x86_64_analyze_prologue (start_pc
, 0xffffffffffffffff, &cache
);
902 if (cache
.frameless_p
)
911 static struct x86_64_frame_cache
*
912 x86_64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
914 struct x86_64_frame_cache
*cache
;
921 cache
= x86_64_alloc_frame_cache ();
924 frame_unwind_register (next_frame
, X86_64_RBP_REGNUM
, buf
);
925 cache
->base
= extract_unsigned_integer (buf
, 8);
926 if (cache
->base
== 0)
929 /* For normal frames, %rip is stored at 8(%rbp). */
930 cache
->saved_regs
[X86_64_RIP_REGNUM
] = 8;
932 cache
->pc
= frame_func_unwind (next_frame
);
934 x86_64_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
936 if (cache
->frameless_p
)
938 /* We didn't find a valid frame, which means that CACHE->base
939 currently holds the frame pointer for our calling frame. If
940 we're at the start of a function, or somewhere half-way its
941 prologue, the function's frame probably hasn't been fully
942 setup yet. Try to reconstruct the base address for the stack
943 frame by looking at the stack pointer. For truly "frameless"
944 functions this might work too. */
946 frame_unwind_register (next_frame
, X86_64_RSP_REGNUM
, buf
);
947 cache
->base
= extract_unsigned_integer (buf
, 8) + cache
->sp_offset
;
950 /* Now that we have the base address for the stack frame we can
951 calculate the value of %rsp in the calling frame. */
952 cache
->saved_sp
= cache
->base
+ 16;
954 /* Adjust all the saved registers such that they contain addresses
955 instead of offsets. */
956 for (i
= 0; i
< X86_64_NUM_SAVED_REGS
; i
++)
957 if (cache
->saved_regs
[i
] != -1)
958 cache
->saved_regs
[i
] += cache
->base
;
964 x86_64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
965 struct frame_id
*this_id
)
967 struct x86_64_frame_cache
*cache
=
968 x86_64_frame_cache (next_frame
, this_cache
);
970 /* This marks the outermost frame. */
971 if (cache
->base
== 0)
974 (*this_id
) = frame_id_build (cache
->base
+ 16, cache
->pc
);
978 x86_64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
979 int regnum
, int *optimizedp
,
980 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
981 int *realnump
, void *valuep
)
983 struct x86_64_frame_cache
*cache
=
984 x86_64_frame_cache (next_frame
, this_cache
);
986 gdb_assert (regnum
>= 0);
988 if (regnum
== SP_REGNUM
&& cache
->saved_sp
)
996 /* Store the value. */
997 store_unsigned_integer (valuep
, 8, cache
->saved_sp
);
1002 if (regnum
< X86_64_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
1005 *lvalp
= lval_memory
;
1006 *addrp
= cache
->saved_regs
[regnum
];
1010 /* Read the value in from memory. */
1011 read_memory (*addrp
, valuep
,
1012 register_size (current_gdbarch
, regnum
));
1017 frame_register_unwind (next_frame
, regnum
,
1018 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1021 static const struct frame_unwind x86_64_frame_unwind
=
1024 x86_64_frame_this_id
,
1025 x86_64_frame_prev_register
1028 static const struct frame_unwind
*
1029 x86_64_frame_p (CORE_ADDR pc
)
1031 return &x86_64_frame_unwind
;
1035 /* Signal trampolines. */
1037 /* FIXME: kettenis/20030419: Perhaps, we can unify the 32-bit and
1038 64-bit variants. This would require using identical frame caches
1039 on both platforms. */
1041 static struct x86_64_frame_cache
*
1042 x86_64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1044 struct x86_64_frame_cache
*cache
;
1045 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1053 cache
= x86_64_alloc_frame_cache ();
1055 frame_unwind_register (next_frame
, X86_64_RSP_REGNUM
, buf
);
1056 cache
->base
= extract_unsigned_integer (buf
, 8) - 8;
1058 addr
= tdep
->sigcontext_addr (next_frame
);
1059 gdb_assert (tdep
->sc_reg_offset
);
1060 gdb_assert (tdep
->sc_num_regs
<= X86_64_NUM_SAVED_REGS
);
1061 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1062 if (tdep
->sc_reg_offset
[i
] != -1)
1063 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1065 *this_cache
= cache
;
1070 x86_64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1071 void **this_cache
, struct frame_id
*this_id
)
1073 struct x86_64_frame_cache
*cache
=
1074 x86_64_sigtramp_frame_cache (next_frame
, this_cache
);
1076 (*this_id
) = frame_id_build (cache
->base
+ 16, frame_pc_unwind (next_frame
));
1080 x86_64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1082 int regnum
, int *optimizedp
,
1083 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1084 int *realnump
, void *valuep
)
1086 /* Make sure we've initialized the cache. */
1087 x86_64_sigtramp_frame_cache (next_frame
, this_cache
);
1089 x86_64_frame_prev_register (next_frame
, this_cache
, regnum
,
1090 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1093 static const struct frame_unwind x86_64_sigtramp_frame_unwind
=
1096 x86_64_sigtramp_frame_this_id
,
1097 x86_64_sigtramp_frame_prev_register
1100 static const struct frame_unwind
*
1101 x86_64_sigtramp_frame_p (CORE_ADDR pc
)
1105 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1106 if (PC_IN_SIGTRAMP (pc
, name
))
1108 gdb_assert (gdbarch_tdep (current_gdbarch
)->sigcontext_addr
);
1110 return &x86_64_sigtramp_frame_unwind
;
1118 x86_64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1120 struct x86_64_frame_cache
*cache
=
1121 x86_64_frame_cache (next_frame
, this_cache
);
1126 static const struct frame_base x86_64_frame_base
=
1128 &x86_64_frame_unwind
,
1129 x86_64_frame_base_address
,
1130 x86_64_frame_base_address
,
1131 x86_64_frame_base_address
1134 static struct frame_id
1135 x86_64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1140 frame_unwind_register (next_frame
, X86_64_RBP_REGNUM
, buf
);
1141 fp
= extract_unsigned_integer (buf
, 8);
1143 return frame_id_build (fp
+ 16, frame_pc_unwind (next_frame
));
1147 x86_64_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1149 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1151 /* The x86-64 has 16 SSE registers. */
1152 tdep
->num_xmm_regs
= 16;
1154 /* This is what all the fuss is about. */
1155 set_gdbarch_long_bit (gdbarch
, 64);
1156 set_gdbarch_long_long_bit (gdbarch
, 64);
1157 set_gdbarch_ptr_bit (gdbarch
, 64);
1159 /* In contrast to the i386, on the x86-64 a `long double' actually
1160 takes up 128 bits, even though it's still based on the i387
1161 extended floating-point format which has only 80 significant bits. */
1162 set_gdbarch_long_double_bit (gdbarch
, 128);
1164 set_gdbarch_num_regs (gdbarch
, X86_64_NUM_REGS
);
1165 set_gdbarch_register_name (gdbarch
, x86_64_register_name
);
1166 set_gdbarch_register_type (gdbarch
, x86_64_register_type
);
1168 /* Register numbers of various important registers. */
1169 set_gdbarch_sp_regnum (gdbarch
, X86_64_RSP_REGNUM
); /* %rsp */
1170 set_gdbarch_pc_regnum (gdbarch
, X86_64_RIP_REGNUM
); /* %rip */
1171 set_gdbarch_ps_regnum (gdbarch
, X86_64_EFLAGS_REGNUM
); /* %eflags */
1172 set_gdbarch_fp0_regnum (gdbarch
, X86_64_ST0_REGNUM
); /* %st(0) */
1174 /* The "default" register numbering scheme for the x86-64 is
1175 referred to as the "DWARF Register Number Mapping" in the System
1176 V psABI. The preferred debugging format for all known x86-64
1177 targets is actually DWARF2, and GCC doesn't seem to support DWARF
1178 (that is DWARF-1), but we provide the same mapping just in case.
1179 This mapping is also used for stabs, which GCC does support. */
1180 set_gdbarch_stab_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1181 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1182 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1184 /* We don't override SDB_REG_RO_REGNUM, since COFF doesn't seem to
1185 be in use on any of the supported x86-64 targets. */
1187 /* Call dummy code. */
1188 set_gdbarch_push_dummy_call (gdbarch
, x86_64_push_dummy_call
);
1190 set_gdbarch_convert_register_p (gdbarch
, x86_64_convert_register_p
);
1191 set_gdbarch_register_to_value (gdbarch
, i387_register_to_value
);
1192 set_gdbarch_value_to_register (gdbarch
, i387_value_to_register
);
1194 set_gdbarch_extract_return_value (gdbarch
, x86_64_extract_return_value
);
1195 set_gdbarch_store_return_value (gdbarch
, x86_64_store_return_value
);
1196 /* Override, since this is handled by x86_64_extract_return_value. */
1197 set_gdbarch_extract_struct_value_address (gdbarch
, NULL
);
1198 set_gdbarch_use_struct_convention (gdbarch
, x86_64_use_struct_convention
);
1200 set_gdbarch_skip_prologue (gdbarch
, x86_64_skip_prologue
);
1202 /* Avoid wiring in the MMX registers for now. */
1203 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
1205 set_gdbarch_unwind_dummy_id (gdbarch
, x86_64_unwind_dummy_id
);
1207 /* FIXME: kettenis/20021026: This is ELF-specific. Fine for now,
1208 since all supported x86-64 targets are ELF, but that might change
1210 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1212 frame_unwind_append_predicate (gdbarch
, x86_64_sigtramp_frame_p
);
1213 frame_unwind_append_predicate (gdbarch
, x86_64_frame_p
);
1214 frame_base_set_default (gdbarch
, &x86_64_frame_base
);
1218 #define I387_FISEG_REGNUM FISEG_REGNUM
1219 #define I387_FOSEG_REGNUM FOSEG_REGNUM
1221 /* The 64-bit FXSAVE format differs from the 32-bit format in the
1222 sense that the instruction pointer and data pointer are simply
1223 64-bit offsets into the code segment and the data segment instead
1224 of a selector offset pair. The functions below store the upper 32
1225 bits of these pointers (instead of just the 16-bits of the segment
1228 /* Fill GDB's register array with the floating-point and SSE register
1229 values in *FXSAVE. This function masks off any of the reserved
1233 x86_64_supply_fxsave (char *fxsave
)
1235 i387_supply_fxsave (fxsave
);
1239 supply_register (I387_FISEG_REGNUM
, fxsave
+ 12);
1240 supply_register (I387_FOSEG_REGNUM
, fxsave
+ 20);
1244 /* Fill register REGNUM (if it is a floating-point or SSE register) in
1245 *FXSAVE with the value in GDB's register array. If REGNUM is -1, do
1246 this for all registers. This function doesn't touch any of the
1247 reserved bits in *FXSAVE. */
1250 x86_64_fill_fxsave (char *fxsave
, int regnum
)
1252 i387_fill_fxsave (fxsave
, regnum
);
1254 if (regnum
== -1 || regnum
== I387_FISEG_REGNUM
)
1255 regcache_collect (I387_FISEG_REGNUM
, fxsave
+ 12);
1256 if (regnum
== -1 || regnum
== I387_FOSEG_REGNUM
)
1257 regcache_collect (I387_FOSEG_REGNUM
, fxsave
+ 20);