1 /* Target-dependent code for the Z80.
3 Copyright (C) 1986-2021 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
24 #include "frame-unwind.h"
25 #include "frame-base.h"
26 #include "trad-frame.h"
35 #include "features/z80.c"
37 /* You need to define __gdb_break_handler symbol pointing to the breakpoint
38 handler. The value of the symbol will be used to determine the instruction
39 for software breakpoint. If __gdb_break_handler points to one of standard
40 RST addresses (0x00, 0x08, 0x10,... 0x38) then RST __gdb_break_handler
41 instruction will be used, else CALL __gdb_break_handler
44 .globl __gdb_break_handler
51 /* Meaning of terms "previous" and "next":
52 previous frame - frame of callee, which is called by current function
53 current frame - frame of current function which has called callee
54 next frame - frame of caller, which has called current function
57 struct z80_gdbarch_tdep
: gdbarch_tdep
59 /* Number of bytes used for address:
60 2 bytes for all Z80 family
61 3 bytes for eZ80 CPUs operating in ADL mode */
65 struct type
*void_type
= nullptr;
67 /* Type for a function returning void. */
68 struct type
*func_void_type
= nullptr;
70 /* Type for a pointer to a function. Used for the type of PC. */
71 struct type
*pc_type
= nullptr;
74 /* At any time stack frame contains following parts:
76 [<temporaries, y bytes>]
77 [<local variables, x bytes>
79 [<saved state (critical or interrupt functions), 2 or 10 bytes>]
80 In simplest case <next PC> is pointer to the call instruction
81 (or call __call_hl). There are more difficult cases: interrupt handler or
82 push/ret and jp; but they are untrackable.
85 struct z80_unwind_cache
87 /* The previous frame's inner most stack address (SP after call executed),
88 it is current frame's frame_id. */
91 /* Size of the frame, prev_sp + size = next_frame.prev_sp */
94 /* size of saved state (including frame pointer and return address),
95 assume: prev_sp + size = IX + state_size */
100 int called
:1; /* there is return address on stack */
101 int load_args
:1; /* prologues loads args using POPs */
102 int fp_sdcc
:1; /* prologue saves and adjusts frame pointer IX */
103 int interrupt
:1; /* __interrupt handler */
104 int critical
:1; /* __critical function */
107 /* Table indicating the location of each and every register. */
108 struct trad_frame_saved_reg
*saved_regs
;
111 enum instruction_type
136 insn_ld_sp_6nn9
, /* ld sp, (nn) */
138 insn_force_nop
/* invalid opcode prefix */
145 gdb_byte size
; /* without prefix(es) */
146 enum instruction_type type
;
151 static const struct insn_info
*
152 z80_get_insn_info (struct gdbarch
*gdbarch
, const gdb_byte
*buf
, int *size
);
154 static const char *z80_reg_names
[] =
156 /* 24 bit on eZ80, else 16 bit */
157 "af", "bc", "de", "hl",
158 "sp", "pc", "ix", "iy",
159 "af'", "bc'", "de'", "hl'",
165 /* Return the name of register REGNUM. */
167 z80_register_name (struct gdbarch
*gdbarch
, int regnum
)
169 if (regnum
>= 0 && regnum
< ARRAY_SIZE (z80_reg_names
))
170 return z80_reg_names
[regnum
];
175 /* Return the type of a register specified by the architecture. Only
176 the register cache should call this function directly; others should
177 use "register_type". */
179 z80_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
181 return builtin_type (gdbarch
)->builtin_data_ptr
;
184 /* The next 2 functions check BUF for instruction. If it is pop/push rr, then
185 it returns register number OR'ed with 0x100 */
187 z80_is_pop_rr (const gdb_byte buf
[], int *size
)
193 return Z80_BC_REGNUM
| 0x100;
196 return Z80_DE_REGNUM
| 0x100;
199 return Z80_HL_REGNUM
| 0x100;
202 return Z80_AF_REGNUM
| 0x100;
205 return (buf
[1] == 0xe1) ? (Z80_IX_REGNUM
| 0x100) : 0;
208 return (buf
[1] == 0xe1) ? (Z80_IY_REGNUM
| 0x100) : 0;
215 z80_is_push_rr (const gdb_byte buf
[], int *size
)
221 return Z80_BC_REGNUM
| 0x100;
224 return Z80_DE_REGNUM
| 0x100;
227 return Z80_HL_REGNUM
| 0x100;
230 return Z80_AF_REGNUM
| 0x100;
233 return (buf
[1] == 0xe5) ? (Z80_IX_REGNUM
| 0x100) : 0;
236 return (buf
[1] == 0xe5) ? (Z80_IY_REGNUM
| 0x100) : 0;
242 /* Function: z80_scan_prologue
244 This function decodes a function prologue to determine:
245 1) the size of the stack frame
246 2) which registers are saved on it
247 3) the offsets of saved regs
248 This information is stored in the z80_unwind_cache structure.
249 Small SDCC functions may just load args using POP instructions in prologue:
258 SDCC function prologue may have up to 3 sections (all are optional):
260 a) __critical functions:
264 b) __interrupt (both int and nmi) functions:
270 2) save and adjust frame pointer
271 a) call to special function (size optimization)
272 call ___sdcc_enter_ix
273 b) inline (speed optimization)
277 c) without FP, but saving it (IX is optimized out)
279 3) allocate local variables
280 a) via series of PUSH AF and optional DEC SP (size optimization)
284 dec sp ;optional, if allocated odd numbers of bytes
289 c) via addition (for large frames: 5+ for speed and 9+ for size opt.)
290 ld hl, #xxxx ;size of stack frame
293 d) same, but using register IY (arrays or for __z88dk_fastcall functions)
294 ld iy, #xxxx ;size of stack frame
297 e) same as c, but for eZ80
300 f) same as d, but for eZ80
306 z80_scan_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc_beg
, CORE_ADDR pc_end
,
307 struct z80_unwind_cache
*info
)
309 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
310 z80_gdbarch_tdep
*tdep
= (z80_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
311 int addr_len
= tdep
->addr_length
;
312 gdb_byte prologue
[32]; /* max prologue is 24 bytes: __interrupt with local array */
318 len
= pc_end
- pc_beg
;
319 if (len
> (int)sizeof (prologue
))
320 len
= sizeof (prologue
);
322 read_memory (pc_beg
, prologue
, len
);
324 /* stage0: check for series of POPs and then PUSHs */
325 if ((reg
= z80_is_pop_rr(prologue
, &pos
)))
329 gdb_byte regs
[8]; /* Z80 have only 6 register pairs */
330 regs
[0] = reg
& 0xff;
331 for (i
= 1; i
< 8 && (regs
[i
] = z80_is_pop_rr (&prologue
[pos
], &size
));
333 /* now we expect series of PUSHs in reverse order */
334 for (--i
; i
>= 0 && regs
[i
] == z80_is_push_rr (&prologue
[pos
], &size
);
336 if (i
== -1 && pos
> 0)
337 info
->prologue_type
.load_args
= 1;
341 /* stage1: check for __interrupt handlers and __critical functions */
342 else if (!memcmp (&prologue
[pos
], "\355\127\363\365", 4))
343 { /* ld a, i; di; push af */
344 info
->prologue_type
.critical
= 1;
346 info
->state_size
+= addr_len
;
348 else if (!memcmp (&prologue
[pos
], "\365\305\325\345\375\345", 6))
349 { /* push af; push bc; push de; push hl; push iy */
350 info
->prologue_type
.interrupt
= 1;
352 info
->state_size
+= addr_len
* 5;
355 /* stage2: check for FP saving scheme */
356 if (prologue
[pos
] == 0xcd) /* call nn */
358 struct bound_minimal_symbol msymbol
;
359 msymbol
= lookup_minimal_symbol ("__sdcc_enter_ix", NULL
, NULL
);
362 value
= BMSYMBOL_VALUE_ADDRESS (msymbol
);
363 if (value
== extract_unsigned_integer (&prologue
[pos
+1], addr_len
, byte_order
))
366 info
->prologue_type
.fp_sdcc
= 1;
370 else if (!memcmp (&prologue
[pos
], "\335\345\335\041\000\000", 4+addr_len
) &&
371 !memcmp (&prologue
[pos
+4+addr_len
], "\335\071\335\371", 4))
372 { /* push ix; ld ix, #0; add ix, sp; ld sp, ix */
373 pos
+= 4 + addr_len
+ 4;
374 info
->prologue_type
.fp_sdcc
= 1;
376 else if (!memcmp (&prologue
[pos
], "\335\345", 2))
379 info
->prologue_type
.fp_sdcc
= 1;
382 /* stage3: check for local variables allocation */
383 switch (prologue
[pos
])
385 case 0xf5: /* push af */
387 while (prologue
[pos
] == 0xf5)
389 info
->size
+= addr_len
;
392 if (prologue
[pos
] == 0x3b) /* dec sp */
398 case 0x3b: /* dec sp */
400 while (prologue
[pos
] == 0x3b)
406 case 0x21: /*ld hl, -nn */
407 if (prologue
[pos
+addr_len
] == 0x39 && prologue
[pos
+addr_len
] >= 0x80 &&
408 prologue
[pos
+addr_len
+1] == 0xf9)
409 { /* add hl, sp; ld sp, hl */
410 info
->size
= -extract_signed_integer(&prologue
[pos
+1], addr_len
, byte_order
);
411 pos
+= 1 + addr_len
+ 2;
414 case 0xfd: /* ld iy, -nn */
415 if (prologue
[pos
+1] == 0x21 && prologue
[pos
+1+addr_len
] >= 0x80 &&
416 !memcmp (&prologue
[pos
+2+addr_len
], "\375\071\375\371", 4))
418 info
->size
= -extract_signed_integer(&prologue
[pos
+2], addr_len
, byte_order
);
419 pos
+= 2 + addr_len
+ 4;
422 case 0xed: /* check for lea xx, ix - n */
423 switch (prologue
[pos
+1])
425 case 0x22: /* lea hl, ix - n */
426 if (prologue
[pos
+2] >= 0x80 && prologue
[pos
+3] == 0xf9)
428 info
->size
= -extract_signed_integer(&prologue
[pos
+2], 1, byte_order
);
432 case 0x55: /* lea iy, ix - n */
433 if (prologue
[pos
+2] >= 0x80 && prologue
[pos
+3] == 0xfd &&
434 prologue
[pos
+4] == 0xf9)
436 info
->size
= -extract_signed_integer(&prologue
[pos
+2], 1, byte_order
);
445 if (info
->prologue_type
.interrupt
)
447 info
->saved_regs
[Z80_AF_REGNUM
].set_addr (len
++);
448 info
->saved_regs
[Z80_BC_REGNUM
].set_addr (len
++);
449 info
->saved_regs
[Z80_DE_REGNUM
].set_addr (len
++);
450 info
->saved_regs
[Z80_HL_REGNUM
].set_addr (len
++);
451 info
->saved_regs
[Z80_IY_REGNUM
].set_addr (len
++);
454 if (info
->prologue_type
.critical
)
455 len
++; /* just skip IFF2 saved state */
457 if (info
->prologue_type
.fp_sdcc
)
458 info
->saved_regs
[Z80_IX_REGNUM
].set_addr (len
++);
460 info
->state_size
+= len
* addr_len
;
466 z80_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
468 CORE_ADDR func_addr
, func_end
;
469 CORE_ADDR prologue_end
;
471 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
474 prologue_end
= skip_prologue_using_sal (gdbarch
, func_addr
);
475 if (prologue_end
!= 0)
476 return std::max (pc
, prologue_end
);
479 struct z80_unwind_cache info
= {0};
480 struct trad_frame_saved_reg saved_regs
[Z80_NUM_REGS
];
482 info
.saved_regs
= saved_regs
;
484 /* Need to run the prologue scanner to figure out if the function has a
487 prologue_end
= z80_scan_prologue (gdbarch
, func_addr
, func_end
, &info
);
489 if (info
.prologue_type
.fp_sdcc
|| info
.prologue_type
.interrupt
||
490 info
.prologue_type
.critical
)
491 return std::max (pc
, prologue_end
);
494 if (prologue_end
!= 0)
496 struct symtab_and_line prologue_sal
= find_pc_line (func_addr
, 0);
497 struct compunit_symtab
*compunit
= SYMTAB_COMPUNIT (prologue_sal
.symtab
);
498 const char *debug_format
= COMPUNIT_DEBUGFORMAT (compunit
);
500 if (debug_format
!= NULL
&&
501 !strncasecmp ("dwarf", debug_format
, strlen("dwarf")))
502 return std::max (pc
, prologue_end
);
508 /* Return the return-value convention that will be used by FUNCTION
509 to return a value of type VALTYPE. FUNCTION may be NULL in which
510 case the return convention is computed based only on VALTYPE.
512 If READBUF is not NULL, extract the return value and save it in this buffer.
514 If WRITEBUF is not NULL, it contains a return value which will be
515 stored into the appropriate register. This can be used when we want
516 to force the value returned by a function (see the "return" command
518 static enum return_value_convention
519 z80_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
520 struct type
*valtype
, struct regcache
*regcache
,
521 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
523 /* Byte are returned in L, word in HL, dword in DEHL. */
524 int len
= TYPE_LENGTH (valtype
);
526 if ((valtype
->code () == TYPE_CODE_STRUCT
527 || valtype
->code () == TYPE_CODE_UNION
528 || valtype
->code () == TYPE_CODE_ARRAY
)
530 return RETURN_VALUE_STRUCT_CONVENTION
;
532 if (writebuf
!= NULL
)
536 regcache
->cooked_write_part (Z80_DE_REGNUM
, 0, len
- 2, writebuf
+2);
539 regcache
->cooked_write_part (Z80_HL_REGNUM
, 0, len
, writebuf
);
546 regcache
->cooked_read_part (Z80_DE_REGNUM
, 0, len
- 2, readbuf
+2);
549 regcache
->cooked_read_part (Z80_HL_REGNUM
, 0, len
, readbuf
);
552 return RETURN_VALUE_REGISTER_CONVENTION
;
555 /* function unwinds current stack frame and returns next one */
556 static struct z80_unwind_cache
*
557 z80_frame_unwind_cache (struct frame_info
*this_frame
,
558 void **this_prologue_cache
)
560 CORE_ADDR start_pc
, current_pc
;
563 gdb_byte buf
[sizeof(void*)];
564 struct z80_unwind_cache
*info
;
565 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
566 z80_gdbarch_tdep
*tdep
= (z80_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
567 int addr_len
= tdep
->addr_length
;
569 if (*this_prologue_cache
)
570 return (struct z80_unwind_cache
*) *this_prologue_cache
;
572 info
= FRAME_OBSTACK_ZALLOC (struct z80_unwind_cache
);
573 memset (info
, 0, sizeof (*info
));
574 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
575 *this_prologue_cache
= info
;
577 start_pc
= get_frame_func (this_frame
);
578 current_pc
= get_frame_pc (this_frame
);
579 if ((start_pc
> 0) && (start_pc
<= current_pc
))
580 z80_scan_prologue (get_frame_arch (this_frame
),
581 start_pc
, current_pc
, info
);
583 if (info
->prologue_type
.fp_sdcc
)
585 /* With SDCC standard prologue, IX points to the end of current frame
586 (where previous frame pointer and state are saved). */
587 this_base
= get_frame_register_unsigned (this_frame
, Z80_IX_REGNUM
);
588 info
->prev_sp
= this_base
+ info
->size
;
594 CORE_ADDR sp_mask
= (1 << gdbarch_ptr_bit(gdbarch
)) - 1;
595 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
596 /* Assume that the FP is this frame's SP but with that pushed
597 stack space added back. */
598 this_base
= get_frame_register_unsigned (this_frame
, Z80_SP_REGNUM
);
599 sp
= this_base
+ info
->size
;
604 { /* overflow, looks like end of stack */
605 sp
= this_base
+ info
->size
;
608 /* find return address */
609 read_memory (sp
, buf
, addr_len
);
610 addr
= extract_unsigned_integer(buf
, addr_len
, byte_order
);
611 read_memory (addr
-addr_len
-1, buf
, addr_len
+1);
612 if (buf
[0] == 0xcd || (buf
[0] & 0307) == 0304) /* Is it CALL */
613 { /* CALL nn or CALL cc,nn */
614 static const char *names
[] =
616 "__sdcc_call_ix", "__sdcc_call_iy", "__sdcc_call_hl"
618 addr
= extract_unsigned_integer(buf
+1, addr_len
, byte_order
);
619 if (addr
== start_pc
)
621 for (i
= sizeof(names
)/sizeof(*names
)-1; i
>= 0; --i
)
623 struct bound_minimal_symbol msymbol
;
624 msymbol
= lookup_minimal_symbol (names
[i
], NULL
, NULL
);
627 if (addr
== BMSYMBOL_VALUE_ADDRESS (msymbol
))
635 continue; /* it is not call_nn, call_cc_nn */
640 /* Adjust all the saved registers so that they contain addresses and not
642 for (i
= 0; i
< gdbarch_num_regs (gdbarch
) - 1; i
++)
643 if (info
->saved_regs
[i
].addr () > 0)
644 info
->saved_regs
[i
].set_addr
645 (info
->prev_sp
- info
->saved_regs
[i
].addr () * addr_len
);
647 /* Except for the startup code, the return PC is always saved on
648 the stack and is at the base of the frame. */
649 info
->saved_regs
[Z80_PC_REGNUM
].set_addr (info
->prev_sp
);
651 /* The previous frame's SP needed to be computed. Save the computed
653 info
->saved_regs
[Z80_SP_REGNUM
].set_value (info
->prev_sp
+ addr_len
);
657 /* Given a GDB frame, determine the address of the calling function's
658 frame. This will be used to create a new GDB frame struct. */
660 z80_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
661 struct frame_id
*this_id
)
664 struct z80_unwind_cache
*info
;
668 /* The FUNC is easy. */
669 func
= get_frame_func (this_frame
);
671 info
= z80_frame_unwind_cache (this_frame
, this_cache
);
672 /* Hopefully the prologue analysis either correctly determined the
673 frame's base (which is the SP from the previous frame), or set
674 that base to "NULL". */
675 base
= info
->prev_sp
;
679 id
= frame_id_build (base
, func
);
683 static struct value
*
684 z80_frame_prev_register (struct frame_info
*this_frame
,
685 void **this_prologue_cache
, int regnum
)
687 struct z80_unwind_cache
*info
688 = z80_frame_unwind_cache (this_frame
, this_prologue_cache
);
690 if (regnum
== Z80_PC_REGNUM
)
692 if (info
->saved_regs
[Z80_PC_REGNUM
].is_addr ())
694 /* Reading the return PC from the PC register is slightly
698 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
699 z80_gdbarch_tdep
*tdep
= (z80_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
700 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
702 read_memory (info
->saved_regs
[Z80_PC_REGNUM
].addr (),
703 buf
, tdep
->addr_length
);
704 pc
= extract_unsigned_integer (buf
, tdep
->addr_length
, byte_order
);
705 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
708 return frame_unwind_got_optimized (this_frame
, regnum
);
711 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
714 /* Return the breakpoint kind for this target based on *PCPTR. */
716 z80_breakpoint_kind_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
)
718 static int addr
= -1;
721 struct bound_minimal_symbol bh
;
722 bh
= lookup_minimal_symbol ("_break_handler", NULL
, NULL
);
724 addr
= BMSYMBOL_VALUE_ADDRESS (bh
);
727 warning(_("Unable to determine inferior's software breakpoint type: "
728 "couldn't find `_break_handler' function in inferior. Will "
729 "be used default software breakpoint instruction RST 0x08."));
736 /* Return the software breakpoint from KIND. KIND is just address of breakpoint
737 handler. If address is on of standard RSTs, then RST n instruction is used
739 SIZE is set to the software breakpoint's length in memory. */
740 static const gdb_byte
*
741 z80_sw_breakpoint_from_kind (struct gdbarch
*gdbarch
, int kind
, int *size
)
743 static gdb_byte break_insn
[8];
745 if ((kind
& 070) == kind
)
747 break_insn
[0] = kind
| 0307;
750 else /* kind is non-RST address, use CALL instead, but it is dungerous */
752 z80_gdbarch_tdep
*tdep
= (z80_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
753 gdb_byte
*p
= break_insn
;
755 *p
++ = (kind
>> 0) & 0xff;
756 *p
++ = (kind
>> 8) & 0xff;
757 if (tdep
->addr_length
> 2)
758 *p
++ = (kind
>> 16) & 0xff;
759 *size
= p
- break_insn
;
764 /* Return a vector of addresses on which the software single step
765 breakpoints should be inserted. NULL means software single step is
767 Only one breakpoint address will be returned: conditional branches
768 will be always evaluated. */
769 static std::vector
<CORE_ADDR
>
770 z80_software_single_step (struct regcache
*regcache
)
772 static const int flag_mask
[] = {1 << 6, 1 << 0, 1 << 2, 1 << 7};
778 const struct insn_info
*info
;
779 std::vector
<CORE_ADDR
> ret (1);
780 struct gdbarch
*gdbarch
= target_gdbarch ();
782 regcache
->cooked_read (Z80_PC_REGNUM
, &addr
);
783 read_memory (addr
, buf
, sizeof(buf
));
784 info
= z80_get_insn_info (gdbarch
, buf
, &size
);
785 ret
[0] = addr
+ size
;
786 if (info
== NULL
) /* possible in case of double prefix */
787 { /* forced NOP, TODO: replace by NOP */
790 opcode
= buf
[size
- info
->size
]; /* take opcode instead of prefix */
791 /* stage 1: check for conditions */
795 regcache
->cooked_read (Z80_BC_REGNUM
, &t
);
796 if ((t
& 0xff00) != 0x100)
800 opcode
&= 030; /* JR NZ,d has cc equal to 040, but others 000 */
803 case insn_call_cc_nn
:
805 regcache
->cooked_read (Z80_AF_REGNUM
, &t
);
806 /* lower bit of condition inverts match, so invert flags if set */
807 if ((opcode
& 010) != 0)
809 /* two higher bits of condition field defines flag, so use them only
810 to check condition of "not execute" */
811 if (t
& flag_mask
[(opcode
>> 4) & 3])
815 /* stage 2: compute address */
816 /* TODO: implement eZ80 MADL support */
825 addr
+= (signed char)buf
[size
-1];
829 opcode
= Z80_HL_REGNUM
;
831 opcode
= (buf
[size
-2] & 0x20) ? Z80_IY_REGNUM
: Z80_IX_REGNUM
;
832 regcache
->cooked_read (opcode
, &addr
);
837 case insn_call_cc_nn
:
838 addr
= buf
[size
-1] * 0x100 + buf
[size
-2];
839 if (info
->size
> 3) /* long instruction mode */
840 addr
= addr
* 0x100 + buf
[size
-3];
847 regcache
->cooked_read (Z80_SP_REGNUM
, &addr
);
848 read_memory (addr
, buf
, 3);
849 addr
= buf
[1] * 0x100 + buf
[0];
850 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ez80_adl
)
851 addr
= addr
* 0x100 + buf
[2];
858 /* Cached, dynamically allocated copies of the target data structures: */
859 static unsigned (*cache_ovly_region_table
)[3] = 0;
860 static unsigned cache_novly_regions
;
861 static CORE_ADDR cache_ovly_region_table_base
= 0;
864 VMA
, OSIZE
, MAPPED_TO_LMA
868 z80_free_overlay_region_table (void)
870 if (cache_ovly_region_table
)
871 xfree (cache_ovly_region_table
);
872 cache_novly_regions
= 0;
873 cache_ovly_region_table
= NULL
;
874 cache_ovly_region_table_base
= 0;
877 /* Read an array of ints of size SIZE from the target into a local buffer.
878 Convert to host order. LEN is number of ints. */
881 read_target_long_array (CORE_ADDR memaddr
, unsigned int *myaddr
,
882 int len
, int size
, enum bfd_endian byte_order
)
884 /* alloca is safe here, because regions array is very small. */
885 gdb_byte
*buf
= (gdb_byte
*) alloca (len
* size
);
888 read_memory (memaddr
, buf
, len
* size
);
889 for (i
= 0; i
< len
; i
++)
890 myaddr
[i
] = extract_unsigned_integer (size
* i
+ buf
, size
, byte_order
);
894 z80_read_overlay_region_table ()
896 struct bound_minimal_symbol novly_regions_msym
;
897 struct bound_minimal_symbol ovly_region_table_msym
;
898 struct gdbarch
*gdbarch
;
900 enum bfd_endian byte_order
;
902 z80_free_overlay_region_table ();
903 novly_regions_msym
= lookup_minimal_symbol ("_novly_regions", NULL
, NULL
);
904 if (! novly_regions_msym
.minsym
)
906 error (_("Error reading inferior's overlay table: "
907 "couldn't find `_novly_regions'\n"
908 "variable in inferior. Use `overlay manual' mode."));
912 ovly_region_table_msym
= lookup_bound_minimal_symbol ("_ovly_region_table");
913 if (! ovly_region_table_msym
.minsym
)
915 error (_("Error reading inferior's overlay table: couldn't find "
916 "`_ovly_region_table'\n"
917 "array in inferior. Use `overlay manual' mode."));
921 const enum overlay_debugging_state save_ovly_dbg
= overlay_debugging
;
922 /* prevent infinite recurse */
923 overlay_debugging
= ovly_off
;
925 gdbarch
= ovly_region_table_msym
.objfile
->arch ();
926 word_size
= gdbarch_long_bit (gdbarch
) / TARGET_CHAR_BIT
;
927 byte_order
= gdbarch_byte_order (gdbarch
);
929 cache_novly_regions
= read_memory_integer (
930 BMSYMBOL_VALUE_ADDRESS (novly_regions_msym
),
932 cache_ovly_region_table
933 = (unsigned int (*)[3]) xmalloc (cache_novly_regions
*
934 sizeof (*cache_ovly_region_table
));
935 cache_ovly_region_table_base
936 = BMSYMBOL_VALUE_ADDRESS (ovly_region_table_msym
);
937 read_target_long_array (cache_ovly_region_table_base
,
938 (unsigned int *) cache_ovly_region_table
,
939 cache_novly_regions
* 3, word_size
, byte_order
);
941 overlay_debugging
= save_ovly_dbg
;
942 return 1; /* SUCCESS */
946 z80_overlay_update_1 (struct obj_section
*osect
)
949 asection
*bsect
= osect
->the_bfd_section
;
951 unsigned vma
= bfd_section_vma (bsect
);
953 /* find region corresponding to the section VMA */
954 for (i
= 0; i
< cache_novly_regions
; i
++)
955 if (cache_ovly_region_table
[i
][VMA
] == vma
)
957 if (i
== cache_novly_regions
)
958 return 0; /* no such region */
960 lma
= cache_ovly_region_table
[i
][MAPPED_TO_LMA
];
963 /* we have interest for sections with same VMA */
964 for (objfile
*objfile
: current_program_space
->objfiles ())
965 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
966 if (section_is_overlay (osect
))
968 osect
->ovly_mapped
= (lma
== bfd_section_lma (osect
->the_bfd_section
));
969 i
|= osect
->ovly_mapped
; /* true, if at least one section is mapped */
974 /* Refresh overlay mapped state for section OSECT. */
976 z80_overlay_update (struct obj_section
*osect
)
978 /* Always need to read the entire table anew. */
979 if (!z80_read_overlay_region_table ())
982 /* Were we given an osect to look up? NULL means do all of them. */
983 if (osect
!= nullptr && z80_overlay_update_1 (osect
))
986 /* Update all sections, even if only one was requested. */
987 for (objfile
*objfile
: current_program_space
->objfiles ())
988 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
990 if (!section_is_overlay (osect
))
993 asection
*bsect
= osect
->the_bfd_section
;
994 bfd_vma lma
= bfd_section_lma (bsect
);
995 bfd_vma vma
= bfd_section_vma (bsect
);
997 for (int i
= 0; i
< cache_novly_regions
; ++i
)
998 if (cache_ovly_region_table
[i
][VMA
] == vma
)
1000 (cache_ovly_region_table
[i
][MAPPED_TO_LMA
] == lma
);
1004 /* Return non-zero if the instruction at ADDR is a call; zero otherwise. */
1006 z80_insn_is_call (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1010 const struct insn_info
*info
;
1011 read_memory (addr
, buf
, sizeof(buf
));
1012 info
= z80_get_insn_info (gdbarch
, buf
, &size
);
1017 case insn_call_cc_nn
:
1024 /* Return non-zero if the instruction at ADDR is a return; zero otherwise. */
1026 z80_insn_is_ret (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1030 const struct insn_info
*info
;
1031 read_memory (addr
, buf
, sizeof(buf
));
1032 info
= z80_get_insn_info (gdbarch
, buf
, &size
);
1043 /* Return non-zero if the instruction at ADDR is a jump; zero otherwise. */
1045 z80_insn_is_jump (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1049 const struct insn_info
*info
;
1050 read_memory (addr
, buf
, sizeof(buf
));
1051 info
= z80_get_insn_info (gdbarch
, buf
, &size
);
1066 static const struct frame_unwind
1071 default_frame_unwind_stop_reason
,
1073 z80_frame_prev_register
,
1074 NULL
, /*unwind_data*/
1075 default_frame_sniffer
1080 /* Initialize the gdbarch struct for the Z80 arch */
1081 static struct gdbarch
*
1082 z80_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1084 struct gdbarch
*gdbarch
;
1085 struct gdbarch_list
*best_arch
;
1086 tdesc_arch_data_up tdesc_data
;
1087 unsigned long mach
= info
.bfd_arch_info
->mach
;
1088 const struct target_desc
*tdesc
= info
.target_desc
;
1090 if (!tdesc_has_registers (tdesc
))
1091 /* Pick a default target description. */
1094 /* Check any target description for validity. */
1095 if (tdesc_has_registers (tdesc
))
1097 const struct tdesc_feature
*feature
;
1100 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.z80.cpu");
1101 if (feature
== NULL
)
1104 tdesc_data
= tdesc_data_alloc ();
1108 for (unsigned i
= 0; i
< Z80_NUM_REGS
; i
++)
1109 valid_p
&= tdesc_numbered_register (feature
, tdesc_data
.get (), i
,
1116 /* If there is already a candidate, use it. */
1117 for (best_arch
= gdbarch_list_lookup_by_info (arches
, &info
);
1119 best_arch
= gdbarch_list_lookup_by_info (best_arch
->next
, &info
))
1121 if (mach
== gdbarch_bfd_arch_info (best_arch
->gdbarch
)->mach
)
1122 return best_arch
->gdbarch
;
1125 /* None found, create a new architecture from the information provided. */
1126 z80_gdbarch_tdep
*tdep
= new z80_gdbarch_tdep
;
1127 gdbarch
= gdbarch_alloc (&info
, tdep
);
1129 if (mach
== bfd_mach_ez80_adl
)
1131 tdep
->addr_length
= 3;
1132 set_gdbarch_max_insn_length (gdbarch
, 6);
1136 tdep
->addr_length
= 2;
1137 set_gdbarch_max_insn_length (gdbarch
, 4);
1140 /* Create a type for PC. We can't use builtin types here, as they may not
1142 tdep
->void_type
= arch_type (gdbarch
, TYPE_CODE_VOID
, TARGET_CHAR_BIT
,
1144 tdep
->func_void_type
= make_function_type (tdep
->void_type
, NULL
);
1145 tdep
->pc_type
= arch_pointer_type (gdbarch
,
1146 tdep
->addr_length
* TARGET_CHAR_BIT
,
1147 NULL
, tdep
->func_void_type
);
1149 set_gdbarch_short_bit (gdbarch
, TARGET_CHAR_BIT
);
1150 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1151 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1152 set_gdbarch_ptr_bit (gdbarch
, tdep
->addr_length
* TARGET_CHAR_BIT
);
1153 set_gdbarch_addr_bit (gdbarch
, tdep
->addr_length
* TARGET_CHAR_BIT
);
1155 set_gdbarch_num_regs (gdbarch
, (mach
== bfd_mach_ez80_adl
) ? EZ80_NUM_REGS
1157 set_gdbarch_sp_regnum (gdbarch
, Z80_SP_REGNUM
);
1158 set_gdbarch_pc_regnum (gdbarch
, Z80_PC_REGNUM
);
1160 set_gdbarch_register_name (gdbarch
, z80_register_name
);
1161 set_gdbarch_register_type (gdbarch
, z80_register_type
);
1163 /* TODO: get FP type from binary (extra flags required) */
1164 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1165 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1166 set_gdbarch_long_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1167 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
1168 set_gdbarch_double_format (gdbarch
, floatformats_ieee_single
);
1169 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_single
);
1171 set_gdbarch_return_value (gdbarch
, z80_return_value
);
1173 set_gdbarch_skip_prologue (gdbarch
, z80_skip_prologue
);
1174 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
); // falling stack
1176 set_gdbarch_software_single_step (gdbarch
, z80_software_single_step
);
1177 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, z80_breakpoint_kind_from_pc
);
1178 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, z80_sw_breakpoint_from_kind
);
1179 set_gdbarch_insn_is_call (gdbarch
, z80_insn_is_call
);
1180 set_gdbarch_insn_is_jump (gdbarch
, z80_insn_is_jump
);
1181 set_gdbarch_insn_is_ret (gdbarch
, z80_insn_is_ret
);
1183 set_gdbarch_overlay_update (gdbarch
, z80_overlay_update
);
1185 frame_unwind_append_unwinder (gdbarch
, &z80_frame_unwind
);
1187 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
1192 /* Table to disassemble machine codes without prefix. */
1193 static const struct insn_info
1194 ez80_main_insn_table
[] =
1195 { /* table with double prefix check */
1196 { 0100, 0377, 0, insn_force_nop
}, //double prefix
1197 { 0111, 0377, 0, insn_force_nop
}, //double prefix
1198 { 0122, 0377, 0, insn_force_nop
}, //double prefix
1199 { 0133, 0377, 0, insn_force_nop
}, //double prefix
1200 /* initial table for eZ80_z80 */
1201 { 0100, 0377, 1, insn_z80
}, //eZ80 mode prefix
1202 { 0111, 0377, 1, insn_z80
}, //eZ80 mode prefix
1203 { 0122, 0377, 1, insn_adl
}, //eZ80 mode prefix
1204 { 0133, 0377, 1, insn_adl
}, //eZ80 mode prefix
1205 /* here common Z80/Z180/eZ80 opcodes */
1206 { 0000, 0367, 1, insn_default
}, //"nop", "ex af,af'"
1207 { 0061, 0377, 3, insn_ld_sp_nn
}, //"ld sp,nn"
1208 { 0001, 0317, 3, insn_default
}, //"ld rr,nn"
1209 { 0002, 0347, 1, insn_default
}, //"ld (rr),a", "ld a,(rr)"
1210 { 0042, 0347, 3, insn_default
}, //"ld (nn),hl/a", "ld hl/a,(nn)"
1211 { 0063, 0377, 1, insn_inc_sp
}, //"inc sp"
1212 { 0073, 0377, 1, insn_dec_sp
}, //"dec sp"
1213 { 0003, 0303, 1, insn_default
}, //"inc rr", "dec rr", ...
1214 { 0004, 0307, 1, insn_default
}, //"inc/dec r/(hl)"
1215 { 0006, 0307, 2, insn_default
}, //"ld r,n", "ld (hl),n"
1216 { 0020, 0377, 2, insn_djnz_d
}, //"djnz dis"
1217 { 0030, 0377, 2, insn_jr_d
}, //"jr dis"
1218 { 0040, 0347, 2, insn_jr_cc_d
}, //"jr cc,dis"
1219 { 0100, 0300, 1, insn_default
}, //"ld r,r", "halt"
1220 { 0200, 0300, 1, insn_default
}, //"alu_op a,r"
1221 { 0300, 0307, 1, insn_ret_cc
}, //"ret cc"
1222 { 0301, 0317, 1, insn_pop_rr
}, //"pop rr"
1223 { 0302, 0307, 3, insn_jp_cc_nn
}, //"jp cc,nn"
1224 { 0303, 0377, 3, insn_jp_nn
}, //"jp nn"
1225 { 0304, 0307, 3, insn_call_cc_nn
}, //"call cc,nn"
1226 { 0305, 0317, 1, insn_push_rr
}, //"push rr"
1227 { 0306, 0307, 2, insn_default
}, //"alu_op a,n"
1228 { 0307, 0307, 1, insn_rst_n
}, //"rst n"
1229 { 0311, 0377, 1, insn_ret
}, //"ret"
1230 { 0313, 0377, 2, insn_default
}, //CB prefix
1231 { 0315, 0377, 3, insn_call_nn
}, //"call nn"
1232 { 0323, 0367, 2, insn_default
}, //"out (n),a", "in a,(n)"
1233 { 0335, 0337, 1, insn_z80_ddfd
}, //DD/FD prefix
1234 { 0351, 0377, 1, insn_jp_rr
}, //"jp (hl)"
1235 { 0355, 0377, 1, insn_z80_ed
}, //ED prefix
1236 { 0371, 0377, 1, insn_ld_sp_rr
}, //"ld sp,hl"
1237 { 0000, 0000, 1, insn_default
} //others
1240 static const struct insn_info
1241 ez80_adl_main_insn_table
[] =
1242 { /* table with double prefix check */
1243 { 0100, 0377, 0, insn_force_nop
}, //double prefix
1244 { 0111, 0377, 0, insn_force_nop
}, //double prefix
1245 { 0122, 0377, 0, insn_force_nop
}, //double prefix
1246 { 0133, 0377, 0, insn_force_nop
}, //double prefix
1247 /* initial table for eZ80_adl */
1248 { 0000, 0367, 1, insn_default
}, //"nop", "ex af,af'"
1249 { 0061, 0377, 4, insn_ld_sp_nn
}, //"ld sp,Mmn"
1250 { 0001, 0317, 4, insn_default
}, //"ld rr,Mmn"
1251 { 0002, 0347, 1, insn_default
}, //"ld (rr),a", "ld a,(rr)"
1252 { 0042, 0347, 4, insn_default
}, //"ld (Mmn),hl/a", "ld hl/a,(Mmn)"
1253 { 0063, 0377, 1, insn_inc_sp
}, //"inc sp"
1254 { 0073, 0377, 1, insn_dec_sp
}, //"dec sp"
1255 { 0003, 0303, 1, insn_default
}, //"inc rr", "dec rr", ...
1256 { 0004, 0307, 1, insn_default
}, //"inc/dec r/(hl)"
1257 { 0006, 0307, 2, insn_default
}, //"ld r,n", "ld (hl),n"
1258 { 0020, 0377, 2, insn_djnz_d
}, //"djnz dis"
1259 { 0030, 0377, 2, insn_jr_d
}, //"jr dis"
1260 { 0040, 0347, 2, insn_jr_cc_d
}, //"jr cc,dis"
1261 { 0100, 0377, 1, insn_z80
}, //eZ80 mode prefix (short instruction)
1262 { 0111, 0377, 1, insn_z80
}, //eZ80 mode prefix (short instruction)
1263 { 0122, 0377, 1, insn_adl
}, //eZ80 mode prefix (long instruction)
1264 { 0133, 0377, 1, insn_adl
}, //eZ80 mode prefix (long instruction)
1265 { 0100, 0300, 1, insn_default
}, //"ld r,r", "halt"
1266 { 0200, 0300, 1, insn_default
}, //"alu_op a,r"
1267 { 0300, 0307, 1, insn_ret_cc
}, //"ret cc"
1268 { 0301, 0317, 1, insn_pop_rr
}, //"pop rr"
1269 { 0302, 0307, 4, insn_jp_cc_nn
}, //"jp cc,nn"
1270 { 0303, 0377, 4, insn_jp_nn
}, //"jp nn"
1271 { 0304, 0307, 4, insn_call_cc_nn
}, //"call cc,Mmn"
1272 { 0305, 0317, 1, insn_push_rr
}, //"push rr"
1273 { 0306, 0307, 2, insn_default
}, //"alu_op a,n"
1274 { 0307, 0307, 1, insn_rst_n
}, //"rst n"
1275 { 0311, 0377, 1, insn_ret
}, //"ret"
1276 { 0313, 0377, 2, insn_default
}, //CB prefix
1277 { 0315, 0377, 4, insn_call_nn
}, //"call Mmn"
1278 { 0323, 0367, 2, insn_default
}, //"out (n),a", "in a,(n)"
1279 { 0335, 0337, 1, insn_adl_ddfd
}, //DD/FD prefix
1280 { 0351, 0377, 1, insn_jp_rr
}, //"jp (hl)"
1281 { 0355, 0377, 1, insn_adl_ed
}, //ED prefix
1282 { 0371, 0377, 1, insn_ld_sp_rr
}, //"ld sp,hl"
1283 { 0000, 0000, 1, insn_default
} //others
1286 /* ED prefix opcodes table.
1287 Note the instruction length does include the ED prefix (+ 1 byte)
1289 static const struct insn_info
1290 ez80_ed_insn_table
[] =
1292 /* eZ80 only instructions */
1293 { 0002, 0366, 2, insn_default
}, //"lea rr,ii+d"
1294 { 0124, 0376, 2, insn_default
}, //"lea ix,iy+d", "lea iy,ix+d"
1295 { 0145, 0377, 2, insn_default
}, //"pea ix+d"
1296 { 0146, 0377, 2, insn_default
}, //"pea iy+d"
1297 { 0164, 0377, 2, insn_default
}, //"tstio n"
1298 /* Z180/eZ80 only instructions */
1299 { 0060, 0376, 1, insn_default
}, //not an instruction
1300 { 0000, 0306, 2, insn_default
}, //"in0 r,(n)", "out0 (n),r"
1301 { 0144, 0377, 2, insn_default
}, //"tst a, n"
1302 /* common instructions */
1303 { 0173, 0377, 3, insn_ld_sp_6nn9
}, //"ld sp,(nn)"
1304 { 0103, 0307, 3, insn_default
}, //"ld (nn),rr", "ld rr,(nn)"
1305 { 0105, 0317, 1, insn_ret
}, //"retn", "reti"
1306 { 0000, 0000, 1, insn_default
}
1309 static const struct insn_info
1310 ez80_adl_ed_insn_table
[] =
1312 { 0002, 0366, 2, insn_default
}, //"lea rr,ii+d"
1313 { 0124, 0376, 2, insn_default
}, //"lea ix,iy+d", "lea iy,ix+d"
1314 { 0145, 0377, 2, insn_default
}, //"pea ix+d"
1315 { 0146, 0377, 2, insn_default
}, //"pea iy+d"
1316 { 0164, 0377, 2, insn_default
}, //"tstio n"
1317 { 0060, 0376, 1, insn_default
}, //not an instruction
1318 { 0000, 0306, 2, insn_default
}, //"in0 r,(n)", "out0 (n),r"
1319 { 0144, 0377, 2, insn_default
}, //"tst a, n"
1320 { 0173, 0377, 4, insn_ld_sp_6nn9
}, //"ld sp,(nn)"
1321 { 0103, 0307, 4, insn_default
}, //"ld (nn),rr", "ld rr,(nn)"
1322 { 0105, 0317, 1, insn_ret
}, //"retn", "reti"
1323 { 0000, 0000, 1, insn_default
}
1326 /* table for FD and DD prefixed instructions */
1327 static const struct insn_info
1328 ez80_ddfd_insn_table
[] =
1330 /* ez80 only instructions */
1331 { 0007, 0307, 2, insn_default
}, //"ld rr,(ii+d)"
1332 { 0061, 0377, 2, insn_default
}, //"ld ii,(ii+d)"
1333 /* common instructions */
1334 { 0011, 0367, 2, insn_default
}, //"add ii,rr"
1335 { 0041, 0377, 3, insn_default
}, //"ld ii,nn"
1336 { 0042, 0367, 3, insn_default
}, //"ld (nn),ii", "ld ii,(nn)"
1337 { 0043, 0367, 1, insn_default
}, //"inc ii", "dec ii"
1338 { 0044, 0366, 1, insn_default
}, //"inc/dec iih/iil"
1339 { 0046, 0367, 2, insn_default
}, //"ld iih,n", "ld iil,n"
1340 { 0064, 0376, 2, insn_default
}, //"inc (ii+d)", "dec (ii+d)"
1341 { 0066, 0377, 2, insn_default
}, //"ld (ii+d),n"
1342 { 0166, 0377, 0, insn_default
}, //not an instruction
1343 { 0160, 0370, 2, insn_default
}, //"ld (ii+d),r"
1344 { 0104, 0306, 1, insn_default
}, //"ld r,iih", "ld r,iil"
1345 { 0106, 0307, 2, insn_default
}, //"ld r,(ii+d)"
1346 { 0140, 0360, 1, insn_default
}, //"ld iih,r", "ld iil,r"
1347 { 0204, 0306, 1, insn_default
}, //"alu_op a,iih", "alu_op a,iil"
1348 { 0206, 0307, 2, insn_default
}, //"alu_op a,(ii+d)"
1349 { 0313, 0377, 3, insn_default
}, //DD/FD CB dd oo instructions
1350 { 0335, 0337, 0, insn_force_nop
}, //double DD/FD prefix, exec DD/FD as NOP
1351 { 0341, 0373, 1, insn_default
}, //"pop ii", "push ii"
1352 { 0343, 0377, 1, insn_default
}, //"ex (sp),ii"
1353 { 0351, 0377, 1, insn_jp_rr
}, //"jp (ii)"
1354 { 0371, 0377, 1, insn_ld_sp_rr
}, //"ld sp,ii"
1355 { 0000, 0000, 0, insn_default
} //not an instruction, exec DD/FD as NOP
1358 static const struct insn_info
1359 ez80_adl_ddfd_insn_table
[] =
1361 { 0007, 0307, 2, insn_default
}, //"ld rr,(ii+d)"
1362 { 0061, 0377, 2, insn_default
}, //"ld ii,(ii+d)"
1363 { 0011, 0367, 1, insn_default
}, //"add ii,rr"
1364 { 0041, 0377, 4, insn_default
}, //"ld ii,nn"
1365 { 0042, 0367, 4, insn_default
}, //"ld (nn),ii", "ld ii,(nn)"
1366 { 0043, 0367, 1, insn_default
}, //"inc ii", "dec ii"
1367 { 0044, 0366, 1, insn_default
}, //"inc/dec iih/iil"
1368 { 0046, 0367, 2, insn_default
}, //"ld iih,n", "ld iil,n"
1369 { 0064, 0376, 2, insn_default
}, //"inc (ii+d)", "dec (ii+d)"
1370 { 0066, 0377, 3, insn_default
}, //"ld (ii+d),n"
1371 { 0166, 0377, 0, insn_default
}, //not an instruction
1372 { 0160, 0370, 2, insn_default
}, //"ld (ii+d),r"
1373 { 0104, 0306, 1, insn_default
}, //"ld r,iih", "ld r,iil"
1374 { 0106, 0307, 2, insn_default
}, //"ld r,(ii+d)"
1375 { 0140, 0360, 1, insn_default
}, //"ld iih,r", "ld iil,r"
1376 { 0204, 0306, 1, insn_default
}, //"alu_op a,iih", "alu_op a,iil"
1377 { 0206, 0307, 2, insn_default
}, //"alu_op a,(ii+d)"
1378 { 0313, 0377, 3, insn_default
}, //DD/FD CB dd oo instructions
1379 { 0335, 0337, 0, insn_force_nop
}, //double DD/FD prefix, exec DD/FD as NOP
1380 { 0341, 0373, 1, insn_default
}, //"pop ii", "push ii"
1381 { 0343, 0377, 1, insn_default
}, //"ex (sp),ii"
1382 { 0351, 0377, 1, insn_jp_rr
}, //"jp (ii)"
1383 { 0371, 0377, 1, insn_ld_sp_rr
}, //"ld sp,ii"
1384 { 0000, 0000, 0, insn_default
} //not an instruction, exec DD/FD as NOP
1387 /* Return pointer to instruction information structure corresponded to opcode
1389 static const struct insn_info
*
1390 z80_get_insn_info (struct gdbarch
*gdbarch
, const gdb_byte
*buf
, int *size
)
1393 const struct insn_info
*info
;
1394 unsigned long mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
1398 case bfd_mach_ez80_z80
:
1399 info
= &ez80_main_insn_table
[4]; /* skip force_nops */
1401 case bfd_mach_ez80_adl
:
1402 info
= &ez80_adl_main_insn_table
[4]; /* skip force_nops */
1405 info
= &ez80_main_insn_table
[8]; /* skip eZ80 prefices and force_nops */
1410 for (; ((code
= buf
[*size
]) & info
->mask
) != info
->code
; ++info
)
1412 *size
+= info
->size
;
1413 /* process instruction type */
1417 if (mach
== bfd_mach_ez80_z80
|| mach
== bfd_mach_ez80_adl
)
1418 info
= &ez80_main_insn_table
[0];
1420 info
= &ez80_main_insn_table
[8];
1423 info
= &ez80_adl_main_insn_table
[0];
1425 /* These two (for GameBoy Z80 & Z80 Next CPUs) haven't been tested.
1427 case bfd_mach_gbz80:
1428 info = &gbz80_main_insn_table[0];
1431 info = &z80n_main_insn_table[0];
1435 if (mach
== bfd_mach_ez80_z80
|| mach
== bfd_mach_ez80_adl
)
1436 info
= &ez80_ddfd_insn_table
[0];
1438 info
= &ez80_ddfd_insn_table
[2];
1441 info
= &ez80_adl_ddfd_insn_table
[0];
1444 info
= &ez80_ed_insn_table
[0];
1447 info
= &ez80_adl_ed_insn_table
[0];
1449 case insn_force_nop
:
1458 extern initialize_file_ftype _initialize_z80_tdep
;
1461 _initialize_z80_tdep ()
1463 register_gdbarch_init (bfd_arch_z80
, z80_gdbarch_init
);
1464 initialize_tdesc_z80 ();