1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian
>
61 class Output_data_plt_arm
;
63 template<bool big_endian
>
66 template<bool big_endian
>
67 class Arm_input_section
;
69 class Arm_exidx_cantunwind
;
71 class Arm_exidx_merged_section
;
73 class Arm_exidx_fixup
;
75 template<bool big_endian
>
76 class Arm_output_section
;
78 class Arm_exidx_input_section
;
80 template<bool big_endian
>
83 template<bool big_endian
>
87 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
89 // Maximum branch offsets for ARM, THUMB and THUMB2.
90 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
91 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
92 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
93 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
94 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
95 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
97 // The arm target class.
99 // This is a very simple port of gold for ARM-EABI. It is intended for
100 // supporting Android only for the time being.
103 // - Implement all static relocation types documented in arm-reloc.def.
104 // - Make PLTs more flexible for different architecture features like
106 // There are probably a lot more.
108 // Ideally we would like to avoid using global variables but this is used
109 // very in many places and sometimes in loops. If we use a function
110 // returning a static instance of Arm_reloc_property_table, it will very
111 // slow in an threaded environment since the static instance needs to be
112 // locked. The pointer is below initialized in the
113 // Target::do_select_as_default_target() hook so that we do not spend time
114 // building the table if we are not linking ARM objects.
116 // An alternative is to to process the information in arm-reloc.def in
117 // compilation time and generate a representation of it in PODs only. That
118 // way we can avoid initialization when the linker starts.
120 Arm_reloc_property_table
*arm_reloc_property_table
= NULL
;
122 // Instruction template class. This class is similar to the insn_sequence
123 // struct in bfd/elf32-arm.c.
128 // Types of instruction templates.
132 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
133 // templates with class-specific semantics. Currently this is used
134 // only by the Cortex_a8_stub class for handling condition codes in
135 // conditional branches.
136 THUMB16_SPECIAL_TYPE
,
142 // Factory methods to create instruction templates in different formats.
144 static const Insn_template
145 thumb16_insn(uint32_t data
)
146 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
148 // A Thumb conditional branch, in which the proper condition is inserted
149 // when we build the stub.
150 static const Insn_template
151 thumb16_bcond_insn(uint32_t data
)
152 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
154 static const Insn_template
155 thumb32_insn(uint32_t data
)
156 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
158 static const Insn_template
159 thumb32_b_insn(uint32_t data
, int reloc_addend
)
161 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
165 static const Insn_template
166 arm_insn(uint32_t data
)
167 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
169 static const Insn_template
170 arm_rel_insn(unsigned data
, int reloc_addend
)
171 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
173 static const Insn_template
174 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
175 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
177 // Accessors. This class is used for read-only objects so no modifiers
182 { return this->data_
; }
184 // Return the instruction sequence type of this.
187 { return this->type_
; }
189 // Return the ARM relocation type of this.
192 { return this->r_type_
; }
196 { return this->reloc_addend_
; }
198 // Return size of instruction template in bytes.
202 // Return byte-alignment of instruction template.
207 // We make the constructor private to ensure that only the factory
210 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
211 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
214 // Instruction specific data. This is used to store information like
215 // some of the instruction bits.
217 // Instruction template type.
219 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
220 unsigned int r_type_
;
221 // Relocation addend.
222 int32_t reloc_addend_
;
225 // Macro for generating code to stub types. One entry per long/short
229 DEF_STUB(long_branch_any_any) \
230 DEF_STUB(long_branch_v4t_arm_thumb) \
231 DEF_STUB(long_branch_thumb_only) \
232 DEF_STUB(long_branch_v4t_thumb_thumb) \
233 DEF_STUB(long_branch_v4t_thumb_arm) \
234 DEF_STUB(short_branch_v4t_thumb_arm) \
235 DEF_STUB(long_branch_any_arm_pic) \
236 DEF_STUB(long_branch_any_thumb_pic) \
237 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
238 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
239 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
240 DEF_STUB(long_branch_thumb_only_pic) \
241 DEF_STUB(a8_veneer_b_cond) \
242 DEF_STUB(a8_veneer_b) \
243 DEF_STUB(a8_veneer_bl) \
244 DEF_STUB(a8_veneer_blx) \
245 DEF_STUB(v4_veneer_bx)
249 #define DEF_STUB(x) arm_stub_##x,
255 // First reloc stub type.
256 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
257 // Last reloc stub type.
258 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
260 // First Cortex-A8 stub type.
261 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
262 // Last Cortex-A8 stub type.
263 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
266 arm_stub_type_last
= arm_stub_v4_veneer_bx
270 // Stub template class. Templates are meant to be read-only objects.
271 // A stub template for a stub type contains all read-only attributes
272 // common to all stubs of the same type.
277 Stub_template(Stub_type
, const Insn_template
*, size_t);
285 { return this->type_
; }
287 // Return an array of instruction templates.
290 { return this->insns_
; }
292 // Return size of template in number of instructions.
295 { return this->insn_count_
; }
297 // Return size of template in bytes.
300 { return this->size_
; }
302 // Return alignment of the stub template.
305 { return this->alignment_
; }
307 // Return whether entry point is in thumb mode.
309 entry_in_thumb_mode() const
310 { return this->entry_in_thumb_mode_
; }
312 // Return number of relocations in this template.
315 { return this->relocs_
.size(); }
317 // Return index of the I-th instruction with relocation.
319 reloc_insn_index(size_t i
) const
321 gold_assert(i
< this->relocs_
.size());
322 return this->relocs_
[i
].first
;
325 // Return the offset of the I-th instruction with relocation from the
326 // beginning of the stub.
328 reloc_offset(size_t i
) const
330 gold_assert(i
< this->relocs_
.size());
331 return this->relocs_
[i
].second
;
335 // This contains information about an instruction template with a relocation
336 // and its offset from start of stub.
337 typedef std::pair
<size_t, section_size_type
> Reloc
;
339 // A Stub_template may not be copied. We want to share templates as much
341 Stub_template(const Stub_template
&);
342 Stub_template
& operator=(const Stub_template
&);
346 // Points to an array of Insn_templates.
347 const Insn_template
* insns_
;
348 // Number of Insn_templates in insns_[].
350 // Size of templated instructions in bytes.
352 // Alignment of templated instructions.
354 // Flag to indicate if entry is in thumb mode.
355 bool entry_in_thumb_mode_
;
356 // A table of reloc instruction indices and offsets. We can find these by
357 // looking at the instruction templates but we pre-compute and then stash
358 // them here for speed.
359 std::vector
<Reloc
> relocs_
;
363 // A class for code stubs. This is a base class for different type of
364 // stubs used in the ARM target.
370 static const section_offset_type invalid_offset
=
371 static_cast<section_offset_type
>(-1);
374 Stub(const Stub_template
* stub_template
)
375 : stub_template_(stub_template
), offset_(invalid_offset
)
382 // Return the stub template.
384 stub_template() const
385 { return this->stub_template_
; }
387 // Return offset of code stub from beginning of its containing stub table.
391 gold_assert(this->offset_
!= invalid_offset
);
392 return this->offset_
;
395 // Set offset of code stub from beginning of its containing stub table.
397 set_offset(section_offset_type offset
)
398 { this->offset_
= offset
; }
400 // Return the relocation target address of the i-th relocation in the
401 // stub. This must be defined in a child class.
403 reloc_target(size_t i
)
404 { return this->do_reloc_target(i
); }
406 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
408 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
409 { this->do_write(view
, view_size
, big_endian
); }
411 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
412 // for the i-th instruction.
414 thumb16_special(size_t i
)
415 { return this->do_thumb16_special(i
); }
418 // This must be defined in the child class.
420 do_reloc_target(size_t) = 0;
422 // This may be overridden in the child class.
424 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
427 this->do_fixed_endian_write
<true>(view
, view_size
);
429 this->do_fixed_endian_write
<false>(view
, view_size
);
432 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
433 // instruction template.
435 do_thumb16_special(size_t)
436 { gold_unreachable(); }
439 // A template to implement do_write.
440 template<bool big_endian
>
442 do_fixed_endian_write(unsigned char*, section_size_type
);
445 const Stub_template
* stub_template_
;
446 // Offset within the section of containing this stub.
447 section_offset_type offset_
;
450 // Reloc stub class. These are stubs we use to fix up relocation because
451 // of limited branch ranges.
453 class Reloc_stub
: public Stub
456 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
457 // We assume we never jump to this address.
458 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
460 // Return destination address.
462 destination_address() const
464 gold_assert(this->destination_address_
!= this->invalid_address
);
465 return this->destination_address_
;
468 // Set destination address.
470 set_destination_address(Arm_address address
)
472 gold_assert(address
!= this->invalid_address
);
473 this->destination_address_
= address
;
476 // Reset destination address.
478 reset_destination_address()
479 { this->destination_address_
= this->invalid_address
; }
481 // Determine stub type for a branch of a relocation of R_TYPE going
482 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
483 // the branch target is a thumb instruction. TARGET is used for look
484 // up ARM-specific linker settings.
486 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
487 Arm_address branch_target
, bool target_is_thumb
);
489 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
490 // and an addend. Since we treat global and local symbol differently, we
491 // use a Symbol object for a global symbol and a object-index pair for
496 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
497 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
498 // and R_SYM must not be invalid_index.
499 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
500 unsigned int r_sym
, int32_t addend
)
501 : stub_type_(stub_type
), addend_(addend
)
505 this->r_sym_
= Reloc_stub::invalid_index
;
506 this->u_
.symbol
= symbol
;
510 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
511 this->r_sym_
= r_sym
;
512 this->u_
.relobj
= relobj
;
519 // Accessors: Keys are meant to be read-only object so no modifiers are
525 { return this->stub_type_
; }
527 // Return the local symbol index or invalid_index.
530 { return this->r_sym_
; }
532 // Return the symbol if there is one.
535 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
537 // Return the relobj if there is one.
540 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
542 // Whether this equals to another key k.
544 eq(const Key
& k
) const
546 return ((this->stub_type_
== k
.stub_type_
)
547 && (this->r_sym_
== k
.r_sym_
)
548 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
549 ? (this->u_
.relobj
== k
.u_
.relobj
)
550 : (this->u_
.symbol
== k
.u_
.symbol
))
551 && (this->addend_
== k
.addend_
));
554 // Return a hash value.
558 return (this->stub_type_
560 ^ gold::string_hash
<char>(
561 (this->r_sym_
!= Reloc_stub::invalid_index
)
562 ? this->u_
.relobj
->name().c_str()
563 : this->u_
.symbol
->name())
567 // Functors for STL associative containers.
571 operator()(const Key
& k
) const
572 { return k
.hash_value(); }
578 operator()(const Key
& k1
, const Key
& k2
) const
579 { return k1
.eq(k2
); }
582 // Name of key. This is mainly for debugging.
588 Stub_type stub_type_
;
589 // If this is a local symbol, this is the index in the defining object.
590 // Otherwise, it is invalid_index for a global symbol.
592 // If r_sym_ is invalid index. This points to a global symbol.
593 // Otherwise, this points a relobj. We used the unsized and target
594 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
595 // Arm_relobj. This is done to avoid making the stub class a template
596 // as most of the stub machinery is endianity-neutral. However, it
597 // may require a bit of casting done by users of this class.
600 const Symbol
* symbol
;
601 const Relobj
* relobj
;
603 // Addend associated with a reloc.
608 // Reloc_stubs are created via a stub factory. So these are protected.
609 Reloc_stub(const Stub_template
* stub_template
)
610 : Stub(stub_template
), destination_address_(invalid_address
)
616 friend class Stub_factory
;
618 // Return the relocation target address of the i-th relocation in the
621 do_reloc_target(size_t i
)
623 // All reloc stub have only one relocation.
625 return this->destination_address_
;
629 // Address of destination.
630 Arm_address destination_address_
;
633 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
634 // THUMB branch that meets the following conditions:
636 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
637 // branch address is 0xffe.
638 // 2. The branch target address is in the same page as the first word of the
640 // 3. The branch follows a 32-bit instruction which is not a branch.
642 // To do the fix up, we need to store the address of the branch instruction
643 // and its target at least. We also need to store the original branch
644 // instruction bits for the condition code in a conditional branch. The
645 // condition code is used in a special instruction template. We also want
646 // to identify input sections needing Cortex-A8 workaround quickly. We store
647 // extra information about object and section index of the code section
648 // containing a branch being fixed up. The information is used to mark
649 // the code section when we finalize the Cortex-A8 stubs.
652 class Cortex_a8_stub
: public Stub
658 // Return the object of the code section containing the branch being fixed
662 { return this->relobj_
; }
664 // Return the section index of the code section containing the branch being
668 { return this->shndx_
; }
670 // Return the source address of stub. This is the address of the original
671 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
674 source_address() const
675 { return this->source_address_
; }
677 // Return the destination address of the stub. This is the branch taken
678 // address of the original branch instruction. LSB is 1 if it is a THUMB
679 // instruction address.
681 destination_address() const
682 { return this->destination_address_
; }
684 // Return the instruction being fixed up.
686 original_insn() const
687 { return this->original_insn_
; }
690 // Cortex_a8_stubs are created via a stub factory. So these are protected.
691 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
692 unsigned int shndx
, Arm_address source_address
,
693 Arm_address destination_address
, uint32_t original_insn
)
694 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
695 source_address_(source_address
| 1U),
696 destination_address_(destination_address
),
697 original_insn_(original_insn
)
700 friend class Stub_factory
;
702 // Return the relocation target address of the i-th relocation in the
705 do_reloc_target(size_t i
)
707 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
709 // The conditional branch veneer has two relocations.
711 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
715 // All other Cortex-A8 stubs have only one relocation.
717 return this->destination_address_
;
721 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
723 do_thumb16_special(size_t);
726 // Object of the code section containing the branch being fixed up.
728 // Section index of the code section containing the branch begin fixed up.
730 // Source address of original branch.
731 Arm_address source_address_
;
732 // Destination address of the original branch.
733 Arm_address destination_address_
;
734 // Original branch instruction. This is needed for copying the condition
735 // code from a condition branch to its stub.
736 uint32_t original_insn_
;
739 // ARMv4 BX Rx branch relocation stub class.
740 class Arm_v4bx_stub
: public Stub
746 // Return the associated register.
749 { return this->reg_
; }
752 // Arm V4BX stubs are created via a stub factory. So these are protected.
753 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
754 : Stub(stub_template
), reg_(reg
)
757 friend class Stub_factory
;
759 // Return the relocation target address of the i-th relocation in the
762 do_reloc_target(size_t)
763 { gold_unreachable(); }
765 // This may be overridden in the child class.
767 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
770 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
772 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
776 // A template to implement do_write.
777 template<bool big_endian
>
779 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
781 const Insn_template
* insns
= this->stub_template()->insns();
782 elfcpp::Swap
<32, big_endian
>::writeval(view
,
784 + (this->reg_
<< 16)));
785 view
+= insns
[0].size();
786 elfcpp::Swap
<32, big_endian
>::writeval(view
,
787 (insns
[1].data() + this->reg_
));
788 view
+= insns
[1].size();
789 elfcpp::Swap
<32, big_endian
>::writeval(view
,
790 (insns
[2].data() + this->reg_
));
793 // A register index (r0-r14), which is associated with the stub.
797 // Stub factory class.
802 // Return the unique instance of this class.
803 static const Stub_factory
&
806 static Stub_factory singleton
;
810 // Make a relocation stub.
812 make_reloc_stub(Stub_type stub_type
) const
814 gold_assert(stub_type
>= arm_stub_reloc_first
815 && stub_type
<= arm_stub_reloc_last
);
816 return new Reloc_stub(this->stub_templates_
[stub_type
]);
819 // Make a Cortex-A8 stub.
821 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
822 Arm_address source
, Arm_address destination
,
823 uint32_t original_insn
) const
825 gold_assert(stub_type
>= arm_stub_cortex_a8_first
826 && stub_type
<= arm_stub_cortex_a8_last
);
827 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
828 source
, destination
, original_insn
);
831 // Make an ARM V4BX relocation stub.
832 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
834 make_arm_v4bx_stub(uint32_t reg
) const
836 gold_assert(reg
< 0xf);
837 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
842 // Constructor and destructor are protected since we only return a single
843 // instance created in Stub_factory::get_instance().
847 // A Stub_factory may not be copied since it is a singleton.
848 Stub_factory(const Stub_factory
&);
849 Stub_factory
& operator=(Stub_factory
&);
851 // Stub templates. These are initialized in the constructor.
852 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
855 // A class to hold stubs for the ARM target.
857 template<bool big_endian
>
858 class Stub_table
: public Output_data
861 Stub_table(Arm_input_section
<big_endian
>* owner
)
862 : Output_data(), owner_(owner
), reloc_stubs_(), cortex_a8_stubs_(),
863 arm_v4bx_stubs_(0xf), prev_data_size_(0), prev_addralign_(1)
869 // Owner of this stub table.
870 Arm_input_section
<big_endian
>*
872 { return this->owner_
; }
874 // Whether this stub table is empty.
878 return (this->reloc_stubs_
.empty()
879 && this->cortex_a8_stubs_
.empty()
880 && this->arm_v4bx_stubs_
.empty());
883 // Return the current data size.
885 current_data_size() const
886 { return this->current_data_size_for_child(); }
888 // Add a STUB with using KEY. Caller is reponsible for avoid adding
889 // if already a STUB with the same key has been added.
891 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
893 const Stub_template
* stub_template
= stub
->stub_template();
894 gold_assert(stub_template
->type() == key
.stub_type());
895 this->reloc_stubs_
[key
] = stub
;
898 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
899 // Caller is reponsible for avoid adding if already a STUB with the same
900 // address has been added.
902 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
904 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
905 this->cortex_a8_stubs_
.insert(value
);
908 // Add an ARM V4BX relocation stub. A register index will be retrieved
911 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
913 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
914 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
917 // Remove all Cortex-A8 stubs.
919 remove_all_cortex_a8_stubs();
921 // Look up a relocation stub using KEY. Return NULL if there is none.
923 find_reloc_stub(const Reloc_stub::Key
& key
) const
925 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
926 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
929 // Look up an arm v4bx relocation stub using the register index.
930 // Return NULL if there is none.
932 find_arm_v4bx_stub(const uint32_t reg
) const
934 gold_assert(reg
< 0xf);
935 return this->arm_v4bx_stubs_
[reg
];
938 // Relocate stubs in this stub table.
940 relocate_stubs(const Relocate_info
<32, big_endian
>*,
941 Target_arm
<big_endian
>*, Output_section
*,
942 unsigned char*, Arm_address
, section_size_type
);
944 // Update data size and alignment at the end of a relaxation pass. Return
945 // true if either data size or alignment is different from that of the
946 // previous relaxation pass.
948 update_data_size_and_addralign();
950 // Finalize stubs. Set the offsets of all stubs and mark input sections
951 // needing the Cortex-A8 workaround.
955 // Apply Cortex-A8 workaround to an address range.
957 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
958 unsigned char*, Arm_address
,
962 // Write out section contents.
964 do_write(Output_file
*);
966 // Return the required alignment.
969 { return this->prev_addralign_
; }
971 // Reset address and file offset.
973 do_reset_address_and_file_offset()
974 { this->set_current_data_size_for_child(this->prev_data_size_
); }
976 // Set final data size.
978 set_final_data_size()
979 { this->set_data_size(this->current_data_size()); }
982 // Relocate one stub.
984 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
985 Target_arm
<big_endian
>*, Output_section
*,
986 unsigned char*, Arm_address
, section_size_type
);
988 // Unordered map of relocation stubs.
990 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
991 Reloc_stub::Key::equal_to
>
994 // List of Cortex-A8 stubs ordered by addresses of branches being
995 // fixed up in output.
996 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
997 // List of Arm V4BX relocation stubs ordered by associated registers.
998 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1000 // Owner of this stub table.
1001 Arm_input_section
<big_endian
>* owner_
;
1002 // The relocation stubs.
1003 Reloc_stub_map reloc_stubs_
;
1004 // The cortex_a8_stubs.
1005 Cortex_a8_stub_list cortex_a8_stubs_
;
1006 // The Arm V4BX relocation stubs.
1007 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1008 // data size of this in the previous pass.
1009 off_t prev_data_size_
;
1010 // address alignment of this in the previous pass.
1011 uint64_t prev_addralign_
;
1014 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1015 // we add to the end of an EXIDX input section that goes into the output.
1017 class Arm_exidx_cantunwind
: public Output_section_data
1020 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1021 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1024 // Return the object containing the section pointed by this.
1027 { return this->relobj_
; }
1029 // Return the section index of the section pointed by this.
1032 { return this->shndx_
; }
1036 do_write(Output_file
* of
)
1038 if (parameters
->target().is_big_endian())
1039 this->do_fixed_endian_write
<true>(of
);
1041 this->do_fixed_endian_write
<false>(of
);
1045 // Implement do_write for a given endianity.
1046 template<bool big_endian
>
1048 do_fixed_endian_write(Output_file
*);
1050 // The object containing the section pointed by this.
1052 // The section index of the section pointed by this.
1053 unsigned int shndx_
;
1056 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1057 // Offset map is used to map input section offset within the EXIDX section
1058 // to the output offset from the start of this EXIDX section.
1060 typedef std::map
<section_offset_type
, section_offset_type
>
1061 Arm_exidx_section_offset_map
;
1063 // Arm_exidx_merged_section class. This represents an EXIDX input section
1064 // with some of its entries merged.
1066 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1069 // Constructor for Arm_exidx_merged_section.
1070 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1071 // SECTION_OFFSET_MAP points to a section offset map describing how
1072 // parts of the input section are mapped to output. DELETED_BYTES is
1073 // the number of bytes deleted from the EXIDX input section.
1074 Arm_exidx_merged_section(
1075 const Arm_exidx_input_section
& exidx_input_section
,
1076 const Arm_exidx_section_offset_map
& section_offset_map
,
1077 uint32_t deleted_bytes
);
1079 // Return the original EXIDX input section.
1080 const Arm_exidx_input_section
&
1081 exidx_input_section() const
1082 { return this->exidx_input_section_
; }
1084 // Return the section offset map.
1085 const Arm_exidx_section_offset_map
&
1086 section_offset_map() const
1087 { return this->section_offset_map_
; }
1090 // Write merged section into file OF.
1092 do_write(Output_file
* of
);
1095 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1096 section_offset_type
*) const;
1099 // Original EXIDX input section.
1100 const Arm_exidx_input_section
& exidx_input_section_
;
1101 // Section offset map.
1102 const Arm_exidx_section_offset_map
& section_offset_map_
;
1105 // A class to wrap an ordinary input section containing executable code.
1107 template<bool big_endian
>
1108 class Arm_input_section
: public Output_relaxed_input_section
1111 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1112 : Output_relaxed_input_section(relobj
, shndx
, 1),
1113 original_addralign_(1), original_size_(0), stub_table_(NULL
)
1116 ~Arm_input_section()
1123 // Whether this is a stub table owner.
1125 is_stub_table_owner() const
1126 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1128 // Return the stub table.
1129 Stub_table
<big_endian
>*
1131 { return this->stub_table_
; }
1133 // Set the stub_table.
1135 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1136 { this->stub_table_
= stub_table
; }
1138 // Downcast a base pointer to an Arm_input_section pointer. This is
1139 // not type-safe but we only use Arm_input_section not the base class.
1140 static Arm_input_section
<big_endian
>*
1141 as_arm_input_section(Output_relaxed_input_section
* poris
)
1142 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1145 // Write data to output file.
1147 do_write(Output_file
*);
1149 // Return required alignment of this.
1151 do_addralign() const
1153 if (this->is_stub_table_owner())
1154 return std::max(this->stub_table_
->addralign(),
1155 this->original_addralign_
);
1157 return this->original_addralign_
;
1160 // Finalize data size.
1162 set_final_data_size();
1164 // Reset address and file offset.
1166 do_reset_address_and_file_offset();
1170 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1171 section_offset_type offset
,
1172 section_offset_type
* poutput
) const
1174 if ((object
== this->relobj())
1175 && (shndx
== this->shndx())
1177 && (convert_types
<uint64_t, section_offset_type
>(offset
)
1178 <= this->original_size_
))
1188 // Copying is not allowed.
1189 Arm_input_section(const Arm_input_section
&);
1190 Arm_input_section
& operator=(const Arm_input_section
&);
1192 // Address alignment of the original input section.
1193 uint64_t original_addralign_
;
1194 // Section size of the original input section.
1195 uint64_t original_size_
;
1197 Stub_table
<big_endian
>* stub_table_
;
1200 // Arm_exidx_fixup class. This is used to define a number of methods
1201 // and keep states for fixing up EXIDX coverage.
1203 class Arm_exidx_fixup
1206 Arm_exidx_fixup(Output_section
* exidx_output_section
)
1207 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1208 last_inlined_entry_(0), last_input_section_(NULL
),
1209 section_offset_map_(NULL
), first_output_text_section_(NULL
)
1213 { delete this->section_offset_map_
; }
1215 // Process an EXIDX section for entry merging. Return number of bytes to
1216 // be deleted in output. If parts of the input EXIDX section are merged
1217 // a heap allocated Arm_exidx_section_offset_map is store in the located
1218 // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for
1220 template<bool big_endian
>
1222 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1223 Arm_exidx_section_offset_map
** psection_offset_map
);
1225 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1226 // input section, if there is not one already.
1228 add_exidx_cantunwind_as_needed();
1230 // Return the output section for the text section which is linked to the
1231 // first exidx input in output.
1233 first_output_text_section() const
1234 { return this->first_output_text_section_
; }
1237 // Copying is not allowed.
1238 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1239 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1241 // Type of EXIDX unwind entry.
1246 // EXIDX_CANTUNWIND.
1247 UT_EXIDX_CANTUNWIND
,
1254 // Process an EXIDX entry. We only care about the second word of the
1255 // entry. Return true if the entry can be deleted.
1257 process_exidx_entry(uint32_t second_word
);
1259 // Update the current section offset map during EXIDX section fix-up.
1260 // If there is no map, create one. INPUT_OFFSET is the offset of a
1261 // reference point, DELETED_BYTES is the number of deleted by in the
1262 // section so far. If DELETE_ENTRY is true, the reference point and
1263 // all offsets after the previous reference point are discarded.
1265 update_offset_map(section_offset_type input_offset
,
1266 section_size_type deleted_bytes
, bool delete_entry
);
1268 // EXIDX output section.
1269 Output_section
* exidx_output_section_
;
1270 // Unwind type of the last EXIDX entry processed.
1271 Unwind_type last_unwind_type_
;
1272 // Last seen inlined EXIDX entry.
1273 uint32_t last_inlined_entry_
;
1274 // Last processed EXIDX input section.
1275 const Arm_exidx_input_section
* last_input_section_
;
1276 // Section offset map created in process_exidx_section.
1277 Arm_exidx_section_offset_map
* section_offset_map_
;
1278 // Output section for the text section which is linked to the first exidx
1280 Output_section
* first_output_text_section_
;
1283 // Arm output section class. This is defined mainly to add a number of
1284 // stub generation methods.
1286 template<bool big_endian
>
1287 class Arm_output_section
: public Output_section
1290 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1292 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1293 elfcpp::Elf_Xword flags
)
1294 : Output_section(name
, type
, flags
)
1297 ~Arm_output_section()
1300 // Group input sections for stub generation.
1302 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*);
1304 // Downcast a base pointer to an Arm_output_section pointer. This is
1305 // not type-safe but we only use Arm_output_section not the base class.
1306 static Arm_output_section
<big_endian
>*
1307 as_arm_output_section(Output_section
* os
)
1308 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1310 // Append all input text sections in this into LIST.
1312 append_text_sections_to_list(Text_section_list
* list
);
1314 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1315 // is a list of text input sections sorted in ascending order of their
1316 // output addresses.
1318 fix_exidx_coverage(const Text_section_list
& sorted_text_section
,
1319 Symbol_table
* symtab
);
1323 typedef Output_section::Input_section Input_section
;
1324 typedef Output_section::Input_section_list Input_section_list
;
1326 // Create a stub group.
1327 void create_stub_group(Input_section_list::const_iterator
,
1328 Input_section_list::const_iterator
,
1329 Input_section_list::const_iterator
,
1330 Target_arm
<big_endian
>*,
1331 std::vector
<Output_relaxed_input_section
*>*);
1334 // Arm_exidx_input_section class. This represents an EXIDX input section.
1336 class Arm_exidx_input_section
1339 static const section_offset_type invalid_offset
=
1340 static_cast<section_offset_type
>(-1);
1342 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1343 unsigned int link
, uint32_t size
, uint32_t addralign
)
1344 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1345 addralign_(addralign
)
1348 ~Arm_exidx_input_section()
1351 // Accessors: This is a read-only class.
1353 // Return the object containing this EXIDX input section.
1356 { return this->relobj_
; }
1358 // Return the section index of this EXIDX input section.
1361 { return this->shndx_
; }
1363 // Return the section index of linked text section in the same object.
1366 { return this->link_
; }
1368 // Return size of the EXIDX input section.
1371 { return this->size_
; }
1373 // Reutnr address alignment of EXIDX input section.
1376 { return this->addralign_
; }
1379 // Object containing this.
1381 // Section index of this.
1382 unsigned int shndx_
;
1383 // text section linked to this in the same object.
1385 // Size of this. For ARM 32-bit is sufficient.
1387 // Address alignment of this. For ARM 32-bit is sufficient.
1388 uint32_t addralign_
;
1391 // Arm_relobj class.
1393 template<bool big_endian
>
1394 class Arm_relobj
: public Sized_relobj
<32, big_endian
>
1397 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1399 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1400 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1401 : Sized_relobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1402 stub_tables_(), local_symbol_is_thumb_function_(),
1403 attributes_section_data_(NULL
), mapping_symbols_info_(),
1404 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1405 output_local_symbol_count_needs_update_(false)
1409 { delete this->attributes_section_data_
; }
1411 // Return the stub table of the SHNDX-th section if there is one.
1412 Stub_table
<big_endian
>*
1413 stub_table(unsigned int shndx
) const
1415 gold_assert(shndx
< this->stub_tables_
.size());
1416 return this->stub_tables_
[shndx
];
1419 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1421 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1423 gold_assert(shndx
< this->stub_tables_
.size());
1424 this->stub_tables_
[shndx
] = stub_table
;
1427 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1428 // index. This is only valid after do_count_local_symbol is called.
1430 local_symbol_is_thumb_function(unsigned int r_sym
) const
1432 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1433 return this->local_symbol_is_thumb_function_
[r_sym
];
1436 // Scan all relocation sections for stub generation.
1438 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1441 // Convert regular input section with index SHNDX to a relaxed section.
1443 convert_input_section_to_relaxed_section(unsigned shndx
)
1445 // The stubs have relocations and we need to process them after writing
1446 // out the stubs. So relocation now must follow section write.
1447 this->set_section_offset(shndx
, -1ULL);
1448 this->set_relocs_must_follow_section_writes();
1451 // Downcast a base pointer to an Arm_relobj pointer. This is
1452 // not type-safe but we only use Arm_relobj not the base class.
1453 static Arm_relobj
<big_endian
>*
1454 as_arm_relobj(Relobj
* relobj
)
1455 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1457 // Processor-specific flags in ELF file header. This is valid only after
1460 processor_specific_flags() const
1461 { return this->processor_specific_flags_
; }
1463 // Attribute section data This is the contents of the .ARM.attribute section
1465 const Attributes_section_data
*
1466 attributes_section_data() const
1467 { return this->attributes_section_data_
; }
1469 // Mapping symbol location.
1470 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1472 // Functor for STL container.
1473 struct Mapping_symbol_position_less
1476 operator()(const Mapping_symbol_position
& p1
,
1477 const Mapping_symbol_position
& p2
) const
1479 return (p1
.first
< p2
.first
1480 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1484 // We only care about the first character of a mapping symbol, so
1485 // we only store that instead of the whole symbol name.
1486 typedef std::map
<Mapping_symbol_position
, char,
1487 Mapping_symbol_position_less
> Mapping_symbols_info
;
1489 // Whether a section contains any Cortex-A8 workaround.
1491 section_has_cortex_a8_workaround(unsigned int shndx
) const
1493 return (this->section_has_cortex_a8_workaround_
!= NULL
1494 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1497 // Mark a section that has Cortex-A8 workaround.
1499 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1501 if (this->section_has_cortex_a8_workaround_
== NULL
)
1502 this->section_has_cortex_a8_workaround_
=
1503 new std::vector
<bool>(this->shnum(), false);
1504 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1507 // Return the EXIDX section of an text section with index SHNDX or NULL
1508 // if the text section has no associated EXIDX section.
1509 const Arm_exidx_input_section
*
1510 exidx_input_section_by_link(unsigned int shndx
) const
1512 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1513 return ((p
!= this->exidx_section_map_
.end()
1514 && p
->second
->link() == shndx
)
1519 // Return the EXIDX section with index SHNDX or NULL if there is none.
1520 const Arm_exidx_input_section
*
1521 exidx_input_section_by_shndx(unsigned shndx
) const
1523 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1524 return ((p
!= this->exidx_section_map_
.end()
1525 && p
->second
->shndx() == shndx
)
1530 // Whether output local symbol count needs updating.
1532 output_local_symbol_count_needs_update() const
1533 { return this->output_local_symbol_count_needs_update_
; }
1535 // Set output_local_symbol_count_needs_update flag to be true.
1537 set_output_local_symbol_count_needs_update()
1538 { this->output_local_symbol_count_needs_update_
= true; }
1540 // Update output local symbol count at the end of relaxation.
1542 update_output_local_symbol_count();
1545 // Post constructor setup.
1549 // Call parent's setup method.
1550 Sized_relobj
<32, big_endian
>::do_setup();
1552 // Initialize look-up tables.
1553 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1554 this->stub_tables_
.swap(empty_stub_table_list
);
1557 // Count the local symbols.
1559 do_count_local_symbols(Stringpool_template
<char>*,
1560 Stringpool_template
<char>*);
1563 do_relocate_sections(const Symbol_table
* symtab
, const Layout
* layout
,
1564 const unsigned char* pshdrs
,
1565 typename Sized_relobj
<32, big_endian
>::Views
* pivews
);
1567 // Read the symbol information.
1569 do_read_symbols(Read_symbols_data
* sd
);
1571 // Process relocs for garbage collection.
1573 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1577 // Whether a section needs to be scanned for relocation stubs.
1579 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1580 const Relobj::Output_sections
&,
1581 const Symbol_table
*, const unsigned char*);
1583 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1585 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1586 unsigned int, Output_section
*,
1587 const Symbol_table
*);
1589 // Scan a section for the Cortex-A8 erratum.
1591 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1592 unsigned int, Output_section
*,
1593 Target_arm
<big_endian
>*);
1595 // Make a new Arm_exidx_input_section object for EXIDX section with
1596 // index SHNDX and section header SHDR.
1598 make_exidx_input_section(unsigned int shndx
,
1599 const elfcpp::Shdr
<32, big_endian
>& shdr
);
1601 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1602 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1605 // List of stub tables.
1606 Stub_table_list stub_tables_
;
1607 // Bit vector to tell if a local symbol is a thumb function or not.
1608 // This is only valid after do_count_local_symbol is called.
1609 std::vector
<bool> local_symbol_is_thumb_function_
;
1610 // processor-specific flags in ELF file header.
1611 elfcpp::Elf_Word processor_specific_flags_
;
1612 // Object attributes if there is an .ARM.attributes section or NULL.
1613 Attributes_section_data
* attributes_section_data_
;
1614 // Mapping symbols information.
1615 Mapping_symbols_info mapping_symbols_info_
;
1616 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1617 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1618 // Map a text section to its associated .ARM.exidx section, if there is one.
1619 Exidx_section_map exidx_section_map_
;
1620 // Whether output local symbol count needs updating.
1621 bool output_local_symbol_count_needs_update_
;
1624 // Arm_dynobj class.
1626 template<bool big_endian
>
1627 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1630 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1631 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1632 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1633 processor_specific_flags_(0), attributes_section_data_(NULL
)
1637 { delete this->attributes_section_data_
; }
1639 // Downcast a base pointer to an Arm_relobj pointer. This is
1640 // not type-safe but we only use Arm_relobj not the base class.
1641 static Arm_dynobj
<big_endian
>*
1642 as_arm_dynobj(Dynobj
* dynobj
)
1643 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1645 // Processor-specific flags in ELF file header. This is valid only after
1648 processor_specific_flags() const
1649 { return this->processor_specific_flags_
; }
1651 // Attributes section data.
1652 const Attributes_section_data
*
1653 attributes_section_data() const
1654 { return this->attributes_section_data_
; }
1657 // Read the symbol information.
1659 do_read_symbols(Read_symbols_data
* sd
);
1662 // processor-specific flags in ELF file header.
1663 elfcpp::Elf_Word processor_specific_flags_
;
1664 // Object attributes if there is an .ARM.attributes section or NULL.
1665 Attributes_section_data
* attributes_section_data_
;
1668 // Functor to read reloc addends during stub generation.
1670 template<int sh_type
, bool big_endian
>
1671 struct Stub_addend_reader
1673 // Return the addend for a relocation of a particular type. Depending
1674 // on whether this is a REL or RELA relocation, read the addend from a
1675 // view or from a Reloc object.
1676 elfcpp::Elf_types
<32>::Elf_Swxword
1678 unsigned int /* r_type */,
1679 const unsigned char* /* view */,
1680 const typename Reloc_types
<sh_type
,
1681 32, big_endian
>::Reloc
& /* reloc */) const;
1684 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1686 template<bool big_endian
>
1687 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1689 elfcpp::Elf_types
<32>::Elf_Swxword
1692 const unsigned char*,
1693 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1696 // Specialized Stub_addend_reader for RELA type relocation sections.
1697 // We currently do not handle RELA type relocation sections but it is trivial
1698 // to implement the addend reader. This is provided for completeness and to
1699 // make it easier to add support for RELA relocation sections in the future.
1701 template<bool big_endian
>
1702 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1704 elfcpp::Elf_types
<32>::Elf_Swxword
1707 const unsigned char*,
1708 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1709 big_endian
>::Reloc
& reloc
) const
1710 { return reloc
.get_r_addend(); }
1713 // Cortex_a8_reloc class. We keep record of relocation that may need
1714 // the Cortex-A8 erratum workaround.
1716 class Cortex_a8_reloc
1719 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1720 Arm_address destination
)
1721 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1727 // Accessors: This is a read-only class.
1729 // Return the relocation stub associated with this relocation if there is
1733 { return this->reloc_stub_
; }
1735 // Return the relocation type.
1738 { return this->r_type_
; }
1740 // Return the destination address of the relocation. LSB stores the THUMB
1744 { return this->destination_
; }
1747 // Associated relocation stub if there is one, or NULL.
1748 const Reloc_stub
* reloc_stub_
;
1750 unsigned int r_type_
;
1751 // Destination address of this relocation. LSB is used to distinguish
1753 Arm_address destination_
;
1756 // Utilities for manipulating integers of up to 32-bits
1760 // Sign extend an n-bit unsigned integer stored in an uint32_t into
1761 // an int32_t. NO_BITS must be between 1 to 32.
1762 template<int no_bits
>
1763 static inline int32_t
1764 sign_extend(uint32_t bits
)
1766 gold_assert(no_bits
>= 0 && no_bits
<= 32);
1768 return static_cast<int32_t>(bits
);
1769 uint32_t mask
= (~((uint32_t) 0)) >> (32 - no_bits
);
1771 uint32_t top_bit
= 1U << (no_bits
- 1);
1772 int32_t as_signed
= static_cast<int32_t>(bits
);
1773 return (bits
& top_bit
) ? as_signed
+ (-top_bit
* 2) : as_signed
;
1776 // Detects overflow of an NO_BITS integer stored in a uint32_t.
1777 template<int no_bits
>
1779 has_overflow(uint32_t bits
)
1781 gold_assert(no_bits
>= 0 && no_bits
<= 32);
1784 int32_t max
= (1 << (no_bits
- 1)) - 1;
1785 int32_t min
= -(1 << (no_bits
- 1));
1786 int32_t as_signed
= static_cast<int32_t>(bits
);
1787 return as_signed
> max
|| as_signed
< min
;
1790 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
1791 // fits in the given number of bits as either a signed or unsigned value.
1792 // For example, has_signed_unsigned_overflow<8> would check
1793 // -128 <= bits <= 255
1794 template<int no_bits
>
1796 has_signed_unsigned_overflow(uint32_t bits
)
1798 gold_assert(no_bits
>= 2 && no_bits
<= 32);
1801 int32_t max
= static_cast<int32_t>((1U << no_bits
) - 1);
1802 int32_t min
= -(1 << (no_bits
- 1));
1803 int32_t as_signed
= static_cast<int32_t>(bits
);
1804 return as_signed
> max
|| as_signed
< min
;
1807 // Select bits from A and B using bits in MASK. For each n in [0..31],
1808 // the n-th bit in the result is chosen from the n-th bits of A and B.
1809 // A zero selects A and a one selects B.
1810 static inline uint32_t
1811 bit_select(uint32_t a
, uint32_t b
, uint32_t mask
)
1812 { return (a
& ~mask
) | (b
& mask
); }
1815 template<bool big_endian
>
1816 class Target_arm
: public Sized_target
<32, big_endian
>
1819 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
1822 // When were are relocating a stub, we pass this as the relocation number.
1823 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
1826 : Sized_target
<32, big_endian
>(&arm_info
),
1827 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
1828 copy_relocs_(elfcpp::R_ARM_COPY
), dynbss_(NULL
), stub_tables_(),
1829 stub_factory_(Stub_factory::get_instance()), may_use_blx_(false),
1830 should_force_pic_veneer_(false), arm_input_section_map_(),
1831 attributes_section_data_(NULL
), fix_cortex_a8_(false),
1832 cortex_a8_relocs_info_()
1835 // Whether we can use BLX.
1838 { return this->may_use_blx_
; }
1840 // Set use-BLX flag.
1842 set_may_use_blx(bool value
)
1843 { this->may_use_blx_
= value
; }
1845 // Whether we force PCI branch veneers.
1847 should_force_pic_veneer() const
1848 { return this->should_force_pic_veneer_
; }
1850 // Set PIC veneer flag.
1852 set_should_force_pic_veneer(bool value
)
1853 { this->should_force_pic_veneer_
= value
; }
1855 // Whether we use THUMB-2 instructions.
1857 using_thumb2() const
1859 Object_attribute
* attr
=
1860 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1861 int arch
= attr
->int_value();
1862 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
1865 // Whether we use THUMB/THUMB-2 instructions only.
1867 using_thumb_only() const
1869 Object_attribute
* attr
=
1870 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1871 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
1872 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
1874 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
1875 return attr
->int_value() == 'M';
1878 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
1880 may_use_arm_nop() const
1882 Object_attribute
* attr
=
1883 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1884 int arch
= attr
->int_value();
1885 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
1886 || arch
== elfcpp::TAG_CPU_ARCH_V6K
1887 || arch
== elfcpp::TAG_CPU_ARCH_V7
1888 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
1891 // Whether we have THUMB-2 NOP.W instruction.
1893 may_use_thumb2_nop() const
1895 Object_attribute
* attr
=
1896 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1897 int arch
= attr
->int_value();
1898 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
1899 || arch
== elfcpp::TAG_CPU_ARCH_V7
1900 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
1903 // Process the relocations to determine unreferenced sections for
1904 // garbage collection.
1906 gc_process_relocs(Symbol_table
* symtab
,
1908 Sized_relobj
<32, big_endian
>* object
,
1909 unsigned int data_shndx
,
1910 unsigned int sh_type
,
1911 const unsigned char* prelocs
,
1913 Output_section
* output_section
,
1914 bool needs_special_offset_handling
,
1915 size_t local_symbol_count
,
1916 const unsigned char* plocal_symbols
);
1918 // Scan the relocations to look for symbol adjustments.
1920 scan_relocs(Symbol_table
* symtab
,
1922 Sized_relobj
<32, big_endian
>* object
,
1923 unsigned int data_shndx
,
1924 unsigned int sh_type
,
1925 const unsigned char* prelocs
,
1927 Output_section
* output_section
,
1928 bool needs_special_offset_handling
,
1929 size_t local_symbol_count
,
1930 const unsigned char* plocal_symbols
);
1932 // Finalize the sections.
1934 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
1936 // Return the value to use for a dynamic symbol which requires special
1939 do_dynsym_value(const Symbol
*) const;
1941 // Relocate a section.
1943 relocate_section(const Relocate_info
<32, big_endian
>*,
1944 unsigned int sh_type
,
1945 const unsigned char* prelocs
,
1947 Output_section
* output_section
,
1948 bool needs_special_offset_handling
,
1949 unsigned char* view
,
1950 Arm_address view_address
,
1951 section_size_type view_size
,
1952 const Reloc_symbol_changes
*);
1954 // Scan the relocs during a relocatable link.
1956 scan_relocatable_relocs(Symbol_table
* symtab
,
1958 Sized_relobj
<32, big_endian
>* object
,
1959 unsigned int data_shndx
,
1960 unsigned int sh_type
,
1961 const unsigned char* prelocs
,
1963 Output_section
* output_section
,
1964 bool needs_special_offset_handling
,
1965 size_t local_symbol_count
,
1966 const unsigned char* plocal_symbols
,
1967 Relocatable_relocs
*);
1969 // Relocate a section during a relocatable link.
1971 relocate_for_relocatable(const Relocate_info
<32, big_endian
>*,
1972 unsigned int sh_type
,
1973 const unsigned char* prelocs
,
1975 Output_section
* output_section
,
1976 off_t offset_in_output_section
,
1977 const Relocatable_relocs
*,
1978 unsigned char* view
,
1979 Arm_address view_address
,
1980 section_size_type view_size
,
1981 unsigned char* reloc_view
,
1982 section_size_type reloc_view_size
);
1984 // Return whether SYM is defined by the ABI.
1986 do_is_defined_by_abi(Symbol
* sym
) const
1987 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
1989 // Return the size of the GOT section.
1993 gold_assert(this->got_
!= NULL
);
1994 return this->got_
->data_size();
1997 // Map platform-specific reloc types
1999 get_real_reloc_type (unsigned int r_type
);
2002 // Methods to support stub-generations.
2005 // Return the stub factory
2007 stub_factory() const
2008 { return this->stub_factory_
; }
2010 // Make a new Arm_input_section object.
2011 Arm_input_section
<big_endian
>*
2012 new_arm_input_section(Relobj
*, unsigned int);
2014 // Find the Arm_input_section object corresponding to the SHNDX-th input
2015 // section of RELOBJ.
2016 Arm_input_section
<big_endian
>*
2017 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2019 // Make a new Stub_table
2020 Stub_table
<big_endian
>*
2021 new_stub_table(Arm_input_section
<big_endian
>*);
2023 // Scan a section for stub generation.
2025 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2026 const unsigned char*, size_t, Output_section
*,
2027 bool, const unsigned char*, Arm_address
,
2032 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2033 Output_section
*, unsigned char*, Arm_address
,
2036 // Get the default ARM target.
2037 static Target_arm
<big_endian
>*
2040 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2041 && parameters
->target().is_big_endian() == big_endian
);
2042 return static_cast<Target_arm
<big_endian
>*>(
2043 parameters
->sized_target
<32, big_endian
>());
2046 // Whether NAME belongs to a mapping symbol.
2048 is_mapping_symbol_name(const char* name
)
2052 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2053 && (name
[2] == '\0' || name
[2] == '.'));
2056 // Whether we work around the Cortex-A8 erratum.
2058 fix_cortex_a8() const
2059 { return this->fix_cortex_a8_
; }
2061 // Whether we fix R_ARM_V4BX relocation.
2063 // 1 - replace with MOV instruction (armv4 target)
2064 // 2 - make interworking veneer (>= armv4t targets only)
2065 General_options::Fix_v4bx
2067 { return parameters
->options().fix_v4bx(); }
2069 // Scan a span of THUMB code section for Cortex-A8 erratum.
2071 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2072 section_size_type
, section_size_type
,
2073 const unsigned char*, Arm_address
);
2075 // Apply Cortex-A8 workaround to a branch.
2077 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2078 unsigned char*, Arm_address
);
2081 // Make an ELF object.
2083 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2084 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2087 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2088 const elfcpp::Ehdr
<32, !big_endian
>&)
2089 { gold_unreachable(); }
2092 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2093 const elfcpp::Ehdr
<64, false>&)
2094 { gold_unreachable(); }
2097 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2098 const elfcpp::Ehdr
<64, true>&)
2099 { gold_unreachable(); }
2101 // Make an output section.
2103 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2104 elfcpp::Elf_Xword flags
)
2105 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2108 do_adjust_elf_header(unsigned char* view
, int len
) const;
2110 // We only need to generate stubs, and hence perform relaxation if we are
2111 // not doing relocatable linking.
2113 do_may_relax() const
2114 { return !parameters
->options().relocatable(); }
2117 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*);
2119 // Determine whether an object attribute tag takes an integer, a
2122 do_attribute_arg_type(int tag
) const;
2124 // Reorder tags during output.
2126 do_attributes_order(int num
) const;
2128 // This is called when the target is selected as the default.
2130 do_select_as_default_target()
2132 // No locking is required since there should only be one default target.
2133 // We cannot have both the big-endian and little-endian ARM targets
2135 gold_assert(arm_reloc_property_table
== NULL
);
2136 arm_reloc_property_table
= new Arm_reloc_property_table();
2140 // The class which scans relocations.
2145 : issued_non_pic_error_(false)
2149 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2150 Sized_relobj
<32, big_endian
>* object
,
2151 unsigned int data_shndx
,
2152 Output_section
* output_section
,
2153 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2154 const elfcpp::Sym
<32, big_endian
>& lsym
);
2157 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2158 Sized_relobj
<32, big_endian
>* object
,
2159 unsigned int data_shndx
,
2160 Output_section
* output_section
,
2161 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2166 unsupported_reloc_local(Sized_relobj
<32, big_endian
>*,
2167 unsigned int r_type
);
2170 unsupported_reloc_global(Sized_relobj
<32, big_endian
>*,
2171 unsigned int r_type
, Symbol
*);
2174 check_non_pic(Relobj
*, unsigned int r_type
);
2176 // Almost identical to Symbol::needs_plt_entry except that it also
2177 // handles STT_ARM_TFUNC.
2179 symbol_needs_plt_entry(const Symbol
* sym
)
2181 // An undefined symbol from an executable does not need a PLT entry.
2182 if (sym
->is_undefined() && !parameters
->options().shared())
2185 return (!parameters
->doing_static_link()
2186 && (sym
->type() == elfcpp::STT_FUNC
2187 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2188 && (sym
->is_from_dynobj()
2189 || sym
->is_undefined()
2190 || sym
->is_preemptible()));
2193 // Whether we have issued an error about a non-PIC compilation.
2194 bool issued_non_pic_error_
;
2197 // The class which implements relocation.
2207 // Return whether the static relocation needs to be applied.
2209 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2212 Output_section
* output_section
);
2214 // Do a relocation. Return false if the caller should not issue
2215 // any warnings about this relocation.
2217 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2218 Output_section
*, size_t relnum
,
2219 const elfcpp::Rel
<32, big_endian
>&,
2220 unsigned int r_type
, const Sized_symbol
<32>*,
2221 const Symbol_value
<32>*,
2222 unsigned char*, Arm_address
,
2225 // Return whether we want to pass flag NON_PIC_REF for this
2226 // reloc. This means the relocation type accesses a symbol not via
2229 reloc_is_non_pic (unsigned int r_type
)
2233 // These relocation types reference GOT or PLT entries explicitly.
2234 case elfcpp::R_ARM_GOT_BREL
:
2235 case elfcpp::R_ARM_GOT_ABS
:
2236 case elfcpp::R_ARM_GOT_PREL
:
2237 case elfcpp::R_ARM_GOT_BREL12
:
2238 case elfcpp::R_ARM_PLT32_ABS
:
2239 case elfcpp::R_ARM_TLS_GD32
:
2240 case elfcpp::R_ARM_TLS_LDM32
:
2241 case elfcpp::R_ARM_TLS_IE32
:
2242 case elfcpp::R_ARM_TLS_IE12GP
:
2244 // These relocate types may use PLT entries.
2245 case elfcpp::R_ARM_CALL
:
2246 case elfcpp::R_ARM_THM_CALL
:
2247 case elfcpp::R_ARM_JUMP24
:
2248 case elfcpp::R_ARM_THM_JUMP24
:
2249 case elfcpp::R_ARM_THM_JUMP19
:
2250 case elfcpp::R_ARM_PLT32
:
2251 case elfcpp::R_ARM_THM_XPC22
:
2260 // A class which returns the size required for a relocation type,
2261 // used while scanning relocs during a relocatable link.
2262 class Relocatable_size_for_reloc
2266 get_size_for_reloc(unsigned int, Relobj
*);
2269 // Get the GOT section, creating it if necessary.
2270 Output_data_got
<32, big_endian
>*
2271 got_section(Symbol_table
*, Layout
*);
2273 // Get the GOT PLT section.
2275 got_plt_section() const
2277 gold_assert(this->got_plt_
!= NULL
);
2278 return this->got_plt_
;
2281 // Create a PLT entry for a global symbol.
2283 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2285 // Get the PLT section.
2286 const Output_data_plt_arm
<big_endian
>*
2289 gold_assert(this->plt_
!= NULL
);
2293 // Get the dynamic reloc section, creating it if necessary.
2295 rel_dyn_section(Layout
*);
2297 // Return true if the symbol may need a COPY relocation.
2298 // References from an executable object to non-function symbols
2299 // defined in a dynamic object may need a COPY relocation.
2301 may_need_copy_reloc(Symbol
* gsym
)
2303 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2304 && gsym
->may_need_copy_reloc());
2307 // Add a potential copy relocation.
2309 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2310 Sized_relobj
<32, big_endian
>* object
,
2311 unsigned int shndx
, Output_section
* output_section
,
2312 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2314 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2315 symtab
->get_sized_symbol
<32>(sym
),
2316 object
, shndx
, output_section
, reloc
,
2317 this->rel_dyn_section(layout
));
2320 // Whether two EABI versions are compatible.
2322 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2324 // Merge processor-specific flags from input object and those in the ELF
2325 // header of the output.
2327 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2329 // Get the secondary compatible architecture.
2331 get_secondary_compatible_arch(const Attributes_section_data
*);
2333 // Set the secondary compatible architecture.
2335 set_secondary_compatible_arch(Attributes_section_data
*, int);
2338 tag_cpu_arch_combine(const char*, int, int*, int, int);
2340 // Helper to print AEABI enum tag value.
2342 aeabi_enum_name(unsigned int);
2344 // Return string value for TAG_CPU_name.
2346 tag_cpu_name_value(unsigned int);
2348 // Merge object attributes from input object and those in the output.
2350 merge_object_attributes(const char*, const Attributes_section_data
*);
2352 // Helper to get an AEABI object attribute
2354 get_aeabi_object_attribute(int tag
) const
2356 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2357 gold_assert(pasd
!= NULL
);
2358 Object_attribute
* attr
=
2359 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2360 gold_assert(attr
!= NULL
);
2365 // Methods to support stub-generations.
2368 // Group input sections for stub generation.
2370 group_sections(Layout
*, section_size_type
, bool);
2372 // Scan a relocation for stub generation.
2374 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2375 const Sized_symbol
<32>*, unsigned int,
2376 const Symbol_value
<32>*,
2377 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2379 // Scan a relocation section for stub.
2380 template<int sh_type
>
2382 scan_reloc_section_for_stubs(
2383 const Relocate_info
<32, big_endian
>* relinfo
,
2384 const unsigned char* prelocs
,
2386 Output_section
* output_section
,
2387 bool needs_special_offset_handling
,
2388 const unsigned char* view
,
2389 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2392 // Fix .ARM.exidx section coverage.
2394 fix_exidx_coverage(Layout
*, Arm_output_section
<big_endian
>*, Symbol_table
*);
2396 // Functors for STL set.
2397 struct output_section_address_less_than
2400 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2401 { return s1
->address() < s2
->address(); }
2404 // Information about this specific target which we pass to the
2405 // general Target structure.
2406 static const Target::Target_info arm_info
;
2408 // The types of GOT entries needed for this platform.
2411 GOT_TYPE_STANDARD
= 0 // GOT entry for a regular symbol
2414 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2416 // Map input section to Arm_input_section.
2417 typedef Unordered_map
<Section_id
,
2418 Arm_input_section
<big_endian
>*,
2420 Arm_input_section_map
;
2422 // Map output addresses to relocs for Cortex-A8 erratum.
2423 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2424 Cortex_a8_relocs_info
;
2427 Output_data_got
<32, big_endian
>* got_
;
2429 Output_data_plt_arm
<big_endian
>* plt_
;
2430 // The GOT PLT section.
2431 Output_data_space
* got_plt_
;
2432 // The dynamic reloc section.
2433 Reloc_section
* rel_dyn_
;
2434 // Relocs saved to avoid a COPY reloc.
2435 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2436 // Space for variables copied with a COPY reloc.
2437 Output_data_space
* dynbss_
;
2438 // Vector of Stub_tables created.
2439 Stub_table_list stub_tables_
;
2441 const Stub_factory
&stub_factory_
;
2442 // Whether we can use BLX.
2444 // Whether we force PIC branch veneers.
2445 bool should_force_pic_veneer_
;
2446 // Map for locating Arm_input_sections.
2447 Arm_input_section_map arm_input_section_map_
;
2448 // Attributes section data in output.
2449 Attributes_section_data
* attributes_section_data_
;
2450 // Whether we want to fix code for Cortex-A8 erratum.
2451 bool fix_cortex_a8_
;
2452 // Map addresses to relocs for Cortex-A8 erratum.
2453 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2456 template<bool big_endian
>
2457 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2460 big_endian
, // is_big_endian
2461 elfcpp::EM_ARM
, // machine_code
2462 false, // has_make_symbol
2463 false, // has_resolve
2464 false, // has_code_fill
2465 true, // is_default_stack_executable
2467 "/usr/lib/libc.so.1", // dynamic_linker
2468 0x8000, // default_text_segment_address
2469 0x1000, // abi_pagesize (overridable by -z max-page-size)
2470 0x1000, // common_pagesize (overridable by -z common-page-size)
2471 elfcpp::SHN_UNDEF
, // small_common_shndx
2472 elfcpp::SHN_UNDEF
, // large_common_shndx
2473 0, // small_common_section_flags
2474 0, // large_common_section_flags
2475 ".ARM.attributes", // attributes_section
2476 "aeabi" // attributes_vendor
2479 // Arm relocate functions class
2482 template<bool big_endian
>
2483 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2488 STATUS_OKAY
, // No error during relocation.
2489 STATUS_OVERFLOW
, // Relocation oveflow.
2490 STATUS_BAD_RELOC
// Relocation cannot be applied.
2494 typedef Relocate_functions
<32, big_endian
> Base
;
2495 typedef Arm_relocate_functions
<big_endian
> This
;
2497 // Encoding of imm16 argument for movt and movw ARM instructions
2500 // imm16 := imm4 | imm12
2502 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2503 // +-------+---------------+-------+-------+-----------------------+
2504 // | | |imm4 | |imm12 |
2505 // +-------+---------------+-------+-------+-----------------------+
2507 // Extract the relocation addend from VAL based on the ARM
2508 // instruction encoding described above.
2509 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2510 extract_arm_movw_movt_addend(
2511 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2513 // According to the Elf ABI for ARM Architecture the immediate
2514 // field is sign-extended to form the addend.
2515 return utils::sign_extend
<16>(((val
>> 4) & 0xf000) | (val
& 0xfff));
2518 // Insert X into VAL based on the ARM instruction encoding described
2520 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2521 insert_val_arm_movw_movt(
2522 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2523 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2527 val
|= (x
& 0xf000) << 4;
2531 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2534 // imm16 := imm4 | i | imm3 | imm8
2536 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2537 // +---------+-+-----------+-------++-+-----+-------+---------------+
2538 // | |i| |imm4 || |imm3 | |imm8 |
2539 // +---------+-+-----------+-------++-+-----+-------+---------------+
2541 // Extract the relocation addend from VAL based on the Thumb2
2542 // instruction encoding described above.
2543 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2544 extract_thumb_movw_movt_addend(
2545 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2547 // According to the Elf ABI for ARM Architecture the immediate
2548 // field is sign-extended to form the addend.
2549 return utils::sign_extend
<16>(((val
>> 4) & 0xf000)
2550 | ((val
>> 15) & 0x0800)
2551 | ((val
>> 4) & 0x0700)
2555 // Insert X into VAL based on the Thumb2 instruction encoding
2557 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2558 insert_val_thumb_movw_movt(
2559 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2560 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2563 val
|= (x
& 0xf000) << 4;
2564 val
|= (x
& 0x0800) << 15;
2565 val
|= (x
& 0x0700) << 4;
2566 val
|= (x
& 0x00ff);
2570 // Calculate the smallest constant Kn for the specified residual.
2571 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2573 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
2579 // Determine the most significant bit in the residual and
2580 // align the resulting value to a 2-bit boundary.
2581 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
2583 // The desired shift is now (msb - 6), or zero, whichever
2585 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
2588 // Calculate the final residual for the specified group index.
2589 // If the passed group index is less than zero, the method will return
2590 // the value of the specified residual without any change.
2591 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2592 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
2593 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
2596 for (int n
= 0; n
<= group
; n
++)
2598 // Calculate which part of the value to mask.
2599 uint32_t shift
= calc_grp_kn(residual
);
2600 // Calculate the residual for the next time around.
2601 residual
&= ~(residual
& (0xff << shift
));
2607 // Calculate the value of Gn for the specified group index.
2608 // We return it in the form of an encoded constant-and-rotation.
2609 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2610 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
2611 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
2614 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
2617 for (int n
= 0; n
<= group
; n
++)
2619 // Calculate which part of the value to mask.
2620 shift
= calc_grp_kn(residual
);
2621 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
2622 gn
= residual
& (0xff << shift
);
2623 // Calculate the residual for the next time around.
2626 // Return Gn in the form of an encoded constant-and-rotation.
2627 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
2631 // Handle ARM long branches.
2632 static typename
This::Status
2633 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
2634 unsigned char *, const Sized_symbol
<32>*,
2635 const Arm_relobj
<big_endian
>*, unsigned int,
2636 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
2638 // Handle THUMB long branches.
2639 static typename
This::Status
2640 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
2641 unsigned char *, const Sized_symbol
<32>*,
2642 const Arm_relobj
<big_endian
>*, unsigned int,
2643 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
2646 // Return the branch offset of a 32-bit THUMB branch.
2647 static inline int32_t
2648 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
2650 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
2651 // involving the J1 and J2 bits.
2652 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
2653 uint32_t upper
= upper_insn
& 0x3ffU
;
2654 uint32_t lower
= lower_insn
& 0x7ffU
;
2655 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
2656 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
2657 uint32_t i1
= j1
^ s
? 0 : 1;
2658 uint32_t i2
= j2
^ s
? 0 : 1;
2660 return utils::sign_extend
<25>((s
<< 24) | (i1
<< 23) | (i2
<< 22)
2661 | (upper
<< 12) | (lower
<< 1));
2664 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
2665 // UPPER_INSN is the original upper instruction of the branch. Caller is
2666 // responsible for overflow checking and BLX offset adjustment.
2667 static inline uint16_t
2668 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
2670 uint32_t s
= offset
< 0 ? 1 : 0;
2671 uint32_t bits
= static_cast<uint32_t>(offset
);
2672 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
2675 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
2676 // LOWER_INSN is the original lower instruction of the branch. Caller is
2677 // responsible for overflow checking and BLX offset adjustment.
2678 static inline uint16_t
2679 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
2681 uint32_t s
= offset
< 0 ? 1 : 0;
2682 uint32_t bits
= static_cast<uint32_t>(offset
);
2683 return ((lower_insn
& ~0x2fffU
)
2684 | ((((bits
>> 23) & 1) ^ !s
) << 13)
2685 | ((((bits
>> 22) & 1) ^ !s
) << 11)
2686 | ((bits
>> 1) & 0x7ffU
));
2689 // Return the branch offset of a 32-bit THUMB conditional branch.
2690 static inline int32_t
2691 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
2693 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
2694 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
2695 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
2696 uint32_t lower
= (lower_insn
& 0x07ffU
);
2697 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
2699 return utils::sign_extend
<21>((upper
<< 12) | (lower
<< 1));
2702 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
2703 // instruction. UPPER_INSN is the original upper instruction of the branch.
2704 // Caller is responsible for overflow checking.
2705 static inline uint16_t
2706 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
2708 uint32_t s
= offset
< 0 ? 1 : 0;
2709 uint32_t bits
= static_cast<uint32_t>(offset
);
2710 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
2713 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
2714 // instruction. LOWER_INSN is the original lower instruction of the branch.
2715 // Caller is reponsible for overflow checking.
2716 static inline uint16_t
2717 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
2719 uint32_t bits
= static_cast<uint32_t>(offset
);
2720 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
2721 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
2722 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
2724 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
2727 // R_ARM_ABS8: S + A
2728 static inline typename
This::Status
2729 abs8(unsigned char *view
,
2730 const Sized_relobj
<32, big_endian
>* object
,
2731 const Symbol_value
<32>* psymval
)
2733 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
2734 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2735 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2736 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
2737 Reltype addend
= utils::sign_extend
<8>(val
);
2738 Reltype x
= psymval
->value(object
, addend
);
2739 val
= utils::bit_select(val
, x
, 0xffU
);
2740 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
2741 return (utils::has_signed_unsigned_overflow
<8>(x
)
2742 ? This::STATUS_OVERFLOW
2743 : This::STATUS_OKAY
);
2746 // R_ARM_THM_ABS5: S + A
2747 static inline typename
This::Status
2748 thm_abs5(unsigned char *view
,
2749 const Sized_relobj
<32, big_endian
>* object
,
2750 const Symbol_value
<32>* psymval
)
2752 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2753 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2754 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2755 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2756 Reltype addend
= (val
& 0x7e0U
) >> 6;
2757 Reltype x
= psymval
->value(object
, addend
);
2758 val
= utils::bit_select(val
, x
<< 6, 0x7e0U
);
2759 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
2760 return (utils::has_overflow
<5>(x
)
2761 ? This::STATUS_OVERFLOW
2762 : This::STATUS_OKAY
);
2765 // R_ARM_ABS12: S + A
2766 static inline typename
This::Status
2767 abs12(unsigned char *view
,
2768 const Sized_relobj
<32, big_endian
>* object
,
2769 const Symbol_value
<32>* psymval
)
2771 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2772 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2773 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2774 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2775 Reltype addend
= val
& 0x0fffU
;
2776 Reltype x
= psymval
->value(object
, addend
);
2777 val
= utils::bit_select(val
, x
, 0x0fffU
);
2778 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
2779 return (utils::has_overflow
<12>(x
)
2780 ? This::STATUS_OVERFLOW
2781 : This::STATUS_OKAY
);
2784 // R_ARM_ABS16: S + A
2785 static inline typename
This::Status
2786 abs16(unsigned char *view
,
2787 const Sized_relobj
<32, big_endian
>* object
,
2788 const Symbol_value
<32>* psymval
)
2790 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2791 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2792 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2793 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2794 Reltype addend
= utils::sign_extend
<16>(val
);
2795 Reltype x
= psymval
->value(object
, addend
);
2796 val
= utils::bit_select(val
, x
, 0xffffU
);
2797 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
2798 return (utils::has_signed_unsigned_overflow
<16>(x
)
2799 ? This::STATUS_OVERFLOW
2800 : This::STATUS_OKAY
);
2803 // R_ARM_ABS32: (S + A) | T
2804 static inline typename
This::Status
2805 abs32(unsigned char *view
,
2806 const Sized_relobj
<32, big_endian
>* object
,
2807 const Symbol_value
<32>* psymval
,
2808 Arm_address thumb_bit
)
2810 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2811 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2812 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2813 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
2814 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
2815 return This::STATUS_OKAY
;
2818 // R_ARM_REL32: (S + A) | T - P
2819 static inline typename
This::Status
2820 rel32(unsigned char *view
,
2821 const Sized_relobj
<32, big_endian
>* object
,
2822 const Symbol_value
<32>* psymval
,
2823 Arm_address address
,
2824 Arm_address thumb_bit
)
2826 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2827 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2828 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2829 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
2830 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
2831 return This::STATUS_OKAY
;
2834 // R_ARM_THM_JUMP24: (S + A) | T - P
2835 static typename
This::Status
2836 thm_jump19(unsigned char *view
, const Arm_relobj
<big_endian
>* object
,
2837 const Symbol_value
<32>* psymval
, Arm_address address
,
2838 Arm_address thumb_bit
);
2840 // R_ARM_THM_JUMP6: S + A – P
2841 static inline typename
This::Status
2842 thm_jump6(unsigned char *view
,
2843 const Sized_relobj
<32, big_endian
>* object
,
2844 const Symbol_value
<32>* psymval
,
2845 Arm_address address
)
2847 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2848 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
2849 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2850 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2851 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
2852 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
2853 Reltype x
= (psymval
->value(object
, addend
) - address
);
2854 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
2855 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
2856 // CZB does only forward jumps.
2857 return ((x
> 0x007e)
2858 ? This::STATUS_OVERFLOW
2859 : This::STATUS_OKAY
);
2862 // R_ARM_THM_JUMP8: S + A – P
2863 static inline typename
This::Status
2864 thm_jump8(unsigned char *view
,
2865 const Sized_relobj
<32, big_endian
>* object
,
2866 const Symbol_value
<32>* psymval
,
2867 Arm_address address
)
2869 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2870 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
2871 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2872 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2873 Reltype addend
= utils::sign_extend
<8>((val
& 0x00ff) << 1);
2874 Reltype x
= (psymval
->value(object
, addend
) - address
);
2875 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xff00) | ((x
& 0x01fe) >> 1));
2876 return (utils::has_overflow
<8>(x
)
2877 ? This::STATUS_OVERFLOW
2878 : This::STATUS_OKAY
);
2881 // R_ARM_THM_JUMP11: S + A – P
2882 static inline typename
This::Status
2883 thm_jump11(unsigned char *view
,
2884 const Sized_relobj
<32, big_endian
>* object
,
2885 const Symbol_value
<32>* psymval
,
2886 Arm_address address
)
2888 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2889 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
2890 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2891 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2892 Reltype addend
= utils::sign_extend
<11>((val
& 0x07ff) << 1);
2893 Reltype x
= (psymval
->value(object
, addend
) - address
);
2894 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xf800) | ((x
& 0x0ffe) >> 1));
2895 return (utils::has_overflow
<11>(x
)
2896 ? This::STATUS_OVERFLOW
2897 : This::STATUS_OKAY
);
2900 // R_ARM_BASE_PREL: B(S) + A - P
2901 static inline typename
This::Status
2902 base_prel(unsigned char* view
,
2904 Arm_address address
)
2906 Base::rel32(view
, origin
- address
);
2910 // R_ARM_BASE_ABS: B(S) + A
2911 static inline typename
This::Status
2912 base_abs(unsigned char* view
,
2915 Base::rel32(view
, origin
);
2919 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
2920 static inline typename
This::Status
2921 got_brel(unsigned char* view
,
2922 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
2924 Base::rel32(view
, got_offset
);
2925 return This::STATUS_OKAY
;
2928 // R_ARM_GOT_PREL: GOT(S) + A - P
2929 static inline typename
This::Status
2930 got_prel(unsigned char *view
,
2931 Arm_address got_entry
,
2932 Arm_address address
)
2934 Base::rel32(view
, got_entry
- address
);
2935 return This::STATUS_OKAY
;
2938 // R_ARM_PREL: (S + A) | T - P
2939 static inline typename
This::Status
2940 prel31(unsigned char *view
,
2941 const Sized_relobj
<32, big_endian
>* object
,
2942 const Symbol_value
<32>* psymval
,
2943 Arm_address address
,
2944 Arm_address thumb_bit
)
2946 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2947 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2948 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2949 Valtype addend
= utils::sign_extend
<31>(val
);
2950 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
2951 val
= utils::bit_select(val
, x
, 0x7fffffffU
);
2952 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
2953 return (utils::has_overflow
<31>(x
) ?
2954 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
2957 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
2958 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
2959 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
2960 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
2961 static inline typename
This::Status
2962 movw(unsigned char* view
,
2963 const Sized_relobj
<32, big_endian
>* object
,
2964 const Symbol_value
<32>* psymval
,
2965 Arm_address relative_address_base
,
2966 Arm_address thumb_bit
,
2967 bool check_overflow
)
2969 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2970 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2971 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2972 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
2973 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
2974 - relative_address_base
);
2975 val
= This::insert_val_arm_movw_movt(val
, x
);
2976 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
2977 return ((check_overflow
&& utils::has_overflow
<16>(x
))
2978 ? This::STATUS_OVERFLOW
2979 : This::STATUS_OKAY
);
2982 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
2983 // R_ARM_MOVT_PREL: S + A - P
2984 // R_ARM_MOVT_BREL: S + A - B(S)
2985 static inline typename
This::Status
2986 movt(unsigned char* view
,
2987 const Sized_relobj
<32, big_endian
>* object
,
2988 const Symbol_value
<32>* psymval
,
2989 Arm_address relative_address_base
)
2991 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2992 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2993 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2994 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
2995 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
2996 val
= This::insert_val_arm_movw_movt(val
, x
);
2997 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
2998 // FIXME: IHI0044D says that we should check for overflow.
2999 return This::STATUS_OKAY
;
3002 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3003 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3004 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3005 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3006 static inline typename
This::Status
3007 thm_movw(unsigned char *view
,
3008 const Sized_relobj
<32, big_endian
>* object
,
3009 const Symbol_value
<32>* psymval
,
3010 Arm_address relative_address_base
,
3011 Arm_address thumb_bit
,
3012 bool check_overflow
)
3014 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3015 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3016 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3017 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3018 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3019 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3021 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3022 val
= This::insert_val_thumb_movw_movt(val
, x
);
3023 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3024 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3025 return ((check_overflow
&& utils::has_overflow
<16>(x
))
3026 ? This::STATUS_OVERFLOW
3027 : This::STATUS_OKAY
);
3030 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3031 // R_ARM_THM_MOVT_PREL: S + A - P
3032 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3033 static inline typename
This::Status
3034 thm_movt(unsigned char* view
,
3035 const Sized_relobj
<32, big_endian
>* object
,
3036 const Symbol_value
<32>* psymval
,
3037 Arm_address relative_address_base
)
3039 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3040 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3041 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3042 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3043 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3044 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3045 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3046 val
= This::insert_val_thumb_movw_movt(val
, x
);
3047 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3048 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3049 return This::STATUS_OKAY
;
3052 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3053 static inline typename
This::Status
3054 thm_alu11(unsigned char* view
,
3055 const Sized_relobj
<32, big_endian
>* object
,
3056 const Symbol_value
<32>* psymval
,
3057 Arm_address address
,
3058 Arm_address thumb_bit
)
3060 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3061 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3062 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3063 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3064 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3066 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3067 // -----------------------------------------------------------------------
3068 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3069 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3070 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3071 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3072 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3073 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3075 // Determine a sign for the addend.
3076 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3077 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3078 // Thumb2 addend encoding:
3079 // imm12 := i | imm3 | imm8
3080 int32_t addend
= (insn
& 0xff)
3081 | ((insn
& 0x00007000) >> 4)
3082 | ((insn
& 0x04000000) >> 15);
3083 // Apply a sign to the added.
3086 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3087 - (address
& 0xfffffffc);
3088 Reltype val
= abs(x
);
3089 // Mask out the value and a distinct part of the ADD/SUB opcode
3090 // (bits 7:5 of opword).
3091 insn
= (insn
& 0xfb0f8f00)
3093 | ((val
& 0x700) << 4)
3094 | ((val
& 0x800) << 15);
3095 // Set the opcode according to whether the value to go in the
3096 // place is negative.
3100 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3101 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3102 return ((val
> 0xfff) ?
3103 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3106 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3107 static inline typename
This::Status
3108 thm_pc8(unsigned char* view
,
3109 const Sized_relobj
<32, big_endian
>* object
,
3110 const Symbol_value
<32>* psymval
,
3111 Arm_address address
)
3113 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3114 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3115 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3116 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3117 Reltype addend
= ((insn
& 0x00ff) << 2);
3118 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3119 Reltype val
= abs(x
);
3120 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3122 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3123 return ((val
> 0x03fc)
3124 ? This::STATUS_OVERFLOW
3125 : This::STATUS_OKAY
);
3128 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3129 static inline typename
This::Status
3130 thm_pc12(unsigned char* view
,
3131 const Sized_relobj
<32, big_endian
>* object
,
3132 const Symbol_value
<32>* psymval
,
3133 Arm_address address
)
3135 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3136 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3137 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3138 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3139 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3140 // Determine a sign for the addend (positive if the U bit is 1).
3141 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3142 int32_t addend
= (insn
& 0xfff);
3143 // Apply a sign to the added.
3146 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3147 Reltype val
= abs(x
);
3148 // Mask out and apply the value and the U bit.
3149 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3150 // Set the U bit according to whether the value to go in the
3151 // place is positive.
3155 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3156 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3157 return ((val
> 0xfff) ?
3158 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3162 static inline typename
This::Status
3163 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3164 unsigned char *view
,
3165 const Arm_relobj
<big_endian
>* object
,
3166 const Arm_address address
,
3167 const bool is_interworking
)
3170 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3171 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3172 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3174 // Ensure that we have a BX instruction.
3175 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3176 const uint32_t reg
= (val
& 0xf);
3177 if (is_interworking
&& reg
!= 0xf)
3179 Stub_table
<big_endian
>* stub_table
=
3180 object
->stub_table(relinfo
->data_shndx
);
3181 gold_assert(stub_table
!= NULL
);
3183 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3184 gold_assert(stub
!= NULL
);
3186 int32_t veneer_address
=
3187 stub_table
->address() + stub
->offset() - 8 - address
;
3188 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3189 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3190 // Replace with a branch to veneer (B <addr>)
3191 val
= (val
& 0xf0000000) | 0x0a000000
3192 | ((veneer_address
>> 2) & 0x00ffffff);
3196 // Preserve Rm (lowest four bits) and the condition code
3197 // (highest four bits). Other bits encode MOV PC,Rm.
3198 val
= (val
& 0xf000000f) | 0x01a0f000;
3200 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3201 return This::STATUS_OKAY
;
3204 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3205 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3206 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3207 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3208 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3209 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3210 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3211 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3212 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3213 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3214 static inline typename
This::Status
3215 arm_grp_alu(unsigned char* view
,
3216 const Sized_relobj
<32, big_endian
>* object
,
3217 const Symbol_value
<32>* psymval
,
3219 Arm_address address
,
3220 Arm_address thumb_bit
,
3221 bool check_overflow
)
3223 gold_assert(group
>= 0 && group
< 3);
3224 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3225 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3226 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3228 // ALU group relocations are allowed only for the ADD/SUB instructions.
3229 // (0x00800000 - ADD, 0x00400000 - SUB)
3230 const Valtype opcode
= insn
& 0x01e00000;
3231 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3232 return This::STATUS_BAD_RELOC
;
3234 // Determine a sign for the addend.
3235 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3236 // shifter = rotate_imm * 2
3237 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3238 // Initial addend value.
3239 int32_t addend
= insn
& 0xff;
3240 // Rotate addend right by shifter.
3241 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3242 // Apply a sign to the added.
3245 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3246 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3247 // Check for overflow if required
3249 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3250 return This::STATUS_OVERFLOW
;
3252 // Mask out the value and the ADD/SUB part of the opcode; take care
3253 // not to destroy the S bit.
3255 // Set the opcode according to whether the value to go in the
3256 // place is negative.
3257 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3258 // Encode the offset (encoded Gn).
3261 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3262 return This::STATUS_OKAY
;
3265 // R_ARM_LDR_PC_G0: S + A - P
3266 // R_ARM_LDR_PC_G1: S + A - P
3267 // R_ARM_LDR_PC_G2: S + A - P
3268 // R_ARM_LDR_SB_G0: S + A - B(S)
3269 // R_ARM_LDR_SB_G1: S + A - B(S)
3270 // R_ARM_LDR_SB_G2: S + A - B(S)
3271 static inline typename
This::Status
3272 arm_grp_ldr(unsigned char* view
,
3273 const Sized_relobj
<32, big_endian
>* object
,
3274 const Symbol_value
<32>* psymval
,
3276 Arm_address address
)
3278 gold_assert(group
>= 0 && group
< 3);
3279 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3280 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3281 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3283 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3284 int32_t addend
= (insn
& 0xfff) * sign
;
3285 int32_t x
= (psymval
->value(object
, addend
) - address
);
3286 // Calculate the relevant G(n-1) value to obtain this stage residual.
3288 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3289 if (residual
>= 0x1000)
3290 return This::STATUS_OVERFLOW
;
3292 // Mask out the value and U bit.
3294 // Set the U bit for non-negative values.
3299 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3300 return This::STATUS_OKAY
;
3303 // R_ARM_LDRS_PC_G0: S + A - P
3304 // R_ARM_LDRS_PC_G1: S + A - P
3305 // R_ARM_LDRS_PC_G2: S + A - P
3306 // R_ARM_LDRS_SB_G0: S + A - B(S)
3307 // R_ARM_LDRS_SB_G1: S + A - B(S)
3308 // R_ARM_LDRS_SB_G2: S + A - B(S)
3309 static inline typename
This::Status
3310 arm_grp_ldrs(unsigned char* view
,
3311 const Sized_relobj
<32, big_endian
>* object
,
3312 const Symbol_value
<32>* psymval
,
3314 Arm_address address
)
3316 gold_assert(group
>= 0 && group
< 3);
3317 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3318 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3319 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3321 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3322 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3323 int32_t x
= (psymval
->value(object
, addend
) - address
);
3324 // Calculate the relevant G(n-1) value to obtain this stage residual.
3326 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3327 if (residual
>= 0x100)
3328 return This::STATUS_OVERFLOW
;
3330 // Mask out the value and U bit.
3332 // Set the U bit for non-negative values.
3335 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3337 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3338 return This::STATUS_OKAY
;
3341 // R_ARM_LDC_PC_G0: S + A - P
3342 // R_ARM_LDC_PC_G1: S + A - P
3343 // R_ARM_LDC_PC_G2: S + A - P
3344 // R_ARM_LDC_SB_G0: S + A - B(S)
3345 // R_ARM_LDC_SB_G1: S + A - B(S)
3346 // R_ARM_LDC_SB_G2: S + A - B(S)
3347 static inline typename
This::Status
3348 arm_grp_ldc(unsigned char* view
,
3349 const Sized_relobj
<32, big_endian
>* object
,
3350 const Symbol_value
<32>* psymval
,
3352 Arm_address address
)
3354 gold_assert(group
>= 0 && group
< 3);
3355 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3356 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3357 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3359 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3360 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3361 int32_t x
= (psymval
->value(object
, addend
) - address
);
3362 // Calculate the relevant G(n-1) value to obtain this stage residual.
3364 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3365 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3366 return This::STATUS_OVERFLOW
;
3368 // Mask out the value and U bit.
3370 // Set the U bit for non-negative values.
3373 insn
|= (residual
>> 2);
3375 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3376 return This::STATUS_OKAY
;
3380 // Relocate ARM long branches. This handles relocation types
3381 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3382 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3383 // undefined and we do not use PLT in this relocation. In such a case,
3384 // the branch is converted into an NOP.
3386 template<bool big_endian
>
3387 typename Arm_relocate_functions
<big_endian
>::Status
3388 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3389 unsigned int r_type
,
3390 const Relocate_info
<32, big_endian
>* relinfo
,
3391 unsigned char *view
,
3392 const Sized_symbol
<32>* gsym
,
3393 const Arm_relobj
<big_endian
>* object
,
3395 const Symbol_value
<32>* psymval
,
3396 Arm_address address
,
3397 Arm_address thumb_bit
,
3398 bool is_weakly_undefined_without_plt
)
3400 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3401 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3402 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3404 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3405 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3406 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3407 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3408 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3409 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3410 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3412 // Check that the instruction is valid.
3413 if (r_type
== elfcpp::R_ARM_CALL
)
3415 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3416 return This::STATUS_BAD_RELOC
;
3418 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3420 if (!insn_is_b
&& !insn_is_cond_bl
)
3421 return This::STATUS_BAD_RELOC
;
3423 else if (r_type
== elfcpp::R_ARM_PLT32
)
3425 if (!insn_is_any_branch
)
3426 return This::STATUS_BAD_RELOC
;
3428 else if (r_type
== elfcpp::R_ARM_XPC25
)
3430 // FIXME: AAELF document IH0044C does not say much about it other
3431 // than it being obsolete.
3432 if (!insn_is_any_branch
)
3433 return This::STATUS_BAD_RELOC
;
3438 // A branch to an undefined weak symbol is turned into a jump to
3439 // the next instruction unless a PLT entry will be created.
3440 // Do the same for local undefined symbols.
3441 // The jump to the next instruction is optimized as a NOP depending
3442 // on the architecture.
3443 const Target_arm
<big_endian
>* arm_target
=
3444 Target_arm
<big_endian
>::default_target();
3445 if (is_weakly_undefined_without_plt
)
3447 Valtype cond
= val
& 0xf0000000U
;
3448 if (arm_target
->may_use_arm_nop())
3449 val
= cond
| 0x0320f000;
3451 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3452 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3453 return This::STATUS_OKAY
;
3456 Valtype addend
= utils::sign_extend
<26>(val
<< 2);
3457 Valtype branch_target
= psymval
->value(object
, addend
);
3458 int32_t branch_offset
= branch_target
- address
;
3460 // We need a stub if the branch offset is too large or if we need
3462 bool may_use_blx
= arm_target
->may_use_blx();
3463 Reloc_stub
* stub
= NULL
;
3464 if ((branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
)
3465 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
3466 || ((thumb_bit
!= 0) && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
)))
3468 Stub_type stub_type
=
3469 Reloc_stub::stub_type_for_reloc(r_type
, address
, branch_target
,
3471 if (stub_type
!= arm_stub_none
)
3473 Stub_table
<big_endian
>* stub_table
=
3474 object
->stub_table(relinfo
->data_shndx
);
3475 gold_assert(stub_table
!= NULL
);
3477 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3478 stub
= stub_table
->find_reloc_stub(stub_key
);
3479 gold_assert(stub
!= NULL
);
3480 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3481 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3482 branch_offset
= branch_target
- address
;
3483 gold_assert((branch_offset
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3484 && (branch_offset
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3488 // At this point, if we still need to switch mode, the instruction
3489 // must either be a BLX or a BL that can be converted to a BLX.
3493 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3494 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3497 val
= utils::bit_select(val
, (branch_offset
>> 2), 0xffffffUL
);
3498 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3499 return (utils::has_overflow
<26>(branch_offset
)
3500 ? This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3503 // Relocate THUMB long branches. This handles relocation types
3504 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3505 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3506 // undefined and we do not use PLT in this relocation. In such a case,
3507 // the branch is converted into an NOP.
3509 template<bool big_endian
>
3510 typename Arm_relocate_functions
<big_endian
>::Status
3511 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
3512 unsigned int r_type
,
3513 const Relocate_info
<32, big_endian
>* relinfo
,
3514 unsigned char *view
,
3515 const Sized_symbol
<32>* gsym
,
3516 const Arm_relobj
<big_endian
>* object
,
3518 const Symbol_value
<32>* psymval
,
3519 Arm_address address
,
3520 Arm_address thumb_bit
,
3521 bool is_weakly_undefined_without_plt
)
3523 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3524 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3525 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3526 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3528 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3530 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
3531 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
3533 // Check that the instruction is valid.
3534 if (r_type
== elfcpp::R_ARM_THM_CALL
)
3536 if (!is_bl_insn
&& !is_blx_insn
)
3537 return This::STATUS_BAD_RELOC
;
3539 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
3541 // This cannot be a BLX.
3543 return This::STATUS_BAD_RELOC
;
3545 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
3547 // Check for Thumb to Thumb call.
3549 return This::STATUS_BAD_RELOC
;
3552 gold_warning(_("%s: Thumb BLX instruction targets "
3553 "thumb function '%s'."),
3554 object
->name().c_str(),
3555 (gsym
? gsym
->name() : "(local)"));
3556 // Convert BLX to BL.
3557 lower_insn
|= 0x1000U
;
3563 // A branch to an undefined weak symbol is turned into a jump to
3564 // the next instruction unless a PLT entry will be created.
3565 // The jump to the next instruction is optimized as a NOP.W for
3566 // Thumb-2 enabled architectures.
3567 const Target_arm
<big_endian
>* arm_target
=
3568 Target_arm
<big_endian
>::default_target();
3569 if (is_weakly_undefined_without_plt
)
3571 if (arm_target
->may_use_thumb2_nop())
3573 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
3574 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
3578 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
3579 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
3581 return This::STATUS_OKAY
;
3584 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
3585 Arm_address branch_target
= psymval
->value(object
, addend
);
3586 int32_t branch_offset
= branch_target
- address
;
3588 // We need a stub if the branch offset is too large or if we need
3590 bool may_use_blx
= arm_target
->may_use_blx();
3591 bool thumb2
= arm_target
->using_thumb2();
3593 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3594 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
3596 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
3597 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
3598 || ((thumb_bit
== 0)
3599 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
3600 || r_type
== elfcpp::R_ARM_THM_JUMP24
)))
3602 Stub_type stub_type
=
3603 Reloc_stub::stub_type_for_reloc(r_type
, address
, branch_target
,
3605 if (stub_type
!= arm_stub_none
)
3607 Stub_table
<big_endian
>* stub_table
=
3608 object
->stub_table(relinfo
->data_shndx
);
3609 gold_assert(stub_table
!= NULL
);
3611 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3612 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
3613 gold_assert(stub
!= NULL
);
3614 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3615 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3616 branch_offset
= branch_target
- address
;
3620 // At this point, if we still need to switch mode, the instruction
3621 // must either be a BLX or a BL that can be converted to a BLX.
3624 gold_assert(may_use_blx
3625 && (r_type
== elfcpp::R_ARM_THM_CALL
3626 || r_type
== elfcpp::R_ARM_THM_XPC22
));
3627 // Make sure this is a BLX.
3628 lower_insn
&= ~0x1000U
;
3632 // Make sure this is a BL.
3633 lower_insn
|= 0x1000U
;
3636 if ((lower_insn
& 0x5000U
) == 0x4000U
)
3637 // For a BLX instruction, make sure that the relocation is rounded up
3638 // to a word boundary. This follows the semantics of the instruction
3639 // which specifies that bit 1 of the target address will come from bit
3640 // 1 of the base address.
3641 branch_offset
= (branch_offset
+ 2) & ~3;
3643 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
3644 // We use the Thumb-2 encoding, which is safe even if dealing with
3645 // a Thumb-1 instruction by virtue of our overflow check above. */
3646 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
3647 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
3649 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
3650 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
3653 ? utils::has_overflow
<25>(branch_offset
)
3654 : utils::has_overflow
<23>(branch_offset
))
3655 ? This::STATUS_OVERFLOW
3656 : This::STATUS_OKAY
);
3659 // Relocate THUMB-2 long conditional branches.
3660 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3661 // undefined and we do not use PLT in this relocation. In such a case,
3662 // the branch is converted into an NOP.
3664 template<bool big_endian
>
3665 typename Arm_relocate_functions
<big_endian
>::Status
3666 Arm_relocate_functions
<big_endian
>::thm_jump19(
3667 unsigned char *view
,
3668 const Arm_relobj
<big_endian
>* object
,
3669 const Symbol_value
<32>* psymval
,
3670 Arm_address address
,
3671 Arm_address thumb_bit
)
3673 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3674 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3675 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3676 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3677 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
3679 Arm_address branch_target
= psymval
->value(object
, addend
);
3680 int32_t branch_offset
= branch_target
- address
;
3682 // ??? Should handle interworking? GCC might someday try to
3683 // use this for tail calls.
3684 // FIXME: We do support thumb entry to PLT yet.
3687 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
3688 return This::STATUS_BAD_RELOC
;
3691 // Put RELOCATION back into the insn.
3692 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
3693 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
3695 // Put the relocated value back in the object file:
3696 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
3697 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
3699 return (utils::has_overflow
<21>(branch_offset
)
3700 ? This::STATUS_OVERFLOW
3701 : This::STATUS_OKAY
);
3704 // Get the GOT section, creating it if necessary.
3706 template<bool big_endian
>
3707 Output_data_got
<32, big_endian
>*
3708 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
3710 if (this->got_
== NULL
)
3712 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
3714 this->got_
= new Output_data_got
<32, big_endian
>();
3717 os
= layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
3719 | elfcpp::SHF_WRITE
),
3720 this->got_
, false, true, true,
3723 // The old GNU linker creates a .got.plt section. We just
3724 // create another set of data in the .got section. Note that we
3725 // always create a PLT if we create a GOT, although the PLT
3727 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
3728 os
= layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
3730 | elfcpp::SHF_WRITE
),
3731 this->got_plt_
, false, false,
3734 // The first three entries are reserved.
3735 this->got_plt_
->set_current_data_size(3 * 4);
3737 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
3738 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
3739 Symbol_table::PREDEFINED
,
3741 0, 0, elfcpp::STT_OBJECT
,
3743 elfcpp::STV_HIDDEN
, 0,
3749 // Get the dynamic reloc section, creating it if necessary.
3751 template<bool big_endian
>
3752 typename Target_arm
<big_endian
>::Reloc_section
*
3753 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
3755 if (this->rel_dyn_
== NULL
)
3757 gold_assert(layout
!= NULL
);
3758 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
3759 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
3760 elfcpp::SHF_ALLOC
, this->rel_dyn_
, true,
3761 false, false, false);
3763 return this->rel_dyn_
;
3766 // Insn_template methods.
3768 // Return byte size of an instruction template.
3771 Insn_template::size() const
3773 switch (this->type())
3776 case THUMB16_SPECIAL_TYPE
:
3787 // Return alignment of an instruction template.
3790 Insn_template::alignment() const
3792 switch (this->type())
3795 case THUMB16_SPECIAL_TYPE
:
3806 // Stub_template methods.
3808 Stub_template::Stub_template(
3809 Stub_type type
, const Insn_template
* insns
,
3811 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
3812 entry_in_thumb_mode_(false), relocs_()
3816 // Compute byte size and alignment of stub template.
3817 for (size_t i
= 0; i
< insn_count
; i
++)
3819 unsigned insn_alignment
= insns
[i
].alignment();
3820 size_t insn_size
= insns
[i
].size();
3821 gold_assert((offset
& (insn_alignment
- 1)) == 0);
3822 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
3823 switch (insns
[i
].type())
3825 case Insn_template::THUMB16_TYPE
:
3826 case Insn_template::THUMB16_SPECIAL_TYPE
:
3828 this->entry_in_thumb_mode_
= true;
3831 case Insn_template::THUMB32_TYPE
:
3832 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
3833 this->relocs_
.push_back(Reloc(i
, offset
));
3835 this->entry_in_thumb_mode_
= true;
3838 case Insn_template::ARM_TYPE
:
3839 // Handle cases where the target is encoded within the
3841 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
3842 this->relocs_
.push_back(Reloc(i
, offset
));
3845 case Insn_template::DATA_TYPE
:
3846 // Entry point cannot be data.
3847 gold_assert(i
!= 0);
3848 this->relocs_
.push_back(Reloc(i
, offset
));
3854 offset
+= insn_size
;
3856 this->size_
= offset
;
3861 // Template to implement do_write for a specific target endianity.
3863 template<bool big_endian
>
3865 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
3867 const Stub_template
* stub_template
= this->stub_template();
3868 const Insn_template
* insns
= stub_template
->insns();
3870 // FIXME: We do not handle BE8 encoding yet.
3871 unsigned char* pov
= view
;
3872 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
3874 switch (insns
[i
].type())
3876 case Insn_template::THUMB16_TYPE
:
3877 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
3879 case Insn_template::THUMB16_SPECIAL_TYPE
:
3880 elfcpp::Swap
<16, big_endian
>::writeval(
3882 this->thumb16_special(i
));
3884 case Insn_template::THUMB32_TYPE
:
3886 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
3887 uint32_t lo
= insns
[i
].data() & 0xffff;
3888 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
3889 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
3892 case Insn_template::ARM_TYPE
:
3893 case Insn_template::DATA_TYPE
:
3894 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
3899 pov
+= insns
[i
].size();
3901 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
3904 // Reloc_stub::Key methods.
3906 // Dump a Key as a string for debugging.
3909 Reloc_stub::Key::name() const
3911 if (this->r_sym_
== invalid_index
)
3913 // Global symbol key name
3914 // <stub-type>:<symbol name>:<addend>.
3915 const std::string sym_name
= this->u_
.symbol
->name();
3916 // We need to print two hex number and two colons. So just add 100 bytes
3917 // to the symbol name size.
3918 size_t len
= sym_name
.size() + 100;
3919 char* buffer
= new char[len
];
3920 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
3921 sym_name
.c_str(), this->addend_
);
3922 gold_assert(c
> 0 && c
< static_cast<int>(len
));
3924 return std::string(buffer
);
3928 // local symbol key name
3929 // <stub-type>:<object>:<r_sym>:<addend>.
3930 const size_t len
= 200;
3932 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
3933 this->u_
.relobj
, this->r_sym_
, this->addend_
);
3934 gold_assert(c
> 0 && c
< static_cast<int>(len
));
3935 return std::string(buffer
);
3939 // Reloc_stub methods.
3941 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
3942 // LOCATION to DESTINATION.
3943 // This code is based on the arm_type_of_stub function in
3944 // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub
3948 Reloc_stub::stub_type_for_reloc(
3949 unsigned int r_type
,
3950 Arm_address location
,
3951 Arm_address destination
,
3952 bool target_is_thumb
)
3954 Stub_type stub_type
= arm_stub_none
;
3956 // This is a bit ugly but we want to avoid using a templated class for
3957 // big and little endianities.
3959 bool should_force_pic_veneer
;
3962 if (parameters
->target().is_big_endian())
3964 const Target_arm
<true>* big_endian_target
=
3965 Target_arm
<true>::default_target();
3966 may_use_blx
= big_endian_target
->may_use_blx();
3967 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
3968 thumb2
= big_endian_target
->using_thumb2();
3969 thumb_only
= big_endian_target
->using_thumb_only();
3973 const Target_arm
<false>* little_endian_target
=
3974 Target_arm
<false>::default_target();
3975 may_use_blx
= little_endian_target
->may_use_blx();
3976 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
3977 thumb2
= little_endian_target
->using_thumb2();
3978 thumb_only
= little_endian_target
->using_thumb_only();
3981 int64_t branch_offset
= (int64_t)destination
- location
;
3983 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
3985 // Handle cases where:
3986 // - this call goes too far (different Thumb/Thumb2 max
3988 // - it's a Thumb->Arm call and blx is not available, or it's a
3989 // Thumb->Arm branch (not bl). A stub is needed in this case.
3991 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3992 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
3994 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
3995 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
3996 || ((!target_is_thumb
)
3997 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
3998 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4000 if (target_is_thumb
)
4005 stub_type
= (parameters
->options().shared()
4006 || should_force_pic_veneer
)
4009 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4010 // V5T and above. Stub starts with ARM code, so
4011 // we must be able to switch mode before
4012 // reaching it, which is only possible for 'bl'
4013 // (ie R_ARM_THM_CALL relocation).
4014 ? arm_stub_long_branch_any_thumb_pic
4015 // On V4T, use Thumb code only.
4016 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4020 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4021 ? arm_stub_long_branch_any_any
// V5T and above.
4022 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4026 stub_type
= (parameters
->options().shared()
4027 || should_force_pic_veneer
)
4028 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4029 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4036 // FIXME: We should check that the input section is from an
4037 // object that has interwork enabled.
4039 stub_type
= (parameters
->options().shared()
4040 || should_force_pic_veneer
)
4043 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4044 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4045 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4049 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4050 ? arm_stub_long_branch_any_any
// V5T and above.
4051 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4053 // Handle v4t short branches.
4054 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4055 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4056 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4057 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4061 else if (r_type
== elfcpp::R_ARM_CALL
4062 || r_type
== elfcpp::R_ARM_JUMP24
4063 || r_type
== elfcpp::R_ARM_PLT32
)
4065 if (target_is_thumb
)
4069 // FIXME: We should check that the input section is from an
4070 // object that has interwork enabled.
4072 // We have an extra 2-bytes reach because of
4073 // the mode change (bit 24 (H) of BLX encoding).
4074 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4075 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4076 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4077 || (r_type
== elfcpp::R_ARM_JUMP24
)
4078 || (r_type
== elfcpp::R_ARM_PLT32
))
4080 stub_type
= (parameters
->options().shared()
4081 || should_force_pic_veneer
)
4084 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4085 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4089 ? arm_stub_long_branch_any_any
// V5T and above.
4090 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4096 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4097 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4099 stub_type
= (parameters
->options().shared()
4100 || should_force_pic_veneer
)
4101 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4102 : arm_stub_long_branch_any_any
; /// non-PIC.
4110 // Cortex_a8_stub methods.
4112 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4113 // I is the position of the instruction template in the stub template.
4116 Cortex_a8_stub::do_thumb16_special(size_t i
)
4118 // The only use of this is to copy condition code from a conditional
4119 // branch being worked around to the corresponding conditional branch in
4121 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4123 uint16_t data
= this->stub_template()->insns()[i
].data();
4124 gold_assert((data
& 0xff00U
) == 0xd000U
);
4125 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4129 // Stub_factory methods.
4131 Stub_factory::Stub_factory()
4133 // The instruction template sequences are declared as static
4134 // objects and initialized first time the constructor runs.
4136 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4137 // to reach the stub if necessary.
4138 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4140 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4141 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4142 // dcd R_ARM_ABS32(X)
4145 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4147 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4149 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4150 Insn_template::arm_insn(0xe12fff1c), // bx ip
4151 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4152 // dcd R_ARM_ABS32(X)
4155 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4156 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4158 Insn_template::thumb16_insn(0xb401), // push {r0}
4159 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4160 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4161 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4162 Insn_template::thumb16_insn(0x4760), // bx ip
4163 Insn_template::thumb16_insn(0xbf00), // nop
4164 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4165 // dcd R_ARM_ABS32(X)
4168 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4170 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4172 Insn_template::thumb16_insn(0x4778), // bx pc
4173 Insn_template::thumb16_insn(0x46c0), // nop
4174 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4175 Insn_template::arm_insn(0xe12fff1c), // bx ip
4176 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4177 // dcd R_ARM_ABS32(X)
4180 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4182 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4184 Insn_template::thumb16_insn(0x4778), // bx pc
4185 Insn_template::thumb16_insn(0x46c0), // nop
4186 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4187 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4188 // dcd R_ARM_ABS32(X)
4191 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4192 // one, when the destination is close enough.
4193 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4195 Insn_template::thumb16_insn(0x4778), // bx pc
4196 Insn_template::thumb16_insn(0x46c0), // nop
4197 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4200 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4201 // blx to reach the stub if necessary.
4202 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4204 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4205 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4206 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4207 // dcd R_ARM_REL32(X-4)
4210 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4211 // blx to reach the stub if necessary. We can not add into pc;
4212 // it is not guaranteed to mode switch (different in ARMv6 and
4214 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4216 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4217 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4218 Insn_template::arm_insn(0xe12fff1c), // bx ip
4219 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4220 // dcd R_ARM_REL32(X)
4223 // V4T ARM -> ARM long branch stub, PIC.
4224 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4226 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4227 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4228 Insn_template::arm_insn(0xe12fff1c), // bx ip
4229 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4230 // dcd R_ARM_REL32(X)
4233 // V4T Thumb -> ARM long branch stub, PIC.
4234 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4236 Insn_template::thumb16_insn(0x4778), // bx pc
4237 Insn_template::thumb16_insn(0x46c0), // nop
4238 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4239 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4240 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4241 // dcd R_ARM_REL32(X)
4244 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4246 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4248 Insn_template::thumb16_insn(0xb401), // push {r0}
4249 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4250 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4251 Insn_template::thumb16_insn(0x4484), // add ip, r0
4252 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4253 Insn_template::thumb16_insn(0x4760), // bx ip
4254 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4255 // dcd R_ARM_REL32(X)
4258 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4260 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4262 Insn_template::thumb16_insn(0x4778), // bx pc
4263 Insn_template::thumb16_insn(0x46c0), // nop
4264 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4265 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4266 Insn_template::arm_insn(0xe12fff1c), // bx ip
4267 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4268 // dcd R_ARM_REL32(X)
4271 // Cortex-A8 erratum-workaround stubs.
4273 // Stub used for conditional branches (which may be beyond +/-1MB away,
4274 // so we can't use a conditional branch to reach this stub).
4281 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4283 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4284 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4285 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4289 // Stub used for b.w and bl.w instructions.
4291 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4293 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4296 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4298 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4301 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4302 // instruction (which switches to ARM mode) to point to this stub. Jump to
4303 // the real destination using an ARM-mode branch.
4304 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4306 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4309 // Stub used to provide an interworking for R_ARM_V4BX relocation
4310 // (bx r[n] instruction).
4311 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4313 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4314 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4315 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4318 // Fill in the stub template look-up table. Stub templates are constructed
4319 // per instance of Stub_factory for fast look-up without locking
4320 // in a thread-enabled environment.
4322 this->stub_templates_
[arm_stub_none
] =
4323 new Stub_template(arm_stub_none
, NULL
, 0);
4325 #define DEF_STUB(x) \
4329 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4330 Stub_type type = arm_stub_##x; \
4331 this->stub_templates_[type] = \
4332 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4340 // Stub_table methods.
4342 // Removel all Cortex-A8 stub.
4344 template<bool big_endian
>
4346 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4348 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4349 p
!= this->cortex_a8_stubs_
.end();
4352 this->cortex_a8_stubs_
.clear();
4355 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4357 template<bool big_endian
>
4359 Stub_table
<big_endian
>::relocate_stub(
4361 const Relocate_info
<32, big_endian
>* relinfo
,
4362 Target_arm
<big_endian
>* arm_target
,
4363 Output_section
* output_section
,
4364 unsigned char* view
,
4365 Arm_address address
,
4366 section_size_type view_size
)
4368 const Stub_template
* stub_template
= stub
->stub_template();
4369 if (stub_template
->reloc_count() != 0)
4371 // Adjust view to cover the stub only.
4372 section_size_type offset
= stub
->offset();
4373 section_size_type stub_size
= stub_template
->size();
4374 gold_assert(offset
+ stub_size
<= view_size
);
4376 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4377 address
+ offset
, stub_size
);
4381 // Relocate all stubs in this stub table.
4383 template<bool big_endian
>
4385 Stub_table
<big_endian
>::relocate_stubs(
4386 const Relocate_info
<32, big_endian
>* relinfo
,
4387 Target_arm
<big_endian
>* arm_target
,
4388 Output_section
* output_section
,
4389 unsigned char* view
,
4390 Arm_address address
,
4391 section_size_type view_size
)
4393 // If we are passed a view bigger than the stub table's. we need to
4395 gold_assert(address
== this->address()
4397 == static_cast<section_size_type
>(this->data_size())));
4399 // Relocate all relocation stubs.
4400 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4401 p
!= this->reloc_stubs_
.end();
4403 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4404 address
, view_size
);
4406 // Relocate all Cortex-A8 stubs.
4407 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4408 p
!= this->cortex_a8_stubs_
.end();
4410 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4411 address
, view_size
);
4413 // Relocate all ARM V4BX stubs.
4414 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4415 p
!= this->arm_v4bx_stubs_
.end();
4419 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4420 address
, view_size
);
4424 // Write out the stubs to file.
4426 template<bool big_endian
>
4428 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4430 off_t offset
= this->offset();
4431 const section_size_type oview_size
=
4432 convert_to_section_size_type(this->data_size());
4433 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4435 // Write relocation stubs.
4436 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4437 p
!= this->reloc_stubs_
.end();
4440 Reloc_stub
* stub
= p
->second
;
4441 Arm_address address
= this->address() + stub
->offset();
4443 == align_address(address
,
4444 stub
->stub_template()->alignment()));
4445 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4449 // Write Cortex-A8 stubs.
4450 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4451 p
!= this->cortex_a8_stubs_
.end();
4454 Cortex_a8_stub
* stub
= p
->second
;
4455 Arm_address address
= this->address() + stub
->offset();
4457 == align_address(address
,
4458 stub
->stub_template()->alignment()));
4459 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4463 // Write ARM V4BX relocation stubs.
4464 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4465 p
!= this->arm_v4bx_stubs_
.end();
4471 Arm_address address
= this->address() + (*p
)->offset();
4473 == align_address(address
,
4474 (*p
)->stub_template()->alignment()));
4475 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4479 of
->write_output_view(this->offset(), oview_size
, oview
);
4482 // Update the data size and address alignment of the stub table at the end
4483 // of a relaxation pass. Return true if either the data size or the
4484 // alignment changed in this relaxation pass.
4486 template<bool big_endian
>
4488 Stub_table
<big_endian
>::update_data_size_and_addralign()
4491 unsigned addralign
= 1;
4493 // Go over all stubs in table to compute data size and address alignment.
4495 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4496 p
!= this->reloc_stubs_
.end();
4499 const Stub_template
* stub_template
= p
->second
->stub_template();
4500 addralign
= std::max(addralign
, stub_template
->alignment());
4501 size
= (align_address(size
, stub_template
->alignment())
4502 + stub_template
->size());
4505 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4506 p
!= this->cortex_a8_stubs_
.end();
4509 const Stub_template
* stub_template
= p
->second
->stub_template();
4510 addralign
= std::max(addralign
, stub_template
->alignment());
4511 size
= (align_address(size
, stub_template
->alignment())
4512 + stub_template
->size());
4515 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4516 p
!= this->arm_v4bx_stubs_
.end();
4522 const Stub_template
* stub_template
= (*p
)->stub_template();
4523 addralign
= std::max(addralign
, stub_template
->alignment());
4524 size
= (align_address(size
, stub_template
->alignment())
4525 + stub_template
->size());
4528 // Check if either data size or alignment changed in this pass.
4529 // Update prev_data_size_ and prev_addralign_. These will be used
4530 // as the current data size and address alignment for the next pass.
4531 bool changed
= size
!= this->prev_data_size_
;
4532 this->prev_data_size_
= size
;
4534 if (addralign
!= this->prev_addralign_
)
4536 this->prev_addralign_
= addralign
;
4541 // Finalize the stubs. This sets the offsets of the stubs within the stub
4542 // table. It also marks all input sections needing Cortex-A8 workaround.
4544 template<bool big_endian
>
4546 Stub_table
<big_endian
>::finalize_stubs()
4549 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4550 p
!= this->reloc_stubs_
.end();
4553 Reloc_stub
* stub
= p
->second
;
4554 const Stub_template
* stub_template
= stub
->stub_template();
4555 uint64_t stub_addralign
= stub_template
->alignment();
4556 off
= align_address(off
, stub_addralign
);
4557 stub
->set_offset(off
);
4558 off
+= stub_template
->size();
4561 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4562 p
!= this->cortex_a8_stubs_
.end();
4565 Cortex_a8_stub
* stub
= p
->second
;
4566 const Stub_template
* stub_template
= stub
->stub_template();
4567 uint64_t stub_addralign
= stub_template
->alignment();
4568 off
= align_address(off
, stub_addralign
);
4569 stub
->set_offset(off
);
4570 off
+= stub_template
->size();
4572 // Mark input section so that we can determine later if a code section
4573 // needs the Cortex-A8 workaround quickly.
4574 Arm_relobj
<big_endian
>* arm_relobj
=
4575 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
4576 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
4579 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4580 p
!= this->arm_v4bx_stubs_
.end();
4586 const Stub_template
* stub_template
= (*p
)->stub_template();
4587 uint64_t stub_addralign
= stub_template
->alignment();
4588 off
= align_address(off
, stub_addralign
);
4589 (*p
)->set_offset(off
);
4590 off
+= stub_template
->size();
4593 gold_assert(off
<= this->prev_data_size_
);
4596 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
4597 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
4598 // of the address range seen by the linker.
4600 template<bool big_endian
>
4602 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
4603 Target_arm
<big_endian
>* arm_target
,
4604 unsigned char* view
,
4605 Arm_address view_address
,
4606 section_size_type view_size
)
4608 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
4609 for (Cortex_a8_stub_list::const_iterator p
=
4610 this->cortex_a8_stubs_
.lower_bound(view_address
);
4611 ((p
!= this->cortex_a8_stubs_
.end())
4612 && (p
->first
< (view_address
+ view_size
)));
4615 // We do not store the THUMB bit in the LSB of either the branch address
4616 // or the stub offset. There is no need to strip the LSB.
4617 Arm_address branch_address
= p
->first
;
4618 const Cortex_a8_stub
* stub
= p
->second
;
4619 Arm_address stub_address
= this->address() + stub
->offset();
4621 // Offset of the branch instruction relative to this view.
4622 section_size_type offset
=
4623 convert_to_section_size_type(branch_address
- view_address
);
4624 gold_assert((offset
+ 4) <= view_size
);
4626 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
4627 view
+ offset
, branch_address
);
4631 // Arm_input_section methods.
4633 // Initialize an Arm_input_section.
4635 template<bool big_endian
>
4637 Arm_input_section
<big_endian
>::init()
4639 Relobj
* relobj
= this->relobj();
4640 unsigned int shndx
= this->shndx();
4642 // Cache these to speed up size and alignment queries. It is too slow
4643 // to call section_addraglin and section_size every time.
4644 this->original_addralign_
= relobj
->section_addralign(shndx
);
4645 this->original_size_
= relobj
->section_size(shndx
);
4647 // We want to make this look like the original input section after
4648 // output sections are finalized.
4649 Output_section
* os
= relobj
->output_section(shndx
);
4650 off_t offset
= relobj
->output_section_offset(shndx
);
4651 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
4652 this->set_address(os
->address() + offset
);
4653 this->set_file_offset(os
->offset() + offset
);
4655 this->set_current_data_size(this->original_size_
);
4656 this->finalize_data_size();
4659 template<bool big_endian
>
4661 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
4663 // We have to write out the original section content.
4664 section_size_type section_size
;
4665 const unsigned char* section_contents
=
4666 this->relobj()->section_contents(this->shndx(), §ion_size
, false);
4667 of
->write(this->offset(), section_contents
, section_size
);
4669 // If this owns a stub table and it is not empty, write it.
4670 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
4671 this->stub_table_
->write(of
);
4674 // Finalize data size.
4676 template<bool big_endian
>
4678 Arm_input_section
<big_endian
>::set_final_data_size()
4680 // If this owns a stub table, finalize its data size as well.
4681 if (this->is_stub_table_owner())
4683 uint64_t address
= this->address();
4685 // The stub table comes after the original section contents.
4686 address
+= this->original_size_
;
4687 address
= align_address(address
, this->stub_table_
->addralign());
4688 off_t offset
= this->offset() + (address
- this->address());
4689 this->stub_table_
->set_address_and_file_offset(address
, offset
);
4690 address
+= this->stub_table_
->data_size();
4691 gold_assert(address
== this->address() + this->current_data_size());
4694 this->set_data_size(this->current_data_size());
4697 // Reset address and file offset.
4699 template<bool big_endian
>
4701 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
4703 // Size of the original input section contents.
4704 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
4706 // If this is a stub table owner, account for the stub table size.
4707 if (this->is_stub_table_owner())
4709 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
4711 // Reset the stub table's address and file offset. The
4712 // current data size for child will be updated after that.
4713 stub_table_
->reset_address_and_file_offset();
4714 off
= align_address(off
, stub_table_
->addralign());
4715 off
+= stub_table
->current_data_size();
4718 this->set_current_data_size(off
);
4721 // Arm_exidx_cantunwind methods.
4723 // Write this to Output file OF for a fixed endianity.
4725 template<bool big_endian
>
4727 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
4729 off_t offset
= this->offset();
4730 const section_size_type oview_size
= 8;
4731 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4733 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
4734 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
);
4736 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
4737 gold_assert(os
!= NULL
);
4739 Arm_relobj
<big_endian
>* arm_relobj
=
4740 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
4741 Arm_address output_offset
=
4742 arm_relobj
->get_output_section_offset(this->shndx_
);
4743 Arm_address section_start
;
4744 if(output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
4745 section_start
= os
->address() + output_offset
;
4748 // Currently this only happens for a relaxed section.
4749 const Output_relaxed_input_section
* poris
=
4750 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
4751 gold_assert(poris
!= NULL
);
4752 section_start
= poris
->address();
4755 // We always append this to the end of an EXIDX section.
4756 Arm_address output_address
=
4757 section_start
+ this->relobj_
->section_size(this->shndx_
);
4759 // Write out the entry. The first word either points to the beginning
4760 // or after the end of a text section. The second word is the special
4761 // EXIDX_CANTUNWIND value.
4762 uint32_t prel31_offset
= output_address
- this->address();
4763 if (utils::has_overflow
<31>(offset
))
4764 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
4765 elfcpp::Swap
<32, big_endian
>::writeval(wv
, prel31_offset
& 0x7fffffffU
);
4766 elfcpp::Swap
<32, big_endian
>::writeval(wv
+ 1, elfcpp::EXIDX_CANTUNWIND
);
4768 of
->write_output_view(this->offset(), oview_size
, oview
);
4771 // Arm_exidx_merged_section methods.
4773 // Constructor for Arm_exidx_merged_section.
4774 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
4775 // SECTION_OFFSET_MAP points to a section offset map describing how
4776 // parts of the input section are mapped to output. DELETED_BYTES is
4777 // the number of bytes deleted from the EXIDX input section.
4779 Arm_exidx_merged_section::Arm_exidx_merged_section(
4780 const Arm_exidx_input_section
& exidx_input_section
,
4781 const Arm_exidx_section_offset_map
& section_offset_map
,
4782 uint32_t deleted_bytes
)
4783 : Output_relaxed_input_section(exidx_input_section
.relobj(),
4784 exidx_input_section
.shndx(),
4785 exidx_input_section
.addralign()),
4786 exidx_input_section_(exidx_input_section
),
4787 section_offset_map_(section_offset_map
)
4789 // Fix size here so that we do not need to implement set_final_data_size.
4790 this->set_data_size(exidx_input_section
.size() - deleted_bytes
);
4791 this->fix_data_size();
4794 // Given an input OBJECT, an input section index SHNDX within that
4795 // object, and an OFFSET relative to the start of that input
4796 // section, return whether or not the corresponding offset within
4797 // the output section is known. If this function returns true, it
4798 // sets *POUTPUT to the output offset. The value -1 indicates that
4799 // this input offset is being discarded.
4802 Arm_exidx_merged_section::do_output_offset(
4803 const Relobj
* relobj
,
4805 section_offset_type offset
,
4806 section_offset_type
* poutput
) const
4808 // We only handle offsets for the original EXIDX input section.
4809 if (relobj
!= this->exidx_input_section_
.relobj()
4810 || shndx
!= this->exidx_input_section_
.shndx())
4813 section_offset_type section_size
=
4814 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
4815 if (offset
< 0 || offset
>= section_size
)
4816 // Input offset is out of valid range.
4820 // We need to look up the section offset map to determine the output
4821 // offset. Find the reference point in map that is first offset
4822 // bigger than or equal to this offset.
4823 Arm_exidx_section_offset_map::const_iterator p
=
4824 this->section_offset_map_
.lower_bound(offset
);
4826 // The section offset maps are build such that this should not happen if
4827 // input offset is in the valid range.
4828 gold_assert(p
!= this->section_offset_map_
.end());
4830 // We need to check if this is dropped.
4831 section_offset_type ref
= p
->first
;
4832 section_offset_type mapped_ref
= p
->second
;
4834 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
4835 // Offset is present in output.
4836 *poutput
= mapped_ref
+ (offset
- ref
);
4838 // Offset is discarded owing to EXIDX entry merging.
4845 // Write this to output file OF.
4848 Arm_exidx_merged_section::do_write(Output_file
* of
)
4850 // If we retain or discard the whole EXIDX input section, we would
4852 gold_assert(this->data_size() != this->exidx_input_section_
.size()
4853 && this->data_size() != 0);
4855 off_t offset
= this->offset();
4856 const section_size_type oview_size
= this->data_size();
4857 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4859 Output_section
* os
= this->relobj()->output_section(this->shndx());
4860 gold_assert(os
!= NULL
);
4862 // Get contents of EXIDX input section.
4863 section_size_type section_size
;
4864 const unsigned char* section_contents
=
4865 this->relobj()->section_contents(this->shndx(), §ion_size
, false);
4866 gold_assert(section_size
== this->exidx_input_section_
.size());
4868 // Go over spans of input offsets and write only those that are not
4870 section_offset_type in_start
= 0;
4871 section_offset_type out_start
= 0;
4872 for(Arm_exidx_section_offset_map::const_iterator p
=
4873 this->section_offset_map_
.begin();
4874 p
!= this->section_offset_map_
.end();
4877 section_offset_type in_end
= p
->first
;
4878 gold_assert(in_end
>= in_start
);
4879 section_offset_type out_end
= p
->second
;
4880 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
4883 size_t out_chunk_size
=
4884 convert_types
<size_t>(out_end
- out_start
+ 1);
4885 gold_assert(out_chunk_size
== in_chunk_size
);
4886 memcpy(oview
+ out_start
, section_contents
+ in_start
,
4888 out_start
+= out_chunk_size
;
4890 in_start
+= in_chunk_size
;
4893 gold_assert(convert_to_section_size_type(out_start
) == oview_size
);
4894 of
->write_output_view(this->offset(), oview_size
, oview
);
4897 // Arm_exidx_fixup methods.
4899 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
4900 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
4901 // points to the end of the last seen EXIDX section.
4904 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
4906 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
4907 && this->last_input_section_
!= NULL
)
4909 Relobj
* relobj
= this->last_input_section_
->relobj();
4910 unsigned int text_shndx
= this->last_input_section_
->link();
4911 Arm_exidx_cantunwind
* cantunwind
=
4912 new Arm_exidx_cantunwind(relobj
, text_shndx
);
4913 this->exidx_output_section_
->add_output_section_data(cantunwind
);
4914 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
4918 // Process an EXIDX section entry in input. Return whether this entry
4919 // can be deleted in the output. SECOND_WORD in the second word of the
4923 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
4926 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
4928 // Merge if previous entry is also an EXIDX_CANTUNWIND.
4929 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
4930 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
4932 else if ((second_word
& 0x80000000) != 0)
4934 // Inlined unwinding data. Merge if equal to previous.
4935 delete_entry
= (this->last_unwind_type_
== UT_INLINED_ENTRY
4936 && this->last_inlined_entry_
== second_word
);
4937 this->last_unwind_type_
= UT_INLINED_ENTRY
;
4938 this->last_inlined_entry_
= second_word
;
4942 // Normal table entry. In theory we could merge these too,
4943 // but duplicate entries are likely to be much less common.
4944 delete_entry
= false;
4945 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
4947 return delete_entry
;
4950 // Update the current section offset map during EXIDX section fix-up.
4951 // If there is no map, create one. INPUT_OFFSET is the offset of a
4952 // reference point, DELETED_BYTES is the number of deleted by in the
4953 // section so far. If DELETE_ENTRY is true, the reference point and
4954 // all offsets after the previous reference point are discarded.
4957 Arm_exidx_fixup::update_offset_map(
4958 section_offset_type input_offset
,
4959 section_size_type deleted_bytes
,
4962 if (this->section_offset_map_
== NULL
)
4963 this->section_offset_map_
= new Arm_exidx_section_offset_map();
4964 section_offset_type output_offset
= (delete_entry
4966 : input_offset
- deleted_bytes
);
4967 (*this->section_offset_map_
)[input_offset
] = output_offset
;
4970 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
4971 // bytes deleted. If some entries are merged, also store a pointer to a newly
4972 // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The
4973 // caller owns the map and is responsible for releasing it after use.
4975 template<bool big_endian
>
4977 Arm_exidx_fixup::process_exidx_section(
4978 const Arm_exidx_input_section
* exidx_input_section
,
4979 Arm_exidx_section_offset_map
** psection_offset_map
)
4981 Relobj
* relobj
= exidx_input_section
->relobj();
4982 unsigned shndx
= exidx_input_section
->shndx();
4983 section_size_type section_size
;
4984 const unsigned char* section_contents
=
4985 relobj
->section_contents(shndx
, §ion_size
, false);
4987 if ((section_size
% 8) != 0)
4989 // Something is wrong with this section. Better not touch it.
4990 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
4991 relobj
->name().c_str(), shndx
);
4992 this->last_input_section_
= exidx_input_section
;
4993 this->last_unwind_type_
= UT_NONE
;
4997 uint32_t deleted_bytes
= 0;
4998 bool prev_delete_entry
= false;
4999 gold_assert(this->section_offset_map_
== NULL
);
5001 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5003 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5005 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5006 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5008 bool delete_entry
= this->process_exidx_entry(second_word
);
5010 // Entry deletion causes changes in output offsets. We use a std::map
5011 // to record these. And entry (x, y) means input offset x
5012 // is mapped to output offset y. If y is invalid_offset, then x is
5013 // dropped in the output. Because of the way std::map::lower_bound
5014 // works, we record the last offset in a region w.r.t to keeping or
5015 // dropping. If there is no entry (x0, y0) for an input offset x0,
5016 // the output offset y0 of it is determined by the output offset y1 of
5017 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5018 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1
5020 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5021 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5023 // Update total deleted bytes for this entry.
5027 prev_delete_entry
= delete_entry
;
5030 // If section offset map is not NULL, make an entry for the end of
5032 if (this->section_offset_map_
!= NULL
)
5033 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5035 *psection_offset_map
= this->section_offset_map_
;
5036 this->section_offset_map_
= NULL
;
5037 this->last_input_section_
= exidx_input_section
;
5039 // Set the first output text section so that we can link the EXIDX output
5040 // section to it. Ignore any EXIDX input section that is completely merged.
5041 if (this->first_output_text_section_
== NULL
5042 && deleted_bytes
!= section_size
)
5044 unsigned int link
= exidx_input_section
->link();
5045 Output_section
* os
= relobj
->output_section(link
);
5046 gold_assert(os
!= NULL
);
5047 this->first_output_text_section_
= os
;
5050 return deleted_bytes
;
5053 // Arm_output_section methods.
5055 // Create a stub group for input sections from BEGIN to END. OWNER
5056 // points to the input section to be the owner a new stub table.
5058 template<bool big_endian
>
5060 Arm_output_section
<big_endian
>::create_stub_group(
5061 Input_section_list::const_iterator begin
,
5062 Input_section_list::const_iterator end
,
5063 Input_section_list::const_iterator owner
,
5064 Target_arm
<big_endian
>* target
,
5065 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
)
5067 // We use a different kind of relaxed section in an EXIDX section.
5068 // The static casting from Output_relaxed_input_section to
5069 // Arm_input_section is invalid in an EXIDX section. We are okay
5070 // because we should not be calling this for an EXIDX section.
5071 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5073 // Currently we convert ordinary input sections into relaxed sections only
5074 // at this point but we may want to support creating relaxed input section
5075 // very early. So we check here to see if owner is already a relaxed
5078 Arm_input_section
<big_endian
>* arm_input_section
;
5079 if (owner
->is_relaxed_input_section())
5082 Arm_input_section
<big_endian
>::as_arm_input_section(
5083 owner
->relaxed_input_section());
5087 gold_assert(owner
->is_input_section());
5088 // Create a new relaxed input section.
5090 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5091 new_relaxed_sections
->push_back(arm_input_section
);
5094 // Create a stub table.
5095 Stub_table
<big_endian
>* stub_table
=
5096 target
->new_stub_table(arm_input_section
);
5098 arm_input_section
->set_stub_table(stub_table
);
5100 Input_section_list::const_iterator p
= begin
;
5101 Input_section_list::const_iterator prev_p
;
5103 // Look for input sections or relaxed input sections in [begin ... end].
5106 if (p
->is_input_section() || p
->is_relaxed_input_section())
5108 // The stub table information for input sections live
5109 // in their objects.
5110 Arm_relobj
<big_endian
>* arm_relobj
=
5111 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5112 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5116 while (prev_p
!= end
);
5119 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5120 // of stub groups. We grow a stub group by adding input section until the
5121 // size is just below GROUP_SIZE. The last input section will be converted
5122 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5123 // input section after the stub table, effectively double the group size.
5125 // This is similar to the group_sections() function in elf32-arm.c but is
5126 // implemented differently.
5128 template<bool big_endian
>
5130 Arm_output_section
<big_endian
>::group_sections(
5131 section_size_type group_size
,
5132 bool stubs_always_after_branch
,
5133 Target_arm
<big_endian
>* target
)
5135 // We only care about sections containing code.
5136 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5139 // States for grouping.
5142 // No group is being built.
5144 // A group is being built but the stub table is not found yet.
5145 // We keep group a stub group until the size is just under GROUP_SIZE.
5146 // The last input section in the group will be used as the stub table.
5147 FINDING_STUB_SECTION
,
5148 // A group is being built and we have already found a stub table.
5149 // We enter this state to grow a stub group by adding input section
5150 // after the stub table. This effectively doubles the group size.
5154 // Any newly created relaxed sections are stored here.
5155 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5157 State state
= NO_GROUP
;
5158 section_size_type off
= 0;
5159 section_size_type group_begin_offset
= 0;
5160 section_size_type group_end_offset
= 0;
5161 section_size_type stub_table_end_offset
= 0;
5162 Input_section_list::const_iterator group_begin
=
5163 this->input_sections().end();
5164 Input_section_list::const_iterator stub_table
=
5165 this->input_sections().end();
5166 Input_section_list::const_iterator group_end
= this->input_sections().end();
5167 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5168 p
!= this->input_sections().end();
5171 section_size_type section_begin_offset
=
5172 align_address(off
, p
->addralign());
5173 section_size_type section_end_offset
=
5174 section_begin_offset
+ p
->data_size();
5176 // Check to see if we should group the previously seens sections.
5182 case FINDING_STUB_SECTION
:
5183 // Adding this section makes the group larger than GROUP_SIZE.
5184 if (section_end_offset
- group_begin_offset
>= group_size
)
5186 if (stubs_always_after_branch
)
5188 gold_assert(group_end
!= this->input_sections().end());
5189 this->create_stub_group(group_begin
, group_end
, group_end
,
5190 target
, &new_relaxed_sections
);
5195 // But wait, there's more! Input sections up to
5196 // stub_group_size bytes after the stub table can be
5197 // handled by it too.
5198 state
= HAS_STUB_SECTION
;
5199 stub_table
= group_end
;
5200 stub_table_end_offset
= group_end_offset
;
5205 case HAS_STUB_SECTION
:
5206 // Adding this section makes the post stub-section group larger
5208 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5210 gold_assert(group_end
!= this->input_sections().end());
5211 this->create_stub_group(group_begin
, group_end
, stub_table
,
5212 target
, &new_relaxed_sections
);
5221 // If we see an input section and currently there is no group, start
5222 // a new one. Skip any empty sections.
5223 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5224 && (p
->relobj()->section_size(p
->shndx()) != 0))
5226 if (state
== NO_GROUP
)
5228 state
= FINDING_STUB_SECTION
;
5230 group_begin_offset
= section_begin_offset
;
5233 // Keep track of the last input section seen.
5235 group_end_offset
= section_end_offset
;
5238 off
= section_end_offset
;
5241 // Create a stub group for any ungrouped sections.
5242 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5244 gold_assert(group_end
!= this->input_sections().end());
5245 this->create_stub_group(group_begin
, group_end
,
5246 (state
== FINDING_STUB_SECTION
5249 target
, &new_relaxed_sections
);
5252 // Convert input section into relaxed input section in a batch.
5253 if (!new_relaxed_sections
.empty())
5254 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5256 // Update the section offsets
5257 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5259 Arm_relobj
<big_endian
>* arm_relobj
=
5260 Arm_relobj
<big_endian
>::as_arm_relobj(
5261 new_relaxed_sections
[i
]->relobj());
5262 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5263 // Tell Arm_relobj that this input section is converted.
5264 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5268 // Append non empty text sections in this to LIST in ascending
5269 // order of their position in this.
5271 template<bool big_endian
>
5273 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5274 Text_section_list
* list
)
5276 // We only care about text sections.
5277 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5280 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5282 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5283 p
!= this->input_sections().end();
5286 // We only care about plain or relaxed input sections. We also
5287 // ignore any merged sections.
5288 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5289 && p
->data_size() != 0)
5290 list
->push_back(Text_section_list::value_type(p
->relobj(),
5295 template<bool big_endian
>
5297 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5298 const Text_section_list
& sorted_text_sections
,
5299 Symbol_table
* symtab
)
5301 // We should only do this for the EXIDX output section.
5302 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5304 // We don't want the relaxation loop to undo these changes, so we discard
5305 // the current saved states and take another one after the fix-up.
5306 this->discard_states();
5308 // Remove all input sections.
5309 uint64_t address
= this->address();
5310 typedef std::list
<Simple_input_section
> Simple_input_section_list
;
5311 Simple_input_section_list input_sections
;
5312 this->reset_address_and_file_offset();
5313 this->get_input_sections(address
, std::string(""), &input_sections
);
5315 if (!this->input_sections().empty())
5316 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5318 // Go through all the known input sections and record them.
5319 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5320 Section_id_set known_input_sections
;
5321 for (Simple_input_section_list::const_iterator p
= input_sections
.begin();
5322 p
!= input_sections
.end();
5325 // This should never happen. At this point, we should only see
5326 // plain EXIDX input sections.
5327 gold_assert(!p
->is_relaxed_input_section());
5328 known_input_sections
.insert(Section_id(p
->relobj(), p
->shndx()));
5331 Arm_exidx_fixup
exidx_fixup(this);
5333 // Go over the sorted text sections.
5334 Section_id_set processed_input_sections
;
5335 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5336 p
!= sorted_text_sections
.end();
5339 Relobj
* relobj
= p
->first
;
5340 unsigned int shndx
= p
->second
;
5342 Arm_relobj
<big_endian
>* arm_relobj
=
5343 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5344 const Arm_exidx_input_section
* exidx_input_section
=
5345 arm_relobj
->exidx_input_section_by_link(shndx
);
5347 // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND
5348 // entry pointing to the end of the last seen EXIDX section.
5349 if (exidx_input_section
== NULL
)
5351 exidx_fixup
.add_exidx_cantunwind_as_needed();
5355 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5356 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5357 Section_id
sid(exidx_relobj
, exidx_shndx
);
5358 if (known_input_sections
.find(sid
) == known_input_sections
.end())
5360 // This is odd. We have not seen this EXIDX input section before.
5361 // We cannot do fix-up.
5362 gold_error(_("EXIDX section %u of %s is not in EXIDX output section"),
5363 exidx_shndx
, exidx_relobj
->name().c_str());
5364 exidx_fixup
.add_exidx_cantunwind_as_needed();
5368 // Fix up coverage and append input section to output data list.
5369 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5370 uint32_t deleted_bytes
=
5371 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5372 §ion_offset_map
);
5374 if (deleted_bytes
== exidx_input_section
->size())
5376 // The whole EXIDX section got merged. Remove it from output.
5377 gold_assert(section_offset_map
== NULL
);
5378 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5380 // All local symbols defined in this input section will be dropped.
5381 // We need to adjust output local symbol count.
5382 arm_relobj
->set_output_local_symbol_count_needs_update();
5384 else if (deleted_bytes
> 0)
5386 // Some entries are merged. We need to convert this EXIDX input
5387 // section into a relaxed section.
5388 gold_assert(section_offset_map
!= NULL
);
5389 Arm_exidx_merged_section
* merged_section
=
5390 new Arm_exidx_merged_section(*exidx_input_section
,
5391 *section_offset_map
, deleted_bytes
);
5392 this->add_relaxed_input_section(merged_section
);
5393 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5395 // All local symbols defined in discarded portions of this input
5396 // section will be dropped. We need to adjust output local symbol
5398 arm_relobj
->set_output_local_symbol_count_needs_update();
5402 // Just add back the EXIDX input section.
5403 gold_assert(section_offset_map
== NULL
);
5404 Output_section::Simple_input_section
sis(exidx_relobj
, exidx_shndx
);
5405 this->add_simple_input_section(sis
, exidx_input_section
->size(),
5406 exidx_input_section
->addralign());
5409 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5412 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5413 exidx_fixup
.add_exidx_cantunwind_as_needed();
5415 // Remove any known EXIDX input sections that are not processed.
5416 for (Simple_input_section_list::const_iterator p
= input_sections
.begin();
5417 p
!= input_sections
.end();
5420 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5421 == processed_input_sections
.end())
5423 // We only discard a known EXIDX section because its linked
5424 // text section has been folded by ICF.
5425 Arm_relobj
<big_endian
>* arm_relobj
=
5426 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5427 const Arm_exidx_input_section
* exidx_input_section
=
5428 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5429 gold_assert(exidx_input_section
!= NULL
);
5430 unsigned int text_shndx
= exidx_input_section
->link();
5431 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5433 // Remove this from link.
5434 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5438 // Link exidx output section to the first seen output section and
5439 // set correct entry size.
5440 this->set_link_section(exidx_fixup
.first_output_text_section());
5441 this->set_entsize(8);
5443 // Make changes permanent.
5444 this->save_states();
5445 this->set_section_offsets_need_adjustment();
5448 // Arm_relobj methods.
5450 // Determine if we want to scan the SHNDX-th section for relocation stubs.
5451 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5453 template<bool big_endian
>
5455 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
5456 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5457 const Relobj::Output_sections
& out_sections
,
5458 const Symbol_table
*symtab
,
5459 const unsigned char* pshdrs
)
5461 unsigned int sh_type
= shdr
.get_sh_type();
5462 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
5465 // Ignore empty section.
5466 off_t sh_size
= shdr
.get_sh_size();
5470 // Ignore reloc section with bad info. This error will be
5471 // reported in the final link.
5472 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
5473 if (index
>= this->shnum())
5476 // This relocation section is against a section which we
5477 // discarded or if the section is folded into another
5478 // section due to ICF.
5479 if (out_sections
[index
] == NULL
|| symtab
->is_section_folded(this, index
))
5482 // Check the section to which relocations are applied. Ignore relocations
5483 // to unallocated sections or EXIDX sections.
5484 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
5485 const elfcpp::Shdr
<32, big_endian
> data_shdr(pshdrs
+ index
* shdr_size
);
5486 if ((data_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
5487 || data_shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
5490 // Ignore reloc section with unexpected symbol table. The
5491 // error will be reported in the final link.
5492 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
5495 unsigned int reloc_size
;
5496 if (sh_type
== elfcpp::SHT_REL
)
5497 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
5499 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
5501 // Ignore reloc section with unexpected entsize or uneven size.
5502 // The error will be reported in the final link.
5503 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
5509 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
5510 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5512 template<bool big_endian
>
5514 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
5515 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5518 const Symbol_table
* symtab
)
5520 // We only scan non-empty code sections.
5521 if ((shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0
5522 || shdr
.get_sh_size() == 0)
5525 // Ignore discarded or ICF'ed sections.
5526 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
5529 // Find output address of section.
5530 Arm_address address
= os
->output_address(this, shndx
, 0);
5532 // If the section does not cross any 4K-boundaries, it does not need to
5534 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
5540 // Scan a section for Cortex-A8 workaround.
5542 template<bool big_endian
>
5544 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
5545 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5548 Target_arm
<big_endian
>* arm_target
)
5550 Arm_address output_address
= os
->output_address(this, shndx
, 0);
5552 // Get the section contents.
5553 section_size_type input_view_size
= 0;
5554 const unsigned char* input_view
=
5555 this->section_contents(shndx
, &input_view_size
, false);
5557 // We need to go through the mapping symbols to determine what to
5558 // scan. There are two reasons. First, we should look at THUMB code and
5559 // THUMB code only. Second, we only want to look at the 4K-page boundary
5560 // to speed up the scanning.
5562 // Look for the first mapping symbol in this section. It should be
5564 Mapping_symbol_position
section_start(shndx
, 0);
5565 typename
Mapping_symbols_info::const_iterator p
=
5566 this->mapping_symbols_info_
.lower_bound(section_start
);
5568 if (p
== this->mapping_symbols_info_
.end()
5569 || p
->first
!= section_start
)
5571 gold_warning(_("Cortex-A8 erratum scanning failed because there "
5572 "is no mapping symbols for section %u of %s"),
5573 shndx
, this->name().c_str());
5577 while (p
!= this->mapping_symbols_info_
.end()
5578 && p
->first
.first
== shndx
)
5580 typename
Mapping_symbols_info::const_iterator next
=
5581 this->mapping_symbols_info_
.upper_bound(p
->first
);
5583 // Only scan part of a section with THUMB code.
5584 if (p
->second
== 't')
5586 // Determine the end of this range.
5587 section_size_type span_start
=
5588 convert_to_section_size_type(p
->first
.second
);
5589 section_size_type span_end
;
5590 if (next
!= this->mapping_symbols_info_
.end()
5591 && next
->first
.first
== shndx
)
5592 span_end
= convert_to_section_size_type(next
->first
.second
);
5594 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
5596 if (((span_start
+ output_address
) & ~0xfffUL
)
5597 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
5599 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
5600 span_start
, span_end
,
5610 // Scan relocations for stub generation.
5612 template<bool big_endian
>
5614 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
5615 Target_arm
<big_endian
>* arm_target
,
5616 const Symbol_table
* symtab
,
5617 const Layout
* layout
)
5619 unsigned int shnum
= this->shnum();
5620 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
5622 // Read the section headers.
5623 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
5627 // To speed up processing, we set up hash tables for fast lookup of
5628 // input offsets to output addresses.
5629 this->initialize_input_to_output_maps();
5631 const Relobj::Output_sections
& out_sections(this->output_sections());
5633 Relocate_info
<32, big_endian
> relinfo
;
5634 relinfo
.symtab
= symtab
;
5635 relinfo
.layout
= layout
;
5636 relinfo
.object
= this;
5638 // Do relocation stubs scanning.
5639 const unsigned char* p
= pshdrs
+ shdr_size
;
5640 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
5642 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
5643 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
5646 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
5647 Arm_address output_offset
= this->get_output_section_offset(index
);
5648 Arm_address output_address
;
5649 if(output_offset
!= invalid_address
)
5650 output_address
= out_sections
[index
]->address() + output_offset
;
5653 // Currently this only happens for a relaxed section.
5654 const Output_relaxed_input_section
* poris
=
5655 out_sections
[index
]->find_relaxed_input_section(this, index
);
5656 gold_assert(poris
!= NULL
);
5657 output_address
= poris
->address();
5660 // Get the relocations.
5661 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
5665 // Get the section contents. This does work for the case in which
5666 // we modify the contents of an input section. We need to pass the
5667 // output view under such circumstances.
5668 section_size_type input_view_size
= 0;
5669 const unsigned char* input_view
=
5670 this->section_contents(index
, &input_view_size
, false);
5672 relinfo
.reloc_shndx
= i
;
5673 relinfo
.data_shndx
= index
;
5674 unsigned int sh_type
= shdr
.get_sh_type();
5675 unsigned int reloc_size
;
5676 if (sh_type
== elfcpp::SHT_REL
)
5677 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
5679 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
5681 Output_section
* os
= out_sections
[index
];
5682 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
5683 shdr
.get_sh_size() / reloc_size
,
5685 output_offset
== invalid_address
,
5686 input_view
, output_address
,
5691 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
5692 // after its relocation section, if there is one, is processed for
5693 // relocation stubs. Merging this loop with the one above would have been
5694 // complicated since we would have had to make sure that relocation stub
5695 // scanning is done first.
5696 if (arm_target
->fix_cortex_a8())
5698 const unsigned char* p
= pshdrs
+ shdr_size
;
5699 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
5701 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
5702 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
5705 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
5710 // After we've done the relocations, we release the hash tables,
5711 // since we no longer need them.
5712 this->free_input_to_output_maps();
5715 // Count the local symbols. The ARM backend needs to know if a symbol
5716 // is a THUMB function or not. For global symbols, it is easy because
5717 // the Symbol object keeps the ELF symbol type. For local symbol it is
5718 // harder because we cannot access this information. So we override the
5719 // do_count_local_symbol in parent and scan local symbols to mark
5720 // THUMB functions. This is not the most efficient way but I do not want to
5721 // slow down other ports by calling a per symbol targer hook inside
5722 // Sized_relobj<size, big_endian>::do_count_local_symbols.
5724 template<bool big_endian
>
5726 Arm_relobj
<big_endian
>::do_count_local_symbols(
5727 Stringpool_template
<char>* pool
,
5728 Stringpool_template
<char>* dynpool
)
5730 // We need to fix-up the values of any local symbols whose type are
5733 // Ask parent to count the local symbols.
5734 Sized_relobj
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
5735 const unsigned int loccount
= this->local_symbol_count();
5739 // Intialize the thumb function bit-vector.
5740 std::vector
<bool> empty_vector(loccount
, false);
5741 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
5743 // Read the symbol table section header.
5744 const unsigned int symtab_shndx
= this->symtab_shndx();
5745 elfcpp::Shdr
<32, big_endian
>
5746 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
5747 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
5749 // Read the local symbols.
5750 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
5751 gold_assert(loccount
== symtabshdr
.get_sh_info());
5752 off_t locsize
= loccount
* sym_size
;
5753 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
5754 locsize
, true, true);
5756 // For mapping symbol processing, we need to read the symbol names.
5757 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
5758 if (strtab_shndx
>= this->shnum())
5760 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
5764 elfcpp::Shdr
<32, big_endian
>
5765 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
5766 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
5768 this->error(_("symbol table name section has wrong type: %u"),
5769 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
5772 const char* pnames
=
5773 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
5774 strtabshdr
.get_sh_size(),
5777 // Loop over the local symbols and mark any local symbols pointing
5778 // to THUMB functions.
5780 // Skip the first dummy symbol.
5782 typename Sized_relobj
<32, big_endian
>::Local_values
* plocal_values
=
5783 this->local_values();
5784 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
5786 elfcpp::Sym
<32, big_endian
> sym(psyms
);
5787 elfcpp::STT st_type
= sym
.get_st_type();
5788 Symbol_value
<32>& lv((*plocal_values
)[i
]);
5789 Arm_address input_value
= lv
.input_value();
5791 // Check to see if this is a mapping symbol.
5792 const char* sym_name
= pnames
+ sym
.get_st_name();
5793 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
5795 unsigned int input_shndx
= sym
.get_st_shndx();
5797 // Strip of LSB in case this is a THUMB symbol.
5798 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
5799 this->mapping_symbols_info_
[msp
] = sym_name
[1];
5802 if (st_type
== elfcpp::STT_ARM_TFUNC
5803 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
5805 // This is a THUMB function. Mark this and canonicalize the
5806 // symbol value by setting LSB.
5807 this->local_symbol_is_thumb_function_
[i
] = true;
5808 if ((input_value
& 1) == 0)
5809 lv
.set_input_value(input_value
| 1);
5814 // Relocate sections.
5815 template<bool big_endian
>
5817 Arm_relobj
<big_endian
>::do_relocate_sections(
5818 const Symbol_table
* symtab
,
5819 const Layout
* layout
,
5820 const unsigned char* pshdrs
,
5821 typename Sized_relobj
<32, big_endian
>::Views
* pviews
)
5823 // Call parent to relocate sections.
5824 Sized_relobj
<32, big_endian
>::do_relocate_sections(symtab
, layout
, pshdrs
,
5827 // We do not generate stubs if doing a relocatable link.
5828 if (parameters
->options().relocatable())
5831 // Relocate stub tables.
5832 unsigned int shnum
= this->shnum();
5834 Target_arm
<big_endian
>* arm_target
=
5835 Target_arm
<big_endian
>::default_target();
5837 Relocate_info
<32, big_endian
> relinfo
;
5838 relinfo
.symtab
= symtab
;
5839 relinfo
.layout
= layout
;
5840 relinfo
.object
= this;
5842 for (unsigned int i
= 1; i
< shnum
; ++i
)
5844 Arm_input_section
<big_endian
>* arm_input_section
=
5845 arm_target
->find_arm_input_section(this, i
);
5847 if (arm_input_section
!= NULL
5848 && arm_input_section
->is_stub_table_owner()
5849 && !arm_input_section
->stub_table()->empty())
5851 // We cannot discard a section if it owns a stub table.
5852 Output_section
* os
= this->output_section(i
);
5853 gold_assert(os
!= NULL
);
5855 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
5856 relinfo
.reloc_shdr
= NULL
;
5857 relinfo
.data_shndx
= i
;
5858 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
5860 gold_assert((*pviews
)[i
].view
!= NULL
);
5862 // We are passed the output section view. Adjust it to cover the
5864 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
5865 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
5866 && ((stub_table
->address() + stub_table
->data_size())
5867 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
5869 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
5870 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
5871 Arm_address address
= stub_table
->address();
5872 section_size_type view_size
= stub_table
->data_size();
5874 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
5878 // Apply Cortex A8 workaround if applicable.
5879 if (this->section_has_cortex_a8_workaround(i
))
5881 unsigned char* view
= (*pviews
)[i
].view
;
5882 Arm_address view_address
= (*pviews
)[i
].address
;
5883 section_size_type view_size
= (*pviews
)[i
].view_size
;
5884 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
5886 // Adjust view to cover section.
5887 Output_section
* os
= this->output_section(i
);
5888 gold_assert(os
!= NULL
);
5889 Arm_address section_address
= os
->output_address(this, i
, 0);
5890 uint64_t section_size
= this->section_size(i
);
5892 gold_assert(section_address
>= view_address
5893 && ((section_address
+ section_size
)
5894 <= (view_address
+ view_size
)));
5896 unsigned char* section_view
= view
+ (section_address
- view_address
);
5898 // Apply the Cortex-A8 workaround to the output address range
5899 // corresponding to this input section.
5900 stub_table
->apply_cortex_a8_workaround_to_address_range(
5909 // Create a new EXIDX input section object for EXIDX section SHNDX with
5912 template<bool big_endian
>
5914 Arm_relobj
<big_endian
>::make_exidx_input_section(
5916 const elfcpp::Shdr
<32, big_endian
>& shdr
)
5918 // Link .text section to its .ARM.exidx section in the same object.
5919 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
5921 // Issue an error and ignore this EXIDX section if it does not point
5922 // to any text section.
5923 if (text_shndx
== elfcpp::SHN_UNDEF
)
5925 gold_error(_("EXIDX section %u in %s has no linked text section"),
5926 shndx
, this->name().c_str());
5930 // Issue an error and ignore this EXIDX section if it points to a text
5931 // section already has an EXIDX section.
5932 if (this->exidx_section_map_
[text_shndx
] != NULL
)
5934 gold_error(_("EXIDX sections %u and %u both link to text section %u "
5936 shndx
, this->exidx_section_map_
[text_shndx
]->shndx(),
5937 text_shndx
, this->name().c_str());
5941 // Create an Arm_exidx_input_section object for this EXIDX section.
5942 Arm_exidx_input_section
* exidx_input_section
=
5943 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
5944 shdr
.get_sh_addralign());
5945 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
5947 // Also map the EXIDX section index to this.
5948 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
5949 this->exidx_section_map_
[shndx
] = exidx_input_section
;
5952 // Read the symbol information.
5954 template<bool big_endian
>
5956 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
5958 // Call parent class to read symbol information.
5959 Sized_relobj
<32, big_endian
>::do_read_symbols(sd
);
5961 // Read processor-specific flags in ELF file header.
5962 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
5963 elfcpp::Elf_sizes
<32>::ehdr_size
,
5965 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
5966 this->processor_specific_flags_
= ehdr
.get_e_flags();
5968 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
5970 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
5971 const unsigned char *ps
=
5972 sd
->section_headers
->data() + shdr_size
;
5973 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
5975 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
5976 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
5978 gold_assert(this->attributes_section_data_
== NULL
);
5979 section_offset_type section_offset
= shdr
.get_sh_offset();
5980 section_size_type section_size
=
5981 convert_to_section_size_type(shdr
.get_sh_size());
5982 File_view
* view
= this->get_lasting_view(section_offset
,
5983 section_size
, true, false);
5984 this->attributes_section_data_
=
5985 new Attributes_section_data(view
->data(), section_size
);
5987 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
5988 this->make_exidx_input_section(i
, shdr
);
5992 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
5993 // sections for unwinding. These sections are referenced implicitly by
5994 // text sections linked in the section headers. If we ignore these implict
5995 // references, the .ARM.exidx sections and any .ARM.extab sections they use
5996 // will be garbage-collected incorrectly. Hence we override the same function
5997 // in the base class to handle these implicit references.
5999 template<bool big_endian
>
6001 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6003 Read_relocs_data
* rd
)
6005 // First, call base class method to process relocations in this object.
6006 Sized_relobj
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6008 unsigned int shnum
= this->shnum();
6009 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6010 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6014 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6015 // to these from the linked text sections.
6016 const unsigned char* ps
= pshdrs
+ shdr_size
;
6017 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6019 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6020 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6022 // Found an .ARM.exidx section, add it to the set of reachable
6023 // sections from its linked text section.
6024 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6025 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6030 // Update output local symbol count. Owing to EXIDX entry merging, some local
6031 // symbols will be removed in output. Adjust output local symbol count
6032 // accordingly. We can only changed the static output local symbol count. It
6033 // is too late to change the dynamic symbols.
6035 template<bool big_endian
>
6037 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6039 // Caller should check that this needs updating. We want caller checking
6040 // because output_local_symbol_count_needs_update() is most likely inlined.
6041 gold_assert(this->output_local_symbol_count_needs_update_
);
6043 gold_assert(this->symtab_shndx() != -1U);
6044 if (this->symtab_shndx() == 0)
6046 // This object has no symbols. Weird but legal.
6050 // Read the symbol table section header.
6051 const unsigned int symtab_shndx
= this->symtab_shndx();
6052 elfcpp::Shdr
<32, big_endian
>
6053 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6054 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6056 // Read the local symbols.
6057 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6058 const unsigned int loccount
= this->local_symbol_count();
6059 gold_assert(loccount
== symtabshdr
.get_sh_info());
6060 off_t locsize
= loccount
* sym_size
;
6061 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6062 locsize
, true, true);
6064 // Loop over the local symbols.
6066 typedef typename Sized_relobj
<32, big_endian
>::Output_sections
6068 const Output_sections
& out_sections(this->output_sections());
6069 unsigned int shnum
= this->shnum();
6070 unsigned int count
= 0;
6071 // Skip the first, dummy, symbol.
6073 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6075 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6077 Symbol_value
<32>& lv((*this->local_values())[i
]);
6079 // This local symbol was already discarded by do_count_local_symbols.
6080 if (!lv
.needs_output_symtab_entry())
6084 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
6089 Output_section
* os
= out_sections
[shndx
];
6091 // This local symbol no longer has an output section. Discard it.
6094 lv
.set_no_output_symtab_entry();
6098 // Currently we only discard parts of EXIDX input sections.
6099 // We explicitly check for a merged EXIDX input section to avoid
6100 // calling Output_section_data::output_offset unless necessary.
6101 if ((this->get_output_section_offset(shndx
) == invalid_address
)
6102 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
6104 section_offset_type output_offset
=
6105 os
->output_offset(this, shndx
, lv
.input_value());
6106 if (output_offset
== -1)
6108 // This symbol is defined in a part of an EXIDX input section
6109 // that is discarded due to entry merging.
6110 lv
.set_no_output_symtab_entry();
6119 this->set_output_local_symbol_count(count
);
6120 this->output_local_symbol_count_needs_update_
= false;
6123 // Arm_dynobj methods.
6125 // Read the symbol information.
6127 template<bool big_endian
>
6129 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6131 // Call parent class to read symbol information.
6132 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6134 // Read processor-specific flags in ELF file header.
6135 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6136 elfcpp::Elf_sizes
<32>::ehdr_size
,
6138 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6139 this->processor_specific_flags_
= ehdr
.get_e_flags();
6141 // Read the attributes section if there is one.
6142 // We read from the end because gas seems to put it near the end of
6143 // the section headers.
6144 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6145 const unsigned char *ps
=
6146 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6147 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6149 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6150 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6152 section_offset_type section_offset
= shdr
.get_sh_offset();
6153 section_size_type section_size
=
6154 convert_to_section_size_type(shdr
.get_sh_size());
6155 File_view
* view
= this->get_lasting_view(section_offset
,
6156 section_size
, true, false);
6157 this->attributes_section_data_
=
6158 new Attributes_section_data(view
->data(), section_size
);
6164 // Stub_addend_reader methods.
6166 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6168 template<bool big_endian
>
6169 elfcpp::Elf_types
<32>::Elf_Swxword
6170 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
6171 unsigned int r_type
,
6172 const unsigned char* view
,
6173 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
6175 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
6179 case elfcpp::R_ARM_CALL
:
6180 case elfcpp::R_ARM_JUMP24
:
6181 case elfcpp::R_ARM_PLT32
:
6183 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
6184 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6185 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
6186 return utils::sign_extend
<26>(val
<< 2);
6189 case elfcpp::R_ARM_THM_CALL
:
6190 case elfcpp::R_ARM_THM_JUMP24
:
6191 case elfcpp::R_ARM_THM_XPC22
:
6193 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
6194 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6195 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
6196 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
6197 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
6200 case elfcpp::R_ARM_THM_JUMP19
:
6202 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
6203 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6204 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
6205 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
6206 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
6214 // A class to handle the PLT data.
6216 template<bool big_endian
>
6217 class Output_data_plt_arm
: public Output_section_data
6220 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
6223 Output_data_plt_arm(Layout
*, Output_data_space
*);
6225 // Add an entry to the PLT.
6227 add_entry(Symbol
* gsym
);
6229 // Return the .rel.plt section data.
6230 const Reloc_section
*
6232 { return this->rel_
; }
6236 do_adjust_output_section(Output_section
* os
);
6238 // Write to a map file.
6240 do_print_to_mapfile(Mapfile
* mapfile
) const
6241 { mapfile
->print_output_data(this, _("** PLT")); }
6244 // Template for the first PLT entry.
6245 static const uint32_t first_plt_entry
[5];
6247 // Template for subsequent PLT entries.
6248 static const uint32_t plt_entry
[3];
6250 // Set the final size.
6252 set_final_data_size()
6254 this->set_data_size(sizeof(first_plt_entry
)
6255 + this->count_
* sizeof(plt_entry
));
6258 // Write out the PLT data.
6260 do_write(Output_file
*);
6262 // The reloc section.
6263 Reloc_section
* rel_
;
6264 // The .got.plt section.
6265 Output_data_space
* got_plt_
;
6266 // The number of PLT entries.
6267 unsigned int count_
;
6270 // Create the PLT section. The ordinary .got section is an argument,
6271 // since we need to refer to the start. We also create our own .got
6272 // section just for PLT entries.
6274 template<bool big_endian
>
6275 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
6276 Output_data_space
* got_plt
)
6277 : Output_section_data(4), got_plt_(got_plt
), count_(0)
6279 this->rel_
= new Reloc_section(false);
6280 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
6281 elfcpp::SHF_ALLOC
, this->rel_
, true, false,
6285 template<bool big_endian
>
6287 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
6292 // Add an entry to the PLT.
6294 template<bool big_endian
>
6296 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
6298 gold_assert(!gsym
->has_plt_offset());
6300 // Note that when setting the PLT offset we skip the initial
6301 // reserved PLT entry.
6302 gsym
->set_plt_offset((this->count_
) * sizeof(plt_entry
)
6303 + sizeof(first_plt_entry
));
6307 section_offset_type got_offset
= this->got_plt_
->current_data_size();
6309 // Every PLT entry needs a GOT entry which points back to the PLT
6310 // entry (this will be changed by the dynamic linker, normally
6311 // lazily when the function is called).
6312 this->got_plt_
->set_current_data_size(got_offset
+ 4);
6314 // Every PLT entry needs a reloc.
6315 gsym
->set_needs_dynsym_entry();
6316 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
6319 // Note that we don't need to save the symbol. The contents of the
6320 // PLT are independent of which symbols are used. The symbols only
6321 // appear in the relocations.
6325 // FIXME: This is not very flexible. Right now this has only been tested
6326 // on armv5te. If we are to support additional architecture features like
6327 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
6329 // The first entry in the PLT.
6330 template<bool big_endian
>
6331 const uint32_t Output_data_plt_arm
<big_endian
>::first_plt_entry
[5] =
6333 0xe52de004, // str lr, [sp, #-4]!
6334 0xe59fe004, // ldr lr, [pc, #4]
6335 0xe08fe00e, // add lr, pc, lr
6336 0xe5bef008, // ldr pc, [lr, #8]!
6337 0x00000000, // &GOT[0] - .
6340 // Subsequent entries in the PLT.
6342 template<bool big_endian
>
6343 const uint32_t Output_data_plt_arm
<big_endian
>::plt_entry
[3] =
6345 0xe28fc600, // add ip, pc, #0xNN00000
6346 0xe28cca00, // add ip, ip, #0xNN000
6347 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
6350 // Write out the PLT. This uses the hand-coded instructions above,
6351 // and adjusts them as needed. This is all specified by the arm ELF
6352 // Processor Supplement.
6354 template<bool big_endian
>
6356 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
6358 const off_t offset
= this->offset();
6359 const section_size_type oview_size
=
6360 convert_to_section_size_type(this->data_size());
6361 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
6363 const off_t got_file_offset
= this->got_plt_
->offset();
6364 const section_size_type got_size
=
6365 convert_to_section_size_type(this->got_plt_
->data_size());
6366 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
6368 unsigned char* pov
= oview
;
6370 Arm_address plt_address
= this->address();
6371 Arm_address got_address
= this->got_plt_
->address();
6373 // Write first PLT entry. All but the last word are constants.
6374 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
6375 / sizeof(plt_entry
[0]));
6376 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
6377 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
6378 // Last word in first PLT entry is &GOT[0] - .
6379 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
6380 got_address
- (plt_address
+ 16));
6381 pov
+= sizeof(first_plt_entry
);
6383 unsigned char* got_pov
= got_view
;
6385 memset(got_pov
, 0, 12);
6388 const int rel_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6389 unsigned int plt_offset
= sizeof(first_plt_entry
);
6390 unsigned int plt_rel_offset
= 0;
6391 unsigned int got_offset
= 12;
6392 const unsigned int count
= this->count_
;
6393 for (unsigned int i
= 0;
6396 pov
+= sizeof(plt_entry
),
6398 plt_offset
+= sizeof(plt_entry
),
6399 plt_rel_offset
+= rel_size
,
6402 // Set and adjust the PLT entry itself.
6403 int32_t offset
= ((got_address
+ got_offset
)
6404 - (plt_address
+ plt_offset
+ 8));
6406 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
6407 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
6408 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
6409 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
6410 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
6411 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
6412 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
6414 // Set the entry in the GOT.
6415 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
6418 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
6419 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
6421 of
->write_output_view(offset
, oview_size
, oview
);
6422 of
->write_output_view(got_file_offset
, got_size
, got_view
);
6425 // Create a PLT entry for a global symbol.
6427 template<bool big_endian
>
6429 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
6432 if (gsym
->has_plt_offset())
6435 if (this->plt_
== NULL
)
6437 // Create the GOT sections first.
6438 this->got_section(symtab
, layout
);
6440 this->plt_
= new Output_data_plt_arm
<big_endian
>(layout
, this->got_plt_
);
6441 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
6443 | elfcpp::SHF_EXECINSTR
),
6444 this->plt_
, false, false, false, false);
6446 this->plt_
->add_entry(gsym
);
6449 // Report an unsupported relocation against a local symbol.
6451 template<bool big_endian
>
6453 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
6454 Sized_relobj
<32, big_endian
>* object
,
6455 unsigned int r_type
)
6457 gold_error(_("%s: unsupported reloc %u against local symbol"),
6458 object
->name().c_str(), r_type
);
6461 // We are about to emit a dynamic relocation of type R_TYPE. If the
6462 // dynamic linker does not support it, issue an error. The GNU linker
6463 // only issues a non-PIC error for an allocated read-only section.
6464 // Here we know the section is allocated, but we don't know that it is
6465 // read-only. But we check for all the relocation types which the
6466 // glibc dynamic linker supports, so it seems appropriate to issue an
6467 // error even if the section is not read-only.
6469 template<bool big_endian
>
6471 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
6472 unsigned int r_type
)
6476 // These are the relocation types supported by glibc for ARM.
6477 case elfcpp::R_ARM_RELATIVE
:
6478 case elfcpp::R_ARM_COPY
:
6479 case elfcpp::R_ARM_GLOB_DAT
:
6480 case elfcpp::R_ARM_JUMP_SLOT
:
6481 case elfcpp::R_ARM_ABS32
:
6482 case elfcpp::R_ARM_ABS32_NOI
:
6483 case elfcpp::R_ARM_PC24
:
6484 // FIXME: The following 3 types are not supported by Android's dynamic
6486 case elfcpp::R_ARM_TLS_DTPMOD32
:
6487 case elfcpp::R_ARM_TLS_DTPOFF32
:
6488 case elfcpp::R_ARM_TLS_TPOFF32
:
6492 // This prevents us from issuing more than one error per reloc
6493 // section. But we can still wind up issuing more than one
6494 // error per object file.
6495 if (this->issued_non_pic_error_
)
6497 object
->error(_("requires unsupported dynamic reloc; "
6498 "recompile with -fPIC"));
6499 this->issued_non_pic_error_
= true;
6502 case elfcpp::R_ARM_NONE
:
6507 // Scan a relocation for a local symbol.
6508 // FIXME: This only handles a subset of relocation types used by Android
6509 // on ARM v5te devices.
6511 template<bool big_endian
>
6513 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
6516 Sized_relobj
<32, big_endian
>* object
,
6517 unsigned int data_shndx
,
6518 Output_section
* output_section
,
6519 const elfcpp::Rel
<32, big_endian
>& reloc
,
6520 unsigned int r_type
,
6521 const elfcpp::Sym
<32, big_endian
>&)
6523 r_type
= get_real_reloc_type(r_type
);
6526 case elfcpp::R_ARM_NONE
:
6529 case elfcpp::R_ARM_ABS32
:
6530 case elfcpp::R_ARM_ABS32_NOI
:
6531 // If building a shared library (or a position-independent
6532 // executable), we need to create a dynamic relocation for
6533 // this location. The relocation applied at link time will
6534 // apply the link-time value, so we flag the location with
6535 // an R_ARM_RELATIVE relocation so the dynamic loader can
6536 // relocate it easily.
6537 if (parameters
->options().output_is_position_independent())
6539 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6540 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
6541 // If we are to add more other reloc types than R_ARM_ABS32,
6542 // we need to add check_non_pic(object, r_type) here.
6543 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
6544 output_section
, data_shndx
,
6545 reloc
.get_r_offset());
6549 case elfcpp::R_ARM_REL32
:
6550 case elfcpp::R_ARM_THM_CALL
:
6551 case elfcpp::R_ARM_CALL
:
6552 case elfcpp::R_ARM_PREL31
:
6553 case elfcpp::R_ARM_JUMP24
:
6554 case elfcpp::R_ARM_THM_JUMP24
:
6555 case elfcpp::R_ARM_THM_JUMP19
:
6556 case elfcpp::R_ARM_PLT32
:
6557 case elfcpp::R_ARM_THM_ABS5
:
6558 case elfcpp::R_ARM_ABS8
:
6559 case elfcpp::R_ARM_ABS12
:
6560 case elfcpp::R_ARM_ABS16
:
6561 case elfcpp::R_ARM_BASE_ABS
:
6562 case elfcpp::R_ARM_MOVW_ABS_NC
:
6563 case elfcpp::R_ARM_MOVT_ABS
:
6564 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
6565 case elfcpp::R_ARM_THM_MOVT_ABS
:
6566 case elfcpp::R_ARM_MOVW_PREL_NC
:
6567 case elfcpp::R_ARM_MOVT_PREL
:
6568 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
6569 case elfcpp::R_ARM_THM_MOVT_PREL
:
6570 case elfcpp::R_ARM_MOVW_BREL_NC
:
6571 case elfcpp::R_ARM_MOVT_BREL
:
6572 case elfcpp::R_ARM_MOVW_BREL
:
6573 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
6574 case elfcpp::R_ARM_THM_MOVT_BREL
:
6575 case elfcpp::R_ARM_THM_MOVW_BREL
:
6576 case elfcpp::R_ARM_THM_JUMP6
:
6577 case elfcpp::R_ARM_THM_JUMP8
:
6578 case elfcpp::R_ARM_THM_JUMP11
:
6579 case elfcpp::R_ARM_V4BX
:
6580 case elfcpp::R_ARM_THM_PC8
:
6581 case elfcpp::R_ARM_THM_PC12
:
6582 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
6583 case elfcpp::R_ARM_ALU_PC_G0_NC
:
6584 case elfcpp::R_ARM_ALU_PC_G0
:
6585 case elfcpp::R_ARM_ALU_PC_G1_NC
:
6586 case elfcpp::R_ARM_ALU_PC_G1
:
6587 case elfcpp::R_ARM_ALU_PC_G2
:
6588 case elfcpp::R_ARM_ALU_SB_G0_NC
:
6589 case elfcpp::R_ARM_ALU_SB_G0
:
6590 case elfcpp::R_ARM_ALU_SB_G1_NC
:
6591 case elfcpp::R_ARM_ALU_SB_G1
:
6592 case elfcpp::R_ARM_ALU_SB_G2
:
6593 case elfcpp::R_ARM_LDR_PC_G0
:
6594 case elfcpp::R_ARM_LDR_PC_G1
:
6595 case elfcpp::R_ARM_LDR_PC_G2
:
6596 case elfcpp::R_ARM_LDR_SB_G0
:
6597 case elfcpp::R_ARM_LDR_SB_G1
:
6598 case elfcpp::R_ARM_LDR_SB_G2
:
6599 case elfcpp::R_ARM_LDRS_PC_G0
:
6600 case elfcpp::R_ARM_LDRS_PC_G1
:
6601 case elfcpp::R_ARM_LDRS_PC_G2
:
6602 case elfcpp::R_ARM_LDRS_SB_G0
:
6603 case elfcpp::R_ARM_LDRS_SB_G1
:
6604 case elfcpp::R_ARM_LDRS_SB_G2
:
6605 case elfcpp::R_ARM_LDC_PC_G0
:
6606 case elfcpp::R_ARM_LDC_PC_G1
:
6607 case elfcpp::R_ARM_LDC_PC_G2
:
6608 case elfcpp::R_ARM_LDC_SB_G0
:
6609 case elfcpp::R_ARM_LDC_SB_G1
:
6610 case elfcpp::R_ARM_LDC_SB_G2
:
6613 case elfcpp::R_ARM_GOTOFF32
:
6614 // We need a GOT section:
6615 target
->got_section(symtab
, layout
);
6618 case elfcpp::R_ARM_BASE_PREL
:
6619 // FIXME: What about this?
6622 case elfcpp::R_ARM_GOT_BREL
:
6623 case elfcpp::R_ARM_GOT_PREL
:
6625 // The symbol requires a GOT entry.
6626 Output_data_got
<32, big_endian
>* got
=
6627 target
->got_section(symtab
, layout
);
6628 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
6629 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
6631 // If we are generating a shared object, we need to add a
6632 // dynamic RELATIVE relocation for this symbol's GOT entry.
6633 if (parameters
->options().output_is_position_independent())
6635 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6636 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
6637 rel_dyn
->add_local_relative(
6638 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
6639 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
6645 case elfcpp::R_ARM_TARGET1
:
6646 // This should have been mapped to another type already.
6648 case elfcpp::R_ARM_COPY
:
6649 case elfcpp::R_ARM_GLOB_DAT
:
6650 case elfcpp::R_ARM_JUMP_SLOT
:
6651 case elfcpp::R_ARM_RELATIVE
:
6652 // These are relocations which should only be seen by the
6653 // dynamic linker, and should never be seen here.
6654 gold_error(_("%s: unexpected reloc %u in object file"),
6655 object
->name().c_str(), r_type
);
6659 unsupported_reloc_local(object
, r_type
);
6664 // Report an unsupported relocation against a global symbol.
6666 template<bool big_endian
>
6668 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
6669 Sized_relobj
<32, big_endian
>* object
,
6670 unsigned int r_type
,
6673 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
6674 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
6677 // Scan a relocation for a global symbol.
6678 // FIXME: This only handles a subset of relocation types used by Android
6679 // on ARM v5te devices.
6681 template<bool big_endian
>
6683 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
6686 Sized_relobj
<32, big_endian
>* object
,
6687 unsigned int data_shndx
,
6688 Output_section
* output_section
,
6689 const elfcpp::Rel
<32, big_endian
>& reloc
,
6690 unsigned int r_type
,
6693 r_type
= get_real_reloc_type(r_type
);
6696 case elfcpp::R_ARM_NONE
:
6699 case elfcpp::R_ARM_ABS32
:
6700 case elfcpp::R_ARM_ABS32_NOI
:
6702 // Make a dynamic relocation if necessary.
6703 if (gsym
->needs_dynamic_reloc(Symbol::ABSOLUTE_REF
))
6705 if (target
->may_need_copy_reloc(gsym
))
6707 target
->copy_reloc(symtab
, layout
, object
,
6708 data_shndx
, output_section
, gsym
, reloc
);
6710 else if (gsym
->can_use_relative_reloc(false))
6712 // If we are to add more other reloc types than R_ARM_ABS32,
6713 // we need to add check_non_pic(object, r_type) here.
6714 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6715 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
6716 output_section
, object
,
6717 data_shndx
, reloc
.get_r_offset());
6721 // If we are to add more other reloc types than R_ARM_ABS32,
6722 // we need to add check_non_pic(object, r_type) here.
6723 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6724 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
6725 data_shndx
, reloc
.get_r_offset());
6731 case elfcpp::R_ARM_MOVW_ABS_NC
:
6732 case elfcpp::R_ARM_MOVT_ABS
:
6733 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
6734 case elfcpp::R_ARM_THM_MOVT_ABS
:
6735 case elfcpp::R_ARM_MOVW_PREL_NC
:
6736 case elfcpp::R_ARM_MOVT_PREL
:
6737 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
6738 case elfcpp::R_ARM_THM_MOVT_PREL
:
6739 case elfcpp::R_ARM_MOVW_BREL_NC
:
6740 case elfcpp::R_ARM_MOVT_BREL
:
6741 case elfcpp::R_ARM_MOVW_BREL
:
6742 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
6743 case elfcpp::R_ARM_THM_MOVT_BREL
:
6744 case elfcpp::R_ARM_THM_MOVW_BREL
:
6745 case elfcpp::R_ARM_THM_JUMP6
:
6746 case elfcpp::R_ARM_THM_JUMP8
:
6747 case elfcpp::R_ARM_THM_JUMP11
:
6748 case elfcpp::R_ARM_V4BX
:
6749 case elfcpp::R_ARM_THM_PC8
:
6750 case elfcpp::R_ARM_THM_PC12
:
6751 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
6752 case elfcpp::R_ARM_ALU_PC_G0_NC
:
6753 case elfcpp::R_ARM_ALU_PC_G0
:
6754 case elfcpp::R_ARM_ALU_PC_G1_NC
:
6755 case elfcpp::R_ARM_ALU_PC_G1
:
6756 case elfcpp::R_ARM_ALU_PC_G2
:
6757 case elfcpp::R_ARM_ALU_SB_G0_NC
:
6758 case elfcpp::R_ARM_ALU_SB_G0
:
6759 case elfcpp::R_ARM_ALU_SB_G1_NC
:
6760 case elfcpp::R_ARM_ALU_SB_G1
:
6761 case elfcpp::R_ARM_ALU_SB_G2
:
6762 case elfcpp::R_ARM_LDR_PC_G0
:
6763 case elfcpp::R_ARM_LDR_PC_G1
:
6764 case elfcpp::R_ARM_LDR_PC_G2
:
6765 case elfcpp::R_ARM_LDR_SB_G0
:
6766 case elfcpp::R_ARM_LDR_SB_G1
:
6767 case elfcpp::R_ARM_LDR_SB_G2
:
6768 case elfcpp::R_ARM_LDRS_PC_G0
:
6769 case elfcpp::R_ARM_LDRS_PC_G1
:
6770 case elfcpp::R_ARM_LDRS_PC_G2
:
6771 case elfcpp::R_ARM_LDRS_SB_G0
:
6772 case elfcpp::R_ARM_LDRS_SB_G1
:
6773 case elfcpp::R_ARM_LDRS_SB_G2
:
6774 case elfcpp::R_ARM_LDC_PC_G0
:
6775 case elfcpp::R_ARM_LDC_PC_G1
:
6776 case elfcpp::R_ARM_LDC_PC_G2
:
6777 case elfcpp::R_ARM_LDC_SB_G0
:
6778 case elfcpp::R_ARM_LDC_SB_G1
:
6779 case elfcpp::R_ARM_LDC_SB_G2
:
6782 case elfcpp::R_ARM_THM_ABS5
:
6783 case elfcpp::R_ARM_ABS8
:
6784 case elfcpp::R_ARM_ABS12
:
6785 case elfcpp::R_ARM_ABS16
:
6786 case elfcpp::R_ARM_BASE_ABS
:
6788 // No dynamic relocs of this kinds.
6789 // Report the error in case of PIC.
6790 int flags
= Symbol::NON_PIC_REF
;
6791 if (gsym
->type() == elfcpp::STT_FUNC
6792 || gsym
->type() == elfcpp::STT_ARM_TFUNC
)
6793 flags
|= Symbol::FUNCTION_CALL
;
6794 if (gsym
->needs_dynamic_reloc(flags
))
6795 check_non_pic(object
, r_type
);
6799 case elfcpp::R_ARM_REL32
:
6801 // Make a dynamic relocation if necessary.
6802 int flags
= Symbol::NON_PIC_REF
;
6803 if (gsym
->needs_dynamic_reloc(flags
))
6805 if (target
->may_need_copy_reloc(gsym
))
6807 target
->copy_reloc(symtab
, layout
, object
,
6808 data_shndx
, output_section
, gsym
, reloc
);
6812 check_non_pic(object
, r_type
);
6813 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6814 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
6815 data_shndx
, reloc
.get_r_offset());
6821 case elfcpp::R_ARM_JUMP24
:
6822 case elfcpp::R_ARM_THM_JUMP24
:
6823 case elfcpp::R_ARM_THM_JUMP19
:
6824 case elfcpp::R_ARM_CALL
:
6825 case elfcpp::R_ARM_THM_CALL
:
6826 case elfcpp::R_ARM_PLT32
:
6827 case elfcpp::R_ARM_PREL31
:
6828 case elfcpp::R_ARM_PC24
:
6829 // If the symbol is fully resolved, this is just a relative
6830 // local reloc. Otherwise we need a PLT entry.
6831 if (gsym
->final_value_is_known())
6833 // If building a shared library, we can also skip the PLT entry
6834 // if the symbol is defined in the output file and is protected
6836 if (gsym
->is_defined()
6837 && !gsym
->is_from_dynobj()
6838 && !gsym
->is_preemptible())
6840 target
->make_plt_entry(symtab
, layout
, gsym
);
6843 case elfcpp::R_ARM_GOTOFF32
:
6844 // We need a GOT section.
6845 target
->got_section(symtab
, layout
);
6848 case elfcpp::R_ARM_BASE_PREL
:
6849 // FIXME: What about this?
6852 case elfcpp::R_ARM_GOT_BREL
:
6853 case elfcpp::R_ARM_GOT_PREL
:
6855 // The symbol requires a GOT entry.
6856 Output_data_got
<32, big_endian
>* got
=
6857 target
->got_section(symtab
, layout
);
6858 if (gsym
->final_value_is_known())
6859 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
6862 // If this symbol is not fully resolved, we need to add a
6863 // GOT entry with a dynamic relocation.
6864 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6865 if (gsym
->is_from_dynobj()
6866 || gsym
->is_undefined()
6867 || gsym
->is_preemptible())
6868 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
6869 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
6872 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
6873 rel_dyn
->add_global_relative(
6874 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
6875 gsym
->got_offset(GOT_TYPE_STANDARD
));
6881 case elfcpp::R_ARM_TARGET1
:
6882 // This should have been mapped to another type already.
6884 case elfcpp::R_ARM_COPY
:
6885 case elfcpp::R_ARM_GLOB_DAT
:
6886 case elfcpp::R_ARM_JUMP_SLOT
:
6887 case elfcpp::R_ARM_RELATIVE
:
6888 // These are relocations which should only be seen by the
6889 // dynamic linker, and should never be seen here.
6890 gold_error(_("%s: unexpected reloc %u in object file"),
6891 object
->name().c_str(), r_type
);
6895 unsupported_reloc_global(object
, r_type
, gsym
);
6900 // Process relocations for gc.
6902 template<bool big_endian
>
6904 Target_arm
<big_endian
>::gc_process_relocs(Symbol_table
* symtab
,
6906 Sized_relobj
<32, big_endian
>* object
,
6907 unsigned int data_shndx
,
6909 const unsigned char* prelocs
,
6911 Output_section
* output_section
,
6912 bool needs_special_offset_handling
,
6913 size_t local_symbol_count
,
6914 const unsigned char* plocal_symbols
)
6916 typedef Target_arm
<big_endian
> Arm
;
6917 typedef typename Target_arm
<big_endian
>::Scan Scan
;
6919 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
>(
6928 needs_special_offset_handling
,
6933 // Scan relocations for a section.
6935 template<bool big_endian
>
6937 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
6939 Sized_relobj
<32, big_endian
>* object
,
6940 unsigned int data_shndx
,
6941 unsigned int sh_type
,
6942 const unsigned char* prelocs
,
6944 Output_section
* output_section
,
6945 bool needs_special_offset_handling
,
6946 size_t local_symbol_count
,
6947 const unsigned char* plocal_symbols
)
6949 typedef typename Target_arm
<big_endian
>::Scan Scan
;
6950 if (sh_type
== elfcpp::SHT_RELA
)
6952 gold_error(_("%s: unsupported RELA reloc section"),
6953 object
->name().c_str());
6957 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
6966 needs_special_offset_handling
,
6971 // Finalize the sections.
6973 template<bool big_endian
>
6975 Target_arm
<big_endian
>::do_finalize_sections(
6977 const Input_objects
* input_objects
,
6978 Symbol_table
* symtab
)
6980 // Merge processor-specific flags.
6981 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
6982 p
!= input_objects
->relobj_end();
6985 Arm_relobj
<big_endian
>* arm_relobj
=
6986 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
6987 this->merge_processor_specific_flags(
6989 arm_relobj
->processor_specific_flags());
6990 this->merge_object_attributes(arm_relobj
->name().c_str(),
6991 arm_relobj
->attributes_section_data());
6995 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
6996 p
!= input_objects
->dynobj_end();
6999 Arm_dynobj
<big_endian
>* arm_dynobj
=
7000 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
7001 this->merge_processor_specific_flags(
7003 arm_dynobj
->processor_specific_flags());
7004 this->merge_object_attributes(arm_dynobj
->name().c_str(),
7005 arm_dynobj
->attributes_section_data());
7009 const Object_attribute
* cpu_arch_attr
=
7010 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
7011 if (cpu_arch_attr
->int_value() > elfcpp::TAG_CPU_ARCH_V4
)
7012 this->set_may_use_blx(true);
7014 // Check if we need to use Cortex-A8 workaround.
7015 if (parameters
->options().user_set_fix_cortex_a8())
7016 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
7019 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
7020 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
7022 const Object_attribute
* cpu_arch_profile_attr
=
7023 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
7024 this->fix_cortex_a8_
=
7025 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
7026 && (cpu_arch_profile_attr
->int_value() == 'A'
7027 || cpu_arch_profile_attr
->int_value() == 0));
7030 // Check if we can use V4BX interworking.
7031 // The V4BX interworking stub contains BX instruction,
7032 // which is not specified for some profiles.
7033 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
7034 && !this->may_use_blx())
7035 gold_error(_("unable to provide V4BX reloc interworking fix up; "
7036 "the target profile does not support BX instruction"));
7038 // Fill in some more dynamic tags.
7039 const Reloc_section
* rel_plt
= (this->plt_
== NULL
7041 : this->plt_
->rel_plt());
7042 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
7043 this->rel_dyn_
, true);
7045 // Emit any relocs we saved in an attempt to avoid generating COPY
7047 if (this->copy_relocs_
.any_saved_relocs())
7048 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
7050 // Handle the .ARM.exidx section.
7051 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
7052 if (exidx_section
!= NULL
7053 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
7054 && !parameters
->options().relocatable())
7056 // Create __exidx_start and __exdix_end symbols.
7057 symtab
->define_in_output_data("__exidx_start", NULL
,
7058 Symbol_table::PREDEFINED
,
7059 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
7060 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
7062 symtab
->define_in_output_data("__exidx_end", NULL
,
7063 Symbol_table::PREDEFINED
,
7064 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
7065 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
7068 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
7069 // the .ARM.exidx section.
7070 if (!layout
->script_options()->saw_phdrs_clause())
7072 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0, 0)
7074 Output_segment
* exidx_segment
=
7075 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
7076 exidx_segment
->add_output_section(exidx_section
, elfcpp::PF_R
,
7081 // Create an .ARM.attributes section if there is not one already.
7082 Output_attributes_section_data
* attributes_section
=
7083 new Output_attributes_section_data(*this->attributes_section_data_
);
7084 layout
->add_output_section_data(".ARM.attributes",
7085 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
7086 attributes_section
, false, false, false,
7090 // Return whether a direct absolute static relocation needs to be applied.
7091 // In cases where Scan::local() or Scan::global() has created
7092 // a dynamic relocation other than R_ARM_RELATIVE, the addend
7093 // of the relocation is carried in the data, and we must not
7094 // apply the static relocation.
7096 template<bool big_endian
>
7098 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
7099 const Sized_symbol
<32>* gsym
,
7102 Output_section
* output_section
)
7104 // If the output section is not allocated, then we didn't call
7105 // scan_relocs, we didn't create a dynamic reloc, and we must apply
7107 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
7110 // For local symbols, we will have created a non-RELATIVE dynamic
7111 // relocation only if (a) the output is position independent,
7112 // (b) the relocation is absolute (not pc- or segment-relative), and
7113 // (c) the relocation is not 32 bits wide.
7115 return !(parameters
->options().output_is_position_independent()
7116 && (ref_flags
& Symbol::ABSOLUTE_REF
)
7119 // For global symbols, we use the same helper routines used in the
7120 // scan pass. If we did not create a dynamic relocation, or if we
7121 // created a RELATIVE dynamic relocation, we should apply the static
7123 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
7124 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
7125 && gsym
->can_use_relative_reloc(ref_flags
7126 & Symbol::FUNCTION_CALL
);
7127 return !has_dyn
|| is_rel
;
7130 // Perform a relocation.
7132 template<bool big_endian
>
7134 Target_arm
<big_endian
>::Relocate::relocate(
7135 const Relocate_info
<32, big_endian
>* relinfo
,
7137 Output_section
*output_section
,
7139 const elfcpp::Rel
<32, big_endian
>& rel
,
7140 unsigned int r_type
,
7141 const Sized_symbol
<32>* gsym
,
7142 const Symbol_value
<32>* psymval
,
7143 unsigned char* view
,
7144 Arm_address address
,
7145 section_size_type
/* view_size */ )
7147 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
7149 r_type
= get_real_reloc_type(r_type
);
7150 const Arm_reloc_property
* reloc_property
=
7151 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
7152 if (reloc_property
== NULL
)
7154 std::string reloc_name
=
7155 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
7156 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
7157 _("cannot relocate %s in object file"),
7158 reloc_name
.c_str());
7162 const Arm_relobj
<big_endian
>* object
=
7163 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
7165 // If the final branch target of a relocation is THUMB instruction, this
7166 // is 1. Otherwise it is 0.
7167 Arm_address thumb_bit
= 0;
7168 Symbol_value
<32> symval
;
7169 bool is_weakly_undefined_without_plt
= false;
7170 if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
7174 // This is a global symbol. Determine if we use PLT and if the
7175 // final target is THUMB.
7176 if (gsym
->use_plt_offset(reloc_is_non_pic(r_type
)))
7178 // This uses a PLT, change the symbol value.
7179 symval
.set_output_value(target
->plt_section()->address()
7180 + gsym
->plt_offset());
7183 else if (gsym
->is_weak_undefined())
7185 // This is a weakly undefined symbol and we do not use PLT
7186 // for this relocation. A branch targeting this symbol will
7187 // be converted into an NOP.
7188 is_weakly_undefined_without_plt
= true;
7192 // Set thumb bit if symbol:
7193 // -Has type STT_ARM_TFUNC or
7194 // -Has type STT_FUNC, is defined and with LSB in value set.
7196 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
7197 || (gsym
->type() == elfcpp::STT_FUNC
7198 && !gsym
->is_undefined()
7199 && ((psymval
->value(object
, 0) & 1) != 0)))
7206 // This is a local symbol. Determine if the final target is THUMB.
7207 // We saved this information when all the local symbols were read.
7208 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
7209 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
7210 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
7215 // This is a fake relocation synthesized for a stub. It does not have
7216 // a real symbol. We just look at the LSB of the symbol value to
7217 // determine if the target is THUMB or not.
7218 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
7221 // Strip LSB if this points to a THUMB target.
7223 && reloc_property
->uses_thumb_bit()
7224 && ((psymval
->value(object
, 0) & 1) != 0))
7226 Arm_address stripped_value
=
7227 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
7228 symval
.set_output_value(stripped_value
);
7232 // Get the GOT offset if needed.
7233 // The GOT pointer points to the end of the GOT section.
7234 // We need to subtract the size of the GOT section to get
7235 // the actual offset to use in the relocation.
7236 bool have_got_offset
= false;
7237 unsigned int got_offset
= 0;
7240 case elfcpp::R_ARM_GOT_BREL
:
7241 case elfcpp::R_ARM_GOT_PREL
:
7244 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
7245 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
7246 - target
->got_size());
7250 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
7251 gold_assert(object
->local_has_got_offset(r_sym
, GOT_TYPE_STANDARD
));
7252 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
7253 - target
->got_size());
7255 have_got_offset
= true;
7262 // To look up relocation stubs, we need to pass the symbol table index of
7264 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
7266 // Get the addressing origin of the output segment defining the
7267 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
7268 Arm_address sym_origin
= 0;
7269 if (reloc_property
->uses_symbol_base())
7271 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
7272 // R_ARM_BASE_ABS with the NULL symbol will give the
7273 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
7274 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
7275 sym_origin
= target
->got_plt_section()->address();
7276 else if (gsym
== NULL
)
7278 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
7279 sym_origin
= gsym
->output_segment()->vaddr();
7280 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
7281 sym_origin
= gsym
->output_data()->address();
7283 // TODO: Assumes the segment base to be zero for the global symbols
7284 // till the proper support for the segment-base-relative addressing
7285 // will be implemented. This is consistent with GNU ld.
7288 // For relative addressing relocation, find out the relative address base.
7289 Arm_address relative_address_base
= 0;
7290 switch(reloc_property
->relative_address_base())
7292 case Arm_reloc_property::RAB_NONE
:
7294 case Arm_reloc_property::RAB_B_S
:
7295 relative_address_base
= sym_origin
;
7297 case Arm_reloc_property::RAB_GOT_ORG
:
7298 relative_address_base
= target
->got_plt_section()->address();
7300 case Arm_reloc_property::RAB_P
:
7301 relative_address_base
= address
;
7303 case Arm_reloc_property::RAB_Pa
:
7304 relative_address_base
= address
& 0xfffffffcU
;
7310 typename
Arm_relocate_functions::Status reloc_status
=
7311 Arm_relocate_functions::STATUS_OKAY
;
7312 bool check_overflow
= reloc_property
->checks_overflow();
7315 case elfcpp::R_ARM_NONE
:
7318 case elfcpp::R_ARM_ABS8
:
7319 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7321 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
7324 case elfcpp::R_ARM_ABS12
:
7325 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7327 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
7330 case elfcpp::R_ARM_ABS16
:
7331 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7333 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
7336 case elfcpp::R_ARM_ABS32
:
7337 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7339 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
7343 case elfcpp::R_ARM_ABS32_NOI
:
7344 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7346 // No thumb bit for this relocation: (S + A)
7347 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
7351 case elfcpp::R_ARM_MOVW_ABS_NC
:
7352 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7354 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
7358 gold_error(_("relocation R_ARM_MOVW_ABS_NC cannot be used when making"
7359 "a shared object; recompile with -fPIC"));
7362 case elfcpp::R_ARM_MOVT_ABS
:
7363 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7365 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
7367 gold_error(_("relocation R_ARM_MOVT_ABS cannot be used when making"
7368 "a shared object; recompile with -fPIC"));
7371 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7372 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7374 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
7375 0, thumb_bit
, false);
7377 gold_error(_("relocation R_ARM_THM_MOVW_ABS_NC cannot be used when"
7378 "making a shared object; recompile with -fPIC"));
7381 case elfcpp::R_ARM_THM_MOVT_ABS
:
7382 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7384 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
7387 gold_error(_("relocation R_ARM_THM_MOVT_ABS cannot be used when"
7388 "making a shared object; recompile with -fPIC"));
7391 case elfcpp::R_ARM_MOVW_PREL_NC
:
7392 case elfcpp::R_ARM_MOVW_BREL_NC
:
7393 case elfcpp::R_ARM_MOVW_BREL
:
7395 Arm_relocate_functions::movw(view
, object
, psymval
,
7396 relative_address_base
, thumb_bit
,
7400 case elfcpp::R_ARM_MOVT_PREL
:
7401 case elfcpp::R_ARM_MOVT_BREL
:
7403 Arm_relocate_functions::movt(view
, object
, psymval
,
7404 relative_address_base
);
7407 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7408 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7409 case elfcpp::R_ARM_THM_MOVW_BREL
:
7411 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
7412 relative_address_base
,
7413 thumb_bit
, check_overflow
);
7416 case elfcpp::R_ARM_THM_MOVT_PREL
:
7417 case elfcpp::R_ARM_THM_MOVT_BREL
:
7419 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
7420 relative_address_base
);
7423 case elfcpp::R_ARM_REL32
:
7424 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
7425 address
, thumb_bit
);
7428 case elfcpp::R_ARM_THM_ABS5
:
7429 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7431 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
7434 // Thumb long branches.
7435 case elfcpp::R_ARM_THM_CALL
:
7436 case elfcpp::R_ARM_THM_XPC22
:
7437 case elfcpp::R_ARM_THM_JUMP24
:
7439 Arm_relocate_functions::thumb_branch_common(
7440 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
7441 thumb_bit
, is_weakly_undefined_without_plt
);
7444 case elfcpp::R_ARM_GOTOFF32
:
7446 Arm_address got_origin
;
7447 got_origin
= target
->got_plt_section()->address();
7448 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
7449 got_origin
, thumb_bit
);
7453 case elfcpp::R_ARM_BASE_PREL
:
7454 gold_assert(gsym
!= NULL
);
7456 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
7459 case elfcpp::R_ARM_BASE_ABS
:
7461 if (!should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7465 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
7469 case elfcpp::R_ARM_GOT_BREL
:
7470 gold_assert(have_got_offset
);
7471 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
7474 case elfcpp::R_ARM_GOT_PREL
:
7475 gold_assert(have_got_offset
);
7476 // Get the address origin for GOT PLT, which is allocated right
7477 // after the GOT section, to calculate an absolute address of
7478 // the symbol GOT entry (got_origin + got_offset).
7479 Arm_address got_origin
;
7480 got_origin
= target
->got_plt_section()->address();
7481 reloc_status
= Arm_relocate_functions::got_prel(view
,
7482 got_origin
+ got_offset
,
7486 case elfcpp::R_ARM_PLT32
:
7487 case elfcpp::R_ARM_CALL
:
7488 case elfcpp::R_ARM_JUMP24
:
7489 case elfcpp::R_ARM_XPC25
:
7490 gold_assert(gsym
== NULL
7491 || gsym
->has_plt_offset()
7492 || gsym
->final_value_is_known()
7493 || (gsym
->is_defined()
7494 && !gsym
->is_from_dynobj()
7495 && !gsym
->is_preemptible()));
7497 Arm_relocate_functions::arm_branch_common(
7498 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
7499 thumb_bit
, is_weakly_undefined_without_plt
);
7502 case elfcpp::R_ARM_THM_JUMP19
:
7504 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
7508 case elfcpp::R_ARM_THM_JUMP6
:
7510 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
7513 case elfcpp::R_ARM_THM_JUMP8
:
7515 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
7518 case elfcpp::R_ARM_THM_JUMP11
:
7520 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
7523 case elfcpp::R_ARM_PREL31
:
7524 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
7525 address
, thumb_bit
);
7528 case elfcpp::R_ARM_V4BX
:
7529 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
7531 const bool is_v4bx_interworking
=
7532 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
7534 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
7535 is_v4bx_interworking
);
7539 case elfcpp::R_ARM_THM_PC8
:
7541 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
7544 case elfcpp::R_ARM_THM_PC12
:
7546 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
7549 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7551 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
7555 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7556 case elfcpp::R_ARM_ALU_PC_G0
:
7557 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7558 case elfcpp::R_ARM_ALU_PC_G1
:
7559 case elfcpp::R_ARM_ALU_PC_G2
:
7560 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7561 case elfcpp::R_ARM_ALU_SB_G0
:
7562 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7563 case elfcpp::R_ARM_ALU_SB_G1
:
7564 case elfcpp::R_ARM_ALU_SB_G2
:
7566 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
7567 reloc_property
->group_index(),
7568 relative_address_base
,
7569 thumb_bit
, check_overflow
);
7572 case elfcpp::R_ARM_LDR_PC_G0
:
7573 case elfcpp::R_ARM_LDR_PC_G1
:
7574 case elfcpp::R_ARM_LDR_PC_G2
:
7575 case elfcpp::R_ARM_LDR_SB_G0
:
7576 case elfcpp::R_ARM_LDR_SB_G1
:
7577 case elfcpp::R_ARM_LDR_SB_G2
:
7579 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
7580 reloc_property
->group_index(),
7581 relative_address_base
);
7584 case elfcpp::R_ARM_LDRS_PC_G0
:
7585 case elfcpp::R_ARM_LDRS_PC_G1
:
7586 case elfcpp::R_ARM_LDRS_PC_G2
:
7587 case elfcpp::R_ARM_LDRS_SB_G0
:
7588 case elfcpp::R_ARM_LDRS_SB_G1
:
7589 case elfcpp::R_ARM_LDRS_SB_G2
:
7591 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
7592 reloc_property
->group_index(),
7593 relative_address_base
);
7596 case elfcpp::R_ARM_LDC_PC_G0
:
7597 case elfcpp::R_ARM_LDC_PC_G1
:
7598 case elfcpp::R_ARM_LDC_PC_G2
:
7599 case elfcpp::R_ARM_LDC_SB_G0
:
7600 case elfcpp::R_ARM_LDC_SB_G1
:
7601 case elfcpp::R_ARM_LDC_SB_G2
:
7603 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
7604 reloc_property
->group_index(),
7605 relative_address_base
);
7612 // Report any errors.
7613 switch (reloc_status
)
7615 case Arm_relocate_functions::STATUS_OKAY
:
7617 case Arm_relocate_functions::STATUS_OVERFLOW
:
7618 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
7619 _("relocation overflow in relocation %u"),
7622 case Arm_relocate_functions::STATUS_BAD_RELOC
:
7623 gold_error_at_location(
7627 _("unexpected opcode while processing relocation %u"),
7637 // Relocate section data.
7639 template<bool big_endian
>
7641 Target_arm
<big_endian
>::relocate_section(
7642 const Relocate_info
<32, big_endian
>* relinfo
,
7643 unsigned int sh_type
,
7644 const unsigned char* prelocs
,
7646 Output_section
* output_section
,
7647 bool needs_special_offset_handling
,
7648 unsigned char* view
,
7649 Arm_address address
,
7650 section_size_type view_size
,
7651 const Reloc_symbol_changes
* reloc_symbol_changes
)
7653 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
7654 gold_assert(sh_type
== elfcpp::SHT_REL
);
7656 // See if we are relocating a relaxed input section. If so, the view
7657 // covers the whole output section and we need to adjust accordingly.
7658 if (needs_special_offset_handling
)
7660 const Output_relaxed_input_section
* poris
=
7661 output_section
->find_relaxed_input_section(relinfo
->object
,
7662 relinfo
->data_shndx
);
7665 Arm_address section_address
= poris
->address();
7666 section_size_type section_size
= poris
->data_size();
7668 gold_assert((section_address
>= address
)
7669 && ((section_address
+ section_size
)
7670 <= (address
+ view_size
)));
7672 off_t offset
= section_address
- address
;
7675 view_size
= section_size
;
7679 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
7686 needs_special_offset_handling
,
7690 reloc_symbol_changes
);
7693 // Return the size of a relocation while scanning during a relocatable
7696 template<bool big_endian
>
7698 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
7699 unsigned int r_type
,
7702 r_type
= get_real_reloc_type(r_type
);
7703 const Arm_reloc_property
* arp
=
7704 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
7709 std::string reloc_name
=
7710 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
7711 gold_error(_("%s: unexpected %s in object file"),
7712 object
->name().c_str(), reloc_name
.c_str());
7717 // Scan the relocs during a relocatable link.
7719 template<bool big_endian
>
7721 Target_arm
<big_endian
>::scan_relocatable_relocs(
7722 Symbol_table
* symtab
,
7724 Sized_relobj
<32, big_endian
>* object
,
7725 unsigned int data_shndx
,
7726 unsigned int sh_type
,
7727 const unsigned char* prelocs
,
7729 Output_section
* output_section
,
7730 bool needs_special_offset_handling
,
7731 size_t local_symbol_count
,
7732 const unsigned char* plocal_symbols
,
7733 Relocatable_relocs
* rr
)
7735 gold_assert(sh_type
== elfcpp::SHT_REL
);
7737 typedef gold::Default_scan_relocatable_relocs
<elfcpp::SHT_REL
,
7738 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
7740 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
7741 Scan_relocatable_relocs
>(
7749 needs_special_offset_handling
,
7755 // Relocate a section during a relocatable link.
7757 template<bool big_endian
>
7759 Target_arm
<big_endian
>::relocate_for_relocatable(
7760 const Relocate_info
<32, big_endian
>* relinfo
,
7761 unsigned int sh_type
,
7762 const unsigned char* prelocs
,
7764 Output_section
* output_section
,
7765 off_t offset_in_output_section
,
7766 const Relocatable_relocs
* rr
,
7767 unsigned char* view
,
7768 Arm_address view_address
,
7769 section_size_type view_size
,
7770 unsigned char* reloc_view
,
7771 section_size_type reloc_view_size
)
7773 gold_assert(sh_type
== elfcpp::SHT_REL
);
7775 gold::relocate_for_relocatable
<32, big_endian
, elfcpp::SHT_REL
>(
7780 offset_in_output_section
,
7789 // Return the value to use for a dynamic symbol which requires special
7790 // treatment. This is how we support equality comparisons of function
7791 // pointers across shared library boundaries, as described in the
7792 // processor specific ABI supplement.
7794 template<bool big_endian
>
7796 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
7798 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
7799 return this->plt_section()->address() + gsym
->plt_offset();
7802 // Map platform-specific relocs to real relocs
7804 template<bool big_endian
>
7806 Target_arm
<big_endian
>::get_real_reloc_type (unsigned int r_type
)
7810 case elfcpp::R_ARM_TARGET1
:
7811 // This is either R_ARM_ABS32 or R_ARM_REL32;
7812 return elfcpp::R_ARM_ABS32
;
7814 case elfcpp::R_ARM_TARGET2
:
7815 // This can be any reloc type but ususally is R_ARM_GOT_PREL
7816 return elfcpp::R_ARM_GOT_PREL
;
7823 // Whether if two EABI versions V1 and V2 are compatible.
7825 template<bool big_endian
>
7827 Target_arm
<big_endian
>::are_eabi_versions_compatible(
7828 elfcpp::Elf_Word v1
,
7829 elfcpp::Elf_Word v2
)
7831 // v4 and v5 are the same spec before and after it was released,
7832 // so allow mixing them.
7833 if ((v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
7834 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
7840 // Combine FLAGS from an input object called NAME and the processor-specific
7841 // flags in the ELF header of the output. Much of this is adapted from the
7842 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
7843 // in bfd/elf32-arm.c.
7845 template<bool big_endian
>
7847 Target_arm
<big_endian
>::merge_processor_specific_flags(
7848 const std::string
& name
,
7849 elfcpp::Elf_Word flags
)
7851 if (this->are_processor_specific_flags_set())
7853 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
7855 // Nothing to merge if flags equal to those in output.
7856 if (flags
== out_flags
)
7859 // Complain about various flag mismatches.
7860 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
7861 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
7862 if (!this->are_eabi_versions_compatible(version1
, version2
))
7863 gold_error(_("Source object %s has EABI version %d but output has "
7864 "EABI version %d."),
7866 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
7867 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
7871 // If the input is the default architecture and had the default
7872 // flags then do not bother setting the flags for the output
7873 // architecture, instead allow future merges to do this. If no
7874 // future merges ever set these flags then they will retain their
7875 // uninitialised values, which surprise surprise, correspond
7876 // to the default values.
7880 // This is the first time, just copy the flags.
7881 // We only copy the EABI version for now.
7882 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
7886 // Adjust ELF file header.
7887 template<bool big_endian
>
7889 Target_arm
<big_endian
>::do_adjust_elf_header(
7890 unsigned char* view
,
7893 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
7895 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
7896 unsigned char e_ident
[elfcpp::EI_NIDENT
];
7897 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
7899 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
7900 == elfcpp::EF_ARM_EABI_UNKNOWN
)
7901 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
7903 e_ident
[elfcpp::EI_OSABI
] = 0;
7904 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
7906 // FIXME: Do EF_ARM_BE8 adjustment.
7908 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
7909 oehdr
.put_e_ident(e_ident
);
7912 // do_make_elf_object to override the same function in the base class.
7913 // We need to use a target-specific sub-class of Sized_relobj<32, big_endian>
7914 // to store ARM specific information. Hence we need to have our own
7915 // ELF object creation.
7917 template<bool big_endian
>
7919 Target_arm
<big_endian
>::do_make_elf_object(
7920 const std::string
& name
,
7921 Input_file
* input_file
,
7922 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
7924 int et
= ehdr
.get_e_type();
7925 if (et
== elfcpp::ET_REL
)
7927 Arm_relobj
<big_endian
>* obj
=
7928 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
7932 else if (et
== elfcpp::ET_DYN
)
7934 Sized_dynobj
<32, big_endian
>* obj
=
7935 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
7941 gold_error(_("%s: unsupported ELF file type %d"),
7947 // Read the architecture from the Tag_also_compatible_with attribute, if any.
7948 // Returns -1 if no architecture could be read.
7949 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
7951 template<bool big_endian
>
7953 Target_arm
<big_endian
>::get_secondary_compatible_arch(
7954 const Attributes_section_data
* pasd
)
7956 const Object_attribute
*known_attributes
=
7957 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
7959 // Note: the tag and its argument below are uleb128 values, though
7960 // currently-defined values fit in one byte for each.
7961 const std::string
& sv
=
7962 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
7964 && sv
.data()[0] == elfcpp::Tag_CPU_arch
7965 && (sv
.data()[1] & 128) != 128)
7966 return sv
.data()[1];
7968 // This tag is "safely ignorable", so don't complain if it looks funny.
7972 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
7973 // The tag is removed if ARCH is -1.
7974 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
7976 template<bool big_endian
>
7978 Target_arm
<big_endian
>::set_secondary_compatible_arch(
7979 Attributes_section_data
* pasd
,
7982 Object_attribute
*known_attributes
=
7983 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
7987 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
7991 // Note: the tag and its argument below are uleb128 values, though
7992 // currently-defined values fit in one byte for each.
7994 sv
[0] = elfcpp::Tag_CPU_arch
;
7995 gold_assert(arch
!= 0);
7999 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
8002 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8004 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
8006 template<bool big_endian
>
8008 Target_arm
<big_endian
>::tag_cpu_arch_combine(
8011 int* secondary_compat_out
,
8013 int secondary_compat
)
8015 #define T(X) elfcpp::TAG_CPU_ARCH_##X
8016 static const int v6t2
[] =
8028 static const int v6k
[] =
8041 static const int v7
[] =
8055 static const int v6_m
[] =
8070 static const int v6s_m
[] =
8086 static const int v7e_m
[] =
8103 static const int v4t_plus_v6_m
[] =
8119 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
8121 static const int *comb
[] =
8129 // Pseudo-architecture.
8133 // Check we've not got a higher architecture than we know about.
8135 if (oldtag
>= elfcpp::MAX_TAG_CPU_ARCH
|| newtag
>= elfcpp::MAX_TAG_CPU_ARCH
)
8137 gold_error(_("%s: unknown CPU architecture"), name
);
8141 // Override old tag if we have a Tag_also_compatible_with on the output.
8143 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
8144 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
8145 oldtag
= T(V4T_PLUS_V6_M
);
8147 // And override the new tag if we have a Tag_also_compatible_with on the
8150 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
8151 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
8152 newtag
= T(V4T_PLUS_V6_M
);
8154 // Architectures before V6KZ add features monotonically.
8155 int tagh
= std::max(oldtag
, newtag
);
8156 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
8159 int tagl
= std::min(oldtag
, newtag
);
8160 int result
= comb
[tagh
- T(V6T2
)][tagl
];
8162 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8163 // as the canonical version.
8164 if (result
== T(V4T_PLUS_V6_M
))
8167 *secondary_compat_out
= T(V6_M
);
8170 *secondary_compat_out
= -1;
8174 gold_error(_("%s: conflicting CPU architectures %d/%d"),
8175 name
, oldtag
, newtag
);
8183 // Helper to print AEABI enum tag value.
8185 template<bool big_endian
>
8187 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
8189 static const char *aeabi_enum_names
[] =
8190 { "", "variable-size", "32-bit", "" };
8191 const size_t aeabi_enum_names_size
=
8192 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
8194 if (value
< aeabi_enum_names_size
)
8195 return std::string(aeabi_enum_names
[value
]);
8199 sprintf(buffer
, "<unknown value %u>", value
);
8200 return std::string(buffer
);
8204 // Return the string value to store in TAG_CPU_name.
8206 template<bool big_endian
>
8208 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
8210 static const char *name_table
[] = {
8211 // These aren't real CPU names, but we can't guess
8212 // that from the architecture version alone.
8228 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
8230 if (value
< name_table_size
)
8231 return std::string(name_table
[value
]);
8235 sprintf(buffer
, "<unknown CPU value %u>", value
);
8236 return std::string(buffer
);
8240 // Merge object attributes from input file called NAME with those of the
8241 // output. The input object attributes are in the object pointed by PASD.
8243 template<bool big_endian
>
8245 Target_arm
<big_endian
>::merge_object_attributes(
8247 const Attributes_section_data
* pasd
)
8249 // Return if there is no attributes section data.
8253 // If output has no object attributes, just copy.
8254 if (this->attributes_section_data_
== NULL
)
8256 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
8260 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
8261 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
8262 Object_attribute
* out_attr
=
8263 this->attributes_section_data_
->known_attributes(vendor
);
8265 // This needs to happen before Tag_ABI_FP_number_model is merged. */
8266 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
8267 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
8269 // Ignore mismatches if the object doesn't use floating point. */
8270 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
8271 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
8272 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
8273 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0)
8274 gold_error(_("%s uses VFP register arguments, output does not"),
8278 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
8280 // Merge this attribute with existing attributes.
8283 case elfcpp::Tag_CPU_raw_name
:
8284 case elfcpp::Tag_CPU_name
:
8285 // These are merged after Tag_CPU_arch.
8288 case elfcpp::Tag_ABI_optimization_goals
:
8289 case elfcpp::Tag_ABI_FP_optimization_goals
:
8290 // Use the first value seen.
8293 case elfcpp::Tag_CPU_arch
:
8295 unsigned int saved_out_attr
= out_attr
->int_value();
8296 // Merge Tag_CPU_arch and Tag_also_compatible_with.
8297 int secondary_compat
=
8298 this->get_secondary_compatible_arch(pasd
);
8299 int secondary_compat_out
=
8300 this->get_secondary_compatible_arch(
8301 this->attributes_section_data_
);
8302 out_attr
[i
].set_int_value(
8303 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
8304 &secondary_compat_out
,
8305 in_attr
[i
].int_value(),
8307 this->set_secondary_compatible_arch(this->attributes_section_data_
,
8308 secondary_compat_out
);
8310 // Merge Tag_CPU_name and Tag_CPU_raw_name.
8311 if (out_attr
[i
].int_value() == saved_out_attr
)
8312 ; // Leave the names alone.
8313 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
8315 // The output architecture has been changed to match the
8316 // input architecture. Use the input names.
8317 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
8318 in_attr
[elfcpp::Tag_CPU_name
].string_value());
8319 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
8320 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
8324 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
8325 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
8328 // If we still don't have a value for Tag_CPU_name,
8329 // make one up now. Tag_CPU_raw_name remains blank.
8330 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
8332 const std::string cpu_name
=
8333 this->tag_cpu_name_value(out_attr
[i
].int_value());
8334 // FIXME: If we see an unknown CPU, this will be set
8335 // to "<unknown CPU n>", where n is the attribute value.
8336 // This is different from BFD, which leaves the name alone.
8337 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
8342 case elfcpp::Tag_ARM_ISA_use
:
8343 case elfcpp::Tag_THUMB_ISA_use
:
8344 case elfcpp::Tag_WMMX_arch
:
8345 case elfcpp::Tag_Advanced_SIMD_arch
:
8346 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
8347 case elfcpp::Tag_ABI_FP_rounding
:
8348 case elfcpp::Tag_ABI_FP_exceptions
:
8349 case elfcpp::Tag_ABI_FP_user_exceptions
:
8350 case elfcpp::Tag_ABI_FP_number_model
:
8351 case elfcpp::Tag_VFP_HP_extension
:
8352 case elfcpp::Tag_CPU_unaligned_access
:
8353 case elfcpp::Tag_T2EE_use
:
8354 case elfcpp::Tag_Virtualization_use
:
8355 case elfcpp::Tag_MPextension_use
:
8356 // Use the largest value specified.
8357 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
8358 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8361 case elfcpp::Tag_ABI_align8_preserved
:
8362 case elfcpp::Tag_ABI_PCS_RO_data
:
8363 // Use the smallest value specified.
8364 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
8365 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8368 case elfcpp::Tag_ABI_align8_needed
:
8369 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
8370 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
8371 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
8374 // This error message should be enabled once all non-conformant
8375 // binaries in the toolchain have had the attributes set
8377 // gold_error(_("output 8-byte data alignment conflicts with %s"),
8381 case elfcpp::Tag_ABI_FP_denormal
:
8382 case elfcpp::Tag_ABI_PCS_GOT_use
:
8384 // These tags have 0 = don't care, 1 = strong requirement,
8385 // 2 = weak requirement.
8386 static const int order_021
[3] = {0, 2, 1};
8388 // Use the "greatest" from the sequence 0, 2, 1, or the largest
8389 // value if greater than 2 (for future-proofing).
8390 if ((in_attr
[i
].int_value() > 2
8391 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
8392 || (in_attr
[i
].int_value() <= 2
8393 && out_attr
[i
].int_value() <= 2
8394 && (order_021
[in_attr
[i
].int_value()]
8395 > order_021
[out_attr
[i
].int_value()])))
8396 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8400 case elfcpp::Tag_CPU_arch_profile
:
8401 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
8403 // 0 will merge with anything.
8404 // 'A' and 'S' merge to 'A'.
8405 // 'R' and 'S' merge to 'R'.
8406 // 'M' and 'A|R|S' is an error.
8407 if (out_attr
[i
].int_value() == 0
8408 || (out_attr
[i
].int_value() == 'S'
8409 && (in_attr
[i
].int_value() == 'A'
8410 || in_attr
[i
].int_value() == 'R')))
8411 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8412 else if (in_attr
[i
].int_value() == 0
8413 || (in_attr
[i
].int_value() == 'S'
8414 && (out_attr
[i
].int_value() == 'A'
8415 || out_attr
[i
].int_value() == 'R')))
8420 (_("conflicting architecture profiles %c/%c"),
8421 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
8422 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
8426 case elfcpp::Tag_VFP_arch
:
8443 // Values greater than 6 aren't defined, so just pick the
8445 if (in_attr
[i
].int_value() > 6
8446 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
8448 *out_attr
= *in_attr
;
8451 // The output uses the superset of input features
8452 // (ISA version) and registers.
8453 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
8454 vfp_versions
[out_attr
[i
].int_value()].ver
);
8455 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
8456 vfp_versions
[out_attr
[i
].int_value()].regs
);
8457 // This assumes all possible supersets are also a valid
8460 for (newval
= 6; newval
> 0; newval
--)
8462 if (regs
== vfp_versions
[newval
].regs
8463 && ver
== vfp_versions
[newval
].ver
)
8466 out_attr
[i
].set_int_value(newval
);
8469 case elfcpp::Tag_PCS_config
:
8470 if (out_attr
[i
].int_value() == 0)
8471 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8472 else if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
8474 // It's sometimes ok to mix different configs, so this is only
8476 gold_warning(_("%s: conflicting platform configuration"), name
);
8479 case elfcpp::Tag_ABI_PCS_R9_use
:
8480 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
8481 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
8482 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
)
8484 gold_error(_("%s: conflicting use of R9"), name
);
8486 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
8487 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8489 case elfcpp::Tag_ABI_PCS_RW_data
:
8490 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
8491 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
8492 != elfcpp::AEABI_R9_SB
)
8493 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
8494 != elfcpp::AEABI_R9_unused
))
8496 gold_error(_("%s: SB relative addressing conflicts with use "
8500 // Use the smallest value specified.
8501 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
8502 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8504 case elfcpp::Tag_ABI_PCS_wchar_t
:
8505 // FIXME: Make it possible to turn off this warning.
8506 if (out_attr
[i
].int_value()
8507 && in_attr
[i
].int_value()
8508 && out_attr
[i
].int_value() != in_attr
[i
].int_value())
8510 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
8511 "use %u-byte wchar_t; use of wchar_t values "
8512 "across objects may fail"),
8513 name
, in_attr
[i
].int_value(),
8514 out_attr
[i
].int_value());
8516 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
8517 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8519 case elfcpp::Tag_ABI_enum_size
:
8520 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
8522 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
8523 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
8525 // The existing object is compatible with anything.
8526 // Use whatever requirements the new object has.
8527 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8529 // FIXME: Make it possible to turn off this warning.
8530 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
8531 && out_attr
[i
].int_value() != in_attr
[i
].int_value())
8533 unsigned int in_value
= in_attr
[i
].int_value();
8534 unsigned int out_value
= out_attr
[i
].int_value();
8535 gold_warning(_("%s uses %s enums yet the output is to use "
8536 "%s enums; use of enum values across objects "
8539 this->aeabi_enum_name(in_value
).c_str(),
8540 this->aeabi_enum_name(out_value
).c_str());
8544 case elfcpp::Tag_ABI_VFP_args
:
8547 case elfcpp::Tag_ABI_WMMX_args
:
8548 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
8550 gold_error(_("%s uses iWMMXt register arguments, output does "
8555 case Object_attribute::Tag_compatibility
:
8556 // Merged in target-independent code.
8558 case elfcpp::Tag_ABI_HardFP_use
:
8559 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
8560 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
8561 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
8562 out_attr
[i
].set_int_value(3);
8563 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
8564 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8566 case elfcpp::Tag_ABI_FP_16bit_format
:
8567 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
8569 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
8570 gold_error(_("fp16 format mismatch between %s and output"),
8573 if (in_attr
[i
].int_value() != 0)
8574 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8577 case elfcpp::Tag_nodefaults
:
8578 // This tag is set if it exists, but the value is unused (and is
8579 // typically zero). We don't actually need to do anything here -
8580 // the merge happens automatically when the type flags are merged
8583 case elfcpp::Tag_also_compatible_with
:
8584 // Already done in Tag_CPU_arch.
8586 case elfcpp::Tag_conformance
:
8587 // Keep the attribute if it matches. Throw it away otherwise.
8588 // No attribute means no claim to conform.
8589 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
8590 out_attr
[i
].set_string_value("");
8595 const char* err_object
= NULL
;
8597 // The "known_obj_attributes" table does contain some undefined
8598 // attributes. Ensure that there are unused.
8599 if (out_attr
[i
].int_value() != 0
8600 || out_attr
[i
].string_value() != "")
8601 err_object
= "output";
8602 else if (in_attr
[i
].int_value() != 0
8603 || in_attr
[i
].string_value() != "")
8606 if (err_object
!= NULL
)
8608 // Attribute numbers >=64 (mod 128) can be safely ignored.
8610 gold_error(_("%s: unknown mandatory EABI object attribute "
8614 gold_warning(_("%s: unknown EABI object attribute %d"),
8618 // Only pass on attributes that match in both inputs.
8619 if (!in_attr
[i
].matches(out_attr
[i
]))
8621 out_attr
[i
].set_int_value(0);
8622 out_attr
[i
].set_string_value("");
8627 // If out_attr was copied from in_attr then it won't have a type yet.
8628 if (in_attr
[i
].type() && !out_attr
[i
].type())
8629 out_attr
[i
].set_type(in_attr
[i
].type());
8632 // Merge Tag_compatibility attributes and any common GNU ones.
8633 this->attributes_section_data_
->merge(name
, pasd
);
8635 // Check for any attributes not known on ARM.
8636 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
8637 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
8638 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
8639 Other_attributes
* out_other_attributes
=
8640 this->attributes_section_data_
->other_attributes(vendor
);
8641 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
8643 while (in_iter
!= in_other_attributes
->end()
8644 || out_iter
!= out_other_attributes
->end())
8646 const char* err_object
= NULL
;
8649 // The tags for each list are in numerical order.
8650 // If the tags are equal, then merge.
8651 if (out_iter
!= out_other_attributes
->end()
8652 && (in_iter
== in_other_attributes
->end()
8653 || in_iter
->first
> out_iter
->first
))
8655 // This attribute only exists in output. We can't merge, and we
8656 // don't know what the tag means, so delete it.
8657 err_object
= "output";
8658 err_tag
= out_iter
->first
;
8659 int saved_tag
= out_iter
->first
;
8660 delete out_iter
->second
;
8661 out_other_attributes
->erase(out_iter
);
8662 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
8664 else if (in_iter
!= in_other_attributes
->end()
8665 && (out_iter
!= out_other_attributes
->end()
8666 || in_iter
->first
< out_iter
->first
))
8668 // This attribute only exists in input. We can't merge, and we
8669 // don't know what the tag means, so ignore it.
8671 err_tag
= in_iter
->first
;
8674 else // The tags are equal.
8676 // As present, all attributes in the list are unknown, and
8677 // therefore can't be merged meaningfully.
8678 err_object
= "output";
8679 err_tag
= out_iter
->first
;
8681 // Only pass on attributes that match in both inputs.
8682 if (!in_iter
->second
->matches(*(out_iter
->second
)))
8684 // No match. Delete the attribute.
8685 int saved_tag
= out_iter
->first
;
8686 delete out_iter
->second
;
8687 out_other_attributes
->erase(out_iter
);
8688 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
8692 // Matched. Keep the attribute and move to the next.
8700 // Attribute numbers >=64 (mod 128) can be safely ignored. */
8701 if ((err_tag
& 127) < 64)
8703 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
8704 err_object
, err_tag
);
8708 gold_warning(_("%s: unknown EABI object attribute %d"),
8709 err_object
, err_tag
);
8715 // Stub-generation methods for Target_arm.
8717 // Make a new Arm_input_section object.
8719 template<bool big_endian
>
8720 Arm_input_section
<big_endian
>*
8721 Target_arm
<big_endian
>::new_arm_input_section(
8725 Section_id
sid(relobj
, shndx
);
8727 Arm_input_section
<big_endian
>* arm_input_section
=
8728 new Arm_input_section
<big_endian
>(relobj
, shndx
);
8729 arm_input_section
->init();
8731 // Register new Arm_input_section in map for look-up.
8732 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
8733 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
8735 // Make sure that it we have not created another Arm_input_section
8736 // for this input section already.
8737 gold_assert(ins
.second
);
8739 return arm_input_section
;
8742 // Find the Arm_input_section object corresponding to the SHNDX-th input
8743 // section of RELOBJ.
8745 template<bool big_endian
>
8746 Arm_input_section
<big_endian
>*
8747 Target_arm
<big_endian
>::find_arm_input_section(
8749 unsigned int shndx
) const
8751 Section_id
sid(relobj
, shndx
);
8752 typename
Arm_input_section_map::const_iterator p
=
8753 this->arm_input_section_map_
.find(sid
);
8754 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
8757 // Make a new stub table.
8759 template<bool big_endian
>
8760 Stub_table
<big_endian
>*
8761 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
8763 Stub_table
<big_endian
>* stub_table
=
8764 new Stub_table
<big_endian
>(owner
);
8765 this->stub_tables_
.push_back(stub_table
);
8767 stub_table
->set_address(owner
->address() + owner
->data_size());
8768 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
8769 stub_table
->finalize_data_size();
8774 // Scan a relocation for stub generation.
8776 template<bool big_endian
>
8778 Target_arm
<big_endian
>::scan_reloc_for_stub(
8779 const Relocate_info
<32, big_endian
>* relinfo
,
8780 unsigned int r_type
,
8781 const Sized_symbol
<32>* gsym
,
8783 const Symbol_value
<32>* psymval
,
8784 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
8785 Arm_address address
)
8787 typedef typename Target_arm
<big_endian
>::Relocate Relocate
;
8789 const Arm_relobj
<big_endian
>* arm_relobj
=
8790 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8792 if (r_type
== elfcpp::R_ARM_V4BX
)
8794 const uint32_t reg
= (addend
& 0xf);
8795 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8798 // Try looking up an existing stub from a stub table.
8799 Stub_table
<big_endian
>* stub_table
=
8800 arm_relobj
->stub_table(relinfo
->data_shndx
);
8801 gold_assert(stub_table
!= NULL
);
8803 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
8805 // create a new stub and add it to stub table.
8806 Arm_v4bx_stub
* stub
=
8807 this->stub_factory().make_arm_v4bx_stub(reg
);
8808 gold_assert(stub
!= NULL
);
8809 stub_table
->add_arm_v4bx_stub(stub
);
8816 bool target_is_thumb
;
8817 Symbol_value
<32> symval
;
8820 // This is a global symbol. Determine if we use PLT and if the
8821 // final target is THUMB.
8822 if (gsym
->use_plt_offset(Relocate::reloc_is_non_pic(r_type
)))
8824 // This uses a PLT, change the symbol value.
8825 symval
.set_output_value(this->plt_section()->address()
8826 + gsym
->plt_offset());
8828 target_is_thumb
= false;
8830 else if (gsym
->is_undefined())
8831 // There is no need to generate a stub symbol is undefined.
8836 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
8837 || (gsym
->type() == elfcpp::STT_FUNC
8838 && !gsym
->is_undefined()
8839 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
8844 // This is a local symbol. Determine if the final target is THUMB.
8845 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
8848 // Strip LSB if this points to a THUMB target.
8849 const Arm_reloc_property
* reloc_property
=
8850 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
8851 gold_assert(reloc_property
!= NULL
);
8853 && reloc_property
->uses_thumb_bit()
8854 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
8856 Arm_address stripped_value
=
8857 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
8858 symval
.set_output_value(stripped_value
);
8862 // Get the symbol value.
8863 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
8865 // Owing to pipelining, the PC relative branches below actually skip
8866 // two instructions when the branch offset is 0.
8867 Arm_address destination
;
8870 case elfcpp::R_ARM_CALL
:
8871 case elfcpp::R_ARM_JUMP24
:
8872 case elfcpp::R_ARM_PLT32
:
8874 destination
= value
+ addend
+ 8;
8876 case elfcpp::R_ARM_THM_CALL
:
8877 case elfcpp::R_ARM_THM_XPC22
:
8878 case elfcpp::R_ARM_THM_JUMP24
:
8879 case elfcpp::R_ARM_THM_JUMP19
:
8881 destination
= value
+ addend
+ 4;
8887 Reloc_stub
* stub
= NULL
;
8888 Stub_type stub_type
=
8889 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
8891 if (stub_type
!= arm_stub_none
)
8893 // Try looking up an existing stub from a stub table.
8894 Stub_table
<big_endian
>* stub_table
=
8895 arm_relobj
->stub_table(relinfo
->data_shndx
);
8896 gold_assert(stub_table
!= NULL
);
8898 // Locate stub by destination.
8899 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
8901 // Create a stub if there is not one already
8902 stub
= stub_table
->find_reloc_stub(stub_key
);
8905 // create a new stub and add it to stub table.
8906 stub
= this->stub_factory().make_reloc_stub(stub_type
);
8907 stub_table
->add_reloc_stub(stub
, stub_key
);
8910 // Record the destination address.
8911 stub
->set_destination_address(destination
8912 | (target_is_thumb
? 1 : 0));
8915 // For Cortex-A8, we need to record a relocation at 4K page boundary.
8916 if (this->fix_cortex_a8_
8917 && (r_type
== elfcpp::R_ARM_THM_JUMP24
8918 || r_type
== elfcpp::R_ARM_THM_JUMP19
8919 || r_type
== elfcpp::R_ARM_THM_CALL
8920 || r_type
== elfcpp::R_ARM_THM_XPC22
)
8921 && (address
& 0xfffU
) == 0xffeU
)
8923 // Found a candidate. Note we haven't checked the destination is
8924 // within 4K here: if we do so (and don't create a record) we can't
8925 // tell that a branch should have been relocated when scanning later.
8926 this->cortex_a8_relocs_info_
[address
] =
8927 new Cortex_a8_reloc(stub
, r_type
,
8928 destination
| (target_is_thumb
? 1 : 0));
8932 // This function scans a relocation sections for stub generation.
8933 // The template parameter Relocate must be a class type which provides
8934 // a single function, relocate(), which implements the machine
8935 // specific part of a relocation.
8937 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
8938 // SHT_REL or SHT_RELA.
8940 // PRELOCS points to the relocation data. RELOC_COUNT is the number
8941 // of relocs. OUTPUT_SECTION is the output section.
8942 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
8943 // mapped to output offsets.
8945 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
8946 // VIEW_SIZE is the size. These refer to the input section, unless
8947 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
8948 // the output section.
8950 template<bool big_endian
>
8951 template<int sh_type
>
8953 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
8954 const Relocate_info
<32, big_endian
>* relinfo
,
8955 const unsigned char* prelocs
,
8957 Output_section
* output_section
,
8958 bool needs_special_offset_handling
,
8959 const unsigned char* view
,
8960 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
8963 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
8964 const int reloc_size
=
8965 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
8967 Arm_relobj
<big_endian
>* arm_object
=
8968 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8969 unsigned int local_count
= arm_object
->local_symbol_count();
8971 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
8973 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
8975 Reltype
reloc(prelocs
);
8977 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
8978 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
8979 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
8981 r_type
= this->get_real_reloc_type(r_type
);
8983 // Only a few relocation types need stubs.
8984 if ((r_type
!= elfcpp::R_ARM_CALL
)
8985 && (r_type
!= elfcpp::R_ARM_JUMP24
)
8986 && (r_type
!= elfcpp::R_ARM_PLT32
)
8987 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
8988 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
8989 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
8990 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
8991 && (r_type
!= elfcpp::R_ARM_V4BX
))
8994 section_offset_type offset
=
8995 convert_to_section_size_type(reloc
.get_r_offset());
8997 if (needs_special_offset_handling
)
8999 offset
= output_section
->output_offset(relinfo
->object
,
9000 relinfo
->data_shndx
,
9006 if (r_type
== elfcpp::R_ARM_V4BX
)
9008 // Get the BX instruction.
9009 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
9010 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ offset
);
9011 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
9012 elfcpp::Swap
<32, big_endian
>::readval(wv
);
9013 this->scan_reloc_for_stub(relinfo
, r_type
, NULL
, 0, NULL
,
9019 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
9020 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
9021 stub_addend_reader(r_type
, view
+ offset
, reloc
);
9023 const Sized_symbol
<32>* sym
;
9025 Symbol_value
<32> symval
;
9026 const Symbol_value
<32> *psymval
;
9027 if (r_sym
< local_count
)
9030 psymval
= arm_object
->local_symbol(r_sym
);
9032 // If the local symbol belongs to a section we are discarding,
9033 // and that section is a debug section, try to find the
9034 // corresponding kept section and map this symbol to its
9035 // counterpart in the kept section. The symbol must not
9036 // correspond to a section we are folding.
9038 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
9040 && shndx
!= elfcpp::SHN_UNDEF
9041 && !arm_object
->is_section_included(shndx
)
9042 && !(relinfo
->symtab
->is_section_folded(arm_object
, shndx
)))
9044 if (comdat_behavior
== CB_UNDETERMINED
)
9047 arm_object
->section_name(relinfo
->data_shndx
);
9048 comdat_behavior
= get_comdat_behavior(name
.c_str());
9050 if (comdat_behavior
== CB_PRETEND
)
9053 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
9054 arm_object
->map_to_kept_section(shndx
, &found
);
9056 symval
.set_output_value(value
+ psymval
->input_value());
9058 symval
.set_output_value(0);
9062 symval
.set_output_value(0);
9064 symval
.set_no_output_symtab_entry();
9070 const Symbol
* gsym
= arm_object
->global_symbol(r_sym
);
9071 gold_assert(gsym
!= NULL
);
9072 if (gsym
->is_forwarder())
9073 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
9075 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
9076 if (sym
->has_symtab_index())
9077 symval
.set_output_symtab_index(sym
->symtab_index());
9079 symval
.set_no_output_symtab_entry();
9081 // We need to compute the would-be final value of this global
9083 const Symbol_table
* symtab
= relinfo
->symtab
;
9084 const Sized_symbol
<32>* sized_symbol
=
9085 symtab
->get_sized_symbol
<32>(gsym
);
9086 Symbol_table::Compute_final_value_status status
;
9088 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
9090 // Skip this if the symbol has not output section.
9091 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
9094 symval
.set_output_value(value
);
9098 // If symbol is a section symbol, we don't know the actual type of
9099 // destination. Give up.
9100 if (psymval
->is_section_symbol())
9103 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
9104 addend
, view_address
+ offset
);
9108 // Scan an input section for stub generation.
9110 template<bool big_endian
>
9112 Target_arm
<big_endian
>::scan_section_for_stubs(
9113 const Relocate_info
<32, big_endian
>* relinfo
,
9114 unsigned int sh_type
,
9115 const unsigned char* prelocs
,
9117 Output_section
* output_section
,
9118 bool needs_special_offset_handling
,
9119 const unsigned char* view
,
9120 Arm_address view_address
,
9121 section_size_type view_size
)
9123 if (sh_type
== elfcpp::SHT_REL
)
9124 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
9129 needs_special_offset_handling
,
9133 else if (sh_type
== elfcpp::SHT_RELA
)
9134 // We do not support RELA type relocations yet. This is provided for
9136 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
9141 needs_special_offset_handling
,
9149 // Group input sections for stub generation.
9151 // We goup input sections in an output sections so that the total size,
9152 // including any padding space due to alignment is smaller than GROUP_SIZE
9153 // unless the only input section in group is bigger than GROUP_SIZE already.
9154 // Then an ARM stub table is created to follow the last input section
9155 // in group. For each group an ARM stub table is created an is placed
9156 // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further
9157 // extend the group after the stub table.
9159 template<bool big_endian
>
9161 Target_arm
<big_endian
>::group_sections(
9163 section_size_type group_size
,
9164 bool stubs_always_after_branch
)
9166 // Group input sections and insert stub table
9167 Layout::Section_list section_list
;
9168 layout
->get_allocated_sections(§ion_list
);
9169 for (Layout::Section_list::const_iterator p
= section_list
.begin();
9170 p
!= section_list
.end();
9173 Arm_output_section
<big_endian
>* output_section
=
9174 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9175 output_section
->group_sections(group_size
, stubs_always_after_branch
,
9180 // Relaxation hook. This is where we do stub generation.
9182 template<bool big_endian
>
9184 Target_arm
<big_endian
>::do_relax(
9186 const Input_objects
* input_objects
,
9187 Symbol_table
* symtab
,
9190 // No need to generate stubs if this is a relocatable link.
9191 gold_assert(!parameters
->options().relocatable());
9193 // If this is the first pass, we need to group input sections into
9195 bool done_exidx_fixup
= false;
9198 // Determine the stub group size. The group size is the absolute
9199 // value of the parameter --stub-group-size. If --stub-group-size
9200 // is passed a negative value, we restict stubs to be always after
9201 // the stubbed branches.
9202 int32_t stub_group_size_param
=
9203 parameters
->options().stub_group_size();
9204 bool stubs_always_after_branch
= stub_group_size_param
< 0;
9205 section_size_type stub_group_size
= abs(stub_group_size_param
);
9207 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
9208 // page as the first half of a 32-bit branch straddling two 4K pages.
9209 // This is a crude way of enforcing that.
9210 if (this->fix_cortex_a8_
)
9211 stubs_always_after_branch
= true;
9213 if (stub_group_size
== 1)
9216 // Thumb branch range is +-4MB has to be used as the default
9217 // maximum size (a given section can contain both ARM and Thumb
9218 // code, so the worst case has to be taken into account).
9220 // This value is 24K less than that, which allows for 2025
9221 // 12-byte stubs. If we exceed that, then we will fail to link.
9222 // The user will have to relink with an explicit group size
9224 stub_group_size
= 4170000;
9227 group_sections(layout
, stub_group_size
, stubs_always_after_branch
);
9229 // Also fix .ARM.exidx section coverage.
9230 Output_section
* os
= layout
->find_output_section(".ARM.exidx");
9231 if (os
!= NULL
&& os
->type() == elfcpp::SHT_ARM_EXIDX
)
9233 Arm_output_section
<big_endian
>* exidx_output_section
=
9234 Arm_output_section
<big_endian
>::as_arm_output_section(os
);
9235 this->fix_exidx_coverage(layout
, exidx_output_section
, symtab
);
9236 done_exidx_fixup
= true;
9240 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
9241 // beginning of each relaxation pass, just blow away all the stubs.
9242 // Alternatively, we could selectively remove only the stubs and reloc
9243 // information for code sections that have moved since the last pass.
9244 // That would require more book-keeping.
9245 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
9246 if (this->fix_cortex_a8_
)
9248 // Clear all Cortex-A8 reloc information.
9249 for (typename
Cortex_a8_relocs_info::const_iterator p
=
9250 this->cortex_a8_relocs_info_
.begin();
9251 p
!= this->cortex_a8_relocs_info_
.end();
9254 this->cortex_a8_relocs_info_
.clear();
9256 // Remove all Cortex-A8 stubs.
9257 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
9258 sp
!= this->stub_tables_
.end();
9260 (*sp
)->remove_all_cortex_a8_stubs();
9263 // Scan relocs for relocation stubs
9264 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
9265 op
!= input_objects
->relobj_end();
9268 Arm_relobj
<big_endian
>* arm_relobj
=
9269 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
9270 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
9273 // Check all stub tables to see if any of them have their data sizes
9274 // or addresses alignments changed. These are the only things that
9276 bool any_stub_table_changed
= false;
9277 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
9278 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
9279 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
9282 if ((*sp
)->update_data_size_and_addralign())
9284 // Update data size of stub table owner.
9285 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
9286 uint64_t address
= owner
->address();
9287 off_t offset
= owner
->offset();
9288 owner
->reset_address_and_file_offset();
9289 owner
->set_address_and_file_offset(address
, offset
);
9291 sections_needing_adjustment
.insert(owner
->output_section());
9292 any_stub_table_changed
= true;
9296 // Output_section_data::output_section() returns a const pointer but we
9297 // need to update output sections, so we record all output sections needing
9298 // update above and scan the sections here to find out what sections need
9300 for(Layout::Section_list::const_iterator p
= layout
->section_list().begin();
9301 p
!= layout
->section_list().end();
9304 if (sections_needing_adjustment
.find(*p
)
9305 != sections_needing_adjustment
.end())
9306 (*p
)->set_section_offsets_need_adjustment();
9309 // Stop relaxation if no EXIDX fix-up and no stub table change.
9310 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
9312 // Finalize the stubs in the last relaxation pass.
9313 if (!continue_relaxation
)
9315 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
9316 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
9318 (*sp
)->finalize_stubs();
9320 // Update output local symbol counts of objects if necessary.
9321 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
9322 op
!= input_objects
->relobj_end();
9325 Arm_relobj
<big_endian
>* arm_relobj
=
9326 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
9328 // Update output local symbol counts. We need to discard local
9329 // symbols defined in parts of input sections that are discarded by
9331 if (arm_relobj
->output_local_symbol_count_needs_update())
9332 arm_relobj
->update_output_local_symbol_count();
9336 return continue_relaxation
;
9341 template<bool big_endian
>
9343 Target_arm
<big_endian
>::relocate_stub(
9345 const Relocate_info
<32, big_endian
>* relinfo
,
9346 Output_section
* output_section
,
9347 unsigned char* view
,
9348 Arm_address address
,
9349 section_size_type view_size
)
9352 const Stub_template
* stub_template
= stub
->stub_template();
9353 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
9355 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
9356 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
9358 unsigned int r_type
= insn
->r_type();
9359 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
9360 section_size_type reloc_size
= insn
->size();
9361 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
9363 // This is the address of the stub destination.
9364 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
9365 Symbol_value
<32> symval
;
9366 symval
.set_output_value(target
);
9368 // Synthesize a fake reloc just in case. We don't have a symbol so
9370 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
9371 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
9372 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
9373 reloc_write
.put_r_offset(reloc_offset
);
9374 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
9375 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
9377 relocate
.relocate(relinfo
, this, output_section
,
9378 this->fake_relnum_for_stubs
, rel
, r_type
,
9379 NULL
, &symval
, view
+ reloc_offset
,
9380 address
+ reloc_offset
, reloc_size
);
9384 // Determine whether an object attribute tag takes an integer, a
9387 template<bool big_endian
>
9389 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
9391 if (tag
== Object_attribute::Tag_compatibility
)
9392 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9393 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
9394 else if (tag
== elfcpp::Tag_nodefaults
)
9395 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9396 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
9397 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
9398 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
9400 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
9402 return ((tag
& 1) != 0
9403 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
9404 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
9407 // Reorder attributes.
9409 // The ABI defines that Tag_conformance should be emitted first, and that
9410 // Tag_nodefaults should be second (if either is defined). This sets those
9411 // two positions, and bumps up the position of all the remaining tags to
9414 template<bool big_endian
>
9416 Target_arm
<big_endian
>::do_attributes_order(int num
) const
9418 // Reorder the known object attributes in output. We want to move
9419 // Tag_conformance to position 4 and Tag_conformance to position 5
9420 // and shift eveything between 4 .. Tag_conformance - 1 to make room.
9422 return elfcpp::Tag_conformance
;
9424 return elfcpp::Tag_nodefaults
;
9425 if ((num
- 2) < elfcpp::Tag_nodefaults
)
9427 if ((num
- 1) < elfcpp::Tag_conformance
)
9432 // Scan a span of THUMB code for Cortex-A8 erratum.
9434 template<bool big_endian
>
9436 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
9437 Arm_relobj
<big_endian
>* arm_relobj
,
9439 section_size_type span_start
,
9440 section_size_type span_end
,
9441 const unsigned char* view
,
9442 Arm_address address
)
9444 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
9446 // The opcode is BLX.W, BL.W, B.W, Bcc.W
9447 // The branch target is in the same 4KB region as the
9448 // first half of the branch.
9449 // The instruction before the branch is a 32-bit
9450 // length non-branch instruction.
9451 section_size_type i
= span_start
;
9452 bool last_was_32bit
= false;
9453 bool last_was_branch
= false;
9454 while (i
< span_end
)
9456 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
9457 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
9458 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
9459 bool is_blx
= false, is_b
= false;
9460 bool is_bl
= false, is_bcc
= false;
9462 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
9465 // Load the rest of the insn (in manual-friendly order).
9466 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
9468 // Encoding T4: B<c>.W.
9469 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
9470 // Encoding T1: BL<c>.W.
9471 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
9472 // Encoding T2: BLX<c>.W.
9473 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
9474 // Encoding T3: B<c>.W (not permitted in IT block).
9475 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
9476 && (insn
& 0x07f00000U
) != 0x03800000U
);
9479 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
9481 // If this instruction is a 32-bit THUMB branch that crosses a 4K
9482 // page boundary and it follows 32-bit non-branch instruction,
9483 // we need to work around.
9485 && ((address
+ i
) & 0xfffU
) == 0xffeU
9487 && !last_was_branch
)
9489 // Check to see if there is a relocation stub for this branch.
9490 bool force_target_arm
= false;
9491 bool force_target_thumb
= false;
9492 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
9493 Cortex_a8_relocs_info::const_iterator p
=
9494 this->cortex_a8_relocs_info_
.find(address
+ i
);
9496 if (p
!= this->cortex_a8_relocs_info_
.end())
9498 cortex_a8_reloc
= p
->second
;
9499 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
9501 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
9502 && !target_is_thumb
)
9503 force_target_arm
= true;
9504 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
9506 force_target_thumb
= true;
9510 Stub_type stub_type
= arm_stub_none
;
9512 // Check if we have an offending branch instruction.
9513 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
9514 uint16_t lower_insn
= insn
& 0xffffU
;
9515 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
9517 if (cortex_a8_reloc
!= NULL
9518 && cortex_a8_reloc
->reloc_stub() != NULL
)
9519 // We've already made a stub for this instruction, e.g.
9520 // it's a long branch or a Thumb->ARM stub. Assume that
9521 // stub will suffice to work around the A8 erratum (see
9522 // setting of always_after_branch above).
9526 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
9528 stub_type
= arm_stub_a8_veneer_b_cond
;
9530 else if (is_b
|| is_bl
|| is_blx
)
9532 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
9538 ? arm_stub_a8_veneer_blx
9540 ? arm_stub_a8_veneer_bl
9541 : arm_stub_a8_veneer_b
));
9544 if (stub_type
!= arm_stub_none
)
9546 Arm_address pc_for_insn
= address
+ i
+ 4;
9548 // The original instruction is a BL, but the target is
9549 // an ARM instruction. If we were not making a stub,
9550 // the BL would have been converted to a BLX. Use the
9551 // BLX stub instead in that case.
9552 if (this->may_use_blx() && force_target_arm
9553 && stub_type
== arm_stub_a8_veneer_bl
)
9555 stub_type
= arm_stub_a8_veneer_blx
;
9559 // Conversely, if the original instruction was
9560 // BLX but the target is Thumb mode, use the BL stub.
9561 else if (force_target_thumb
9562 && stub_type
== arm_stub_a8_veneer_blx
)
9564 stub_type
= arm_stub_a8_veneer_bl
;
9572 // If we found a relocation, use the proper destination,
9573 // not the offset in the (unrelocated) instruction.
9574 // Note this is always done if we switched the stub type above.
9575 if (cortex_a8_reloc
!= NULL
)
9576 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
9578 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
9580 // Add a new stub if destination address in in the same page.
9581 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
9583 Cortex_a8_stub
* stub
=
9584 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
9588 Stub_table
<big_endian
>* stub_table
=
9589 arm_relobj
->stub_table(shndx
);
9590 gold_assert(stub_table
!= NULL
);
9591 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
9596 i
+= insn_32bit
? 4 : 2;
9597 last_was_32bit
= insn_32bit
;
9598 last_was_branch
= is_32bit_branch
;
9602 // Apply the Cortex-A8 workaround.
9604 template<bool big_endian
>
9606 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
9607 const Cortex_a8_stub
* stub
,
9608 Arm_address stub_address
,
9609 unsigned char* insn_view
,
9610 Arm_address insn_address
)
9612 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
9613 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
9614 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
9615 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
9616 off_t branch_offset
= stub_address
- (insn_address
+ 4);
9618 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
9619 switch (stub
->stub_template()->type())
9621 case arm_stub_a8_veneer_b_cond
:
9622 gold_assert(!utils::has_overflow
<21>(branch_offset
));
9623 upper_insn
= RelocFuncs::thumb32_cond_branch_upper(upper_insn
,
9625 lower_insn
= RelocFuncs::thumb32_cond_branch_lower(lower_insn
,
9629 case arm_stub_a8_veneer_b
:
9630 case arm_stub_a8_veneer_bl
:
9631 case arm_stub_a8_veneer_blx
:
9632 if ((lower_insn
& 0x5000U
) == 0x4000U
)
9633 // For a BLX instruction, make sure that the relocation is
9634 // rounded up to a word boundary. This follows the semantics of
9635 // the instruction which specifies that bit 1 of the target
9636 // address will come from bit 1 of the base address.
9637 branch_offset
= (branch_offset
+ 2) & ~3;
9639 // Put BRANCH_OFFSET back into the insn.
9640 gold_assert(!utils::has_overflow
<25>(branch_offset
));
9641 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
9642 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
9649 // Put the relocated value back in the object file:
9650 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
9651 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
9654 template<bool big_endian
>
9655 class Target_selector_arm
: public Target_selector
9658 Target_selector_arm()
9659 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
9660 (big_endian
? "elf32-bigarm" : "elf32-littlearm"))
9664 do_instantiate_target()
9665 { return new Target_arm
<big_endian
>(); }
9668 // Fix .ARM.exidx section coverage.
9670 template<bool big_endian
>
9672 Target_arm
<big_endian
>::fix_exidx_coverage(
9674 Arm_output_section
<big_endian
>* exidx_section
,
9675 Symbol_table
* symtab
)
9677 // We need to look at all the input sections in output in ascending
9678 // order of of output address. We do that by building a sorted list
9679 // of output sections by addresses. Then we looks at the output sections
9680 // in order. The input sections in an output section are already sorted
9681 // by addresses within the output section.
9683 typedef std::set
<Output_section
*, output_section_address_less_than
>
9684 Sorted_output_section_list
;
9685 Sorted_output_section_list sorted_output_sections
;
9686 Layout::Section_list section_list
;
9687 layout
->get_allocated_sections(§ion_list
);
9688 for (Layout::Section_list::const_iterator p
= section_list
.begin();
9689 p
!= section_list
.end();
9692 // We only care about output sections that contain executable code.
9693 if (((*p
)->flags() & elfcpp::SHF_EXECINSTR
) != 0)
9694 sorted_output_sections
.insert(*p
);
9697 // Go over the output sections in ascending order of output addresses.
9698 typedef typename Arm_output_section
<big_endian
>::Text_section_list
9700 Text_section_list sorted_text_sections
;
9701 for(typename
Sorted_output_section_list::iterator p
=
9702 sorted_output_sections
.begin();
9703 p
!= sorted_output_sections
.end();
9706 Arm_output_section
<big_endian
>* arm_output_section
=
9707 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9708 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
9711 exidx_section
->fix_exidx_coverage(sorted_text_sections
, symtab
);
9714 Target_selector_arm
<false> target_selector_arm
;
9715 Target_selector_arm
<true> target_selector_armbe
;
9717 } // End anonymous namespace.