Add more memory tests
[gram.git] / gram / simulation / README.md
1 # Low level simulation
2
3 This folder contains code used for low level simulation of various aspects of gram.
4
5 ## Requirements
6
7 * Icarus Verilog (built from latest sources)
8 * ECP5 instances models from a Lattice Diamond installation (just install Lattice Diamond)
9
10 ## Available simulations
11
12 ### simcrg
13
14 Simulates the CRG used in ECPIX5 gram tests and checks for a few assertions.
15
16 ```
17 ./runsimcrg.sh
18 ```
19
20 Produces `simcrg.fst` (compatbile with Gtkwave).
21
22 ### simsoc
23
24 Simulates a full SoC with a UART Wishbone master and a DDR3 model, and sends the init commands that libgram would send over serial.
25
26 ```
27 ./runsimsoc.sh
28 ```
29
30 Produces `simsoc.fst` (compatible with Gtkwave).