gram/simulation/simcrg.py

   1 # This file is Copyright (c) 2020 LambdaConcept <contact@lambdaconcept.com>
   2
   3 from nmigen import *
   4 from icarusecpix5platform import IcarusECPIX5Platform
   5 from crg import *
   6 from nmigen.build import *
   7
   8 class Top(Elaboratable):
   9     def __init__(self):
  10         self.dramsync = Signal()
  11         self.dramsync_reset = Signal()
  12         self.sync = Signal()
  13         self.sync2x = Signal()
  14
  15     def elaborate(self, platform):
  16         m = Module()
  17
  18         m.submodules.crg = crg = ECPIX5CRG()
  19
  20         resources = [
  21             Resource("clock_conn", 0, Pins("1 2 3 4", conn=("pmod", 5,), dir="o"), Attrs(IO_TYPE="LVCMOS33", PULLMODE="UP")),
  22         ]
  23         platform.add_resources(resources)
  24
  25         clock_conn = platform.request("clock_conn", 0)
  26         m.d.comb += [
  27             self.dramsync.eq(ClockSignal("dramsync")),
  28             self.dramsync_reset.eq(ResetSignal("dramsync")),
  29             self.sync.eq(ClockSignal("sync")),
  30             self.sync2x.eq(ClockSignal("sync2x")),
  31
  32             clock_conn[0].eq(ClockSignal("dramsync")),
  33             clock_conn[1].eq(ResetSignal("dramsync")),
  34             clock_conn[2].eq(ClockSignal("sync")),
  35             clock_conn[3].eq(ClockSignal("sync2x")),
  36         ]
  37
  38         return m
  39
  40 if __name__ == "__main__":
  41     top = Top()
  42     IcarusECPIX5Platform().build(top, build_dir="build_simcrg")