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setup.py: Removed deps as per bug #1086#c7.
[gram.git]
/
gram
/
simulation
/
simsoc.ys
1
read_ilang build_simsoc/top.il
2
delete w:$verilog_initial_trigger
3
proc_prune
4
proc_clean
5
proc_rmdead
6
proc_init
7
proc_arst
8
proc_dlatch
9
proc_dff
10
proc_mux
11
proc_rmdead
12
proc_clean
13
pmuxtree
14
memory_collect
15
extract_fa
16
clean
17
opt
18
clean
19
write_verilog -norename build_simsoc/top.v
20
stat