1 #nmigen: UnusedElaboratable=no
3 from nmigen
.hdl
.ast
import Past
5 from gram
.common
import tXXDController
, tFAWController
6 from gram
.test
.utils
import *
8 class tXXDControllerTestCase(FHDLTestCase
):
10 def generic_test(txxd
):
11 dut
= tXXDController(txxd
)
12 self
.assertFormal(dut
, mode
="bmc", depth
=txxd
+1 if txxd
is not None else 10)
21 def generic_test(txxd
):
22 dut
= tXXDController(txxd
)
25 yield; yield Delay(1e-9)
26 self
.assertFalse((yield dut
.ready
))
31 self
.assertFalse((yield dut
.ready
))
34 self
.assertTrue((yield dut
.ready
))
36 runSimulation(dut
, process
, "test_common_txxdcontroller.vcd")
42 class tFAWControllerTestCase(FHDLTestCase
):
43 def test_strobe_3(self
):
44 dut
= tFAWController(10)
49 self
.assertTrue((yield dut
.ready
))
55 self
.assertFalse((yield dut
.valid
))
57 runSimulation(dut
, process
, "test_common.vcd")