Use the correct value for test depth
[gram.git] / gram / test / test_core_refresher.py
1 from nmigen import *
2 from nmigen.hdl.ast import Past
3 from nmigen.asserts import Assert, Assume
4
5 from gram.core.refresher import RefreshExecuter, RefreshSequencer, RefreshTimer, RefreshPostponer, Refresher
6 from gram.compat import *
7 from utils import *
8
9 class RefreshExecuterTestCase(FHDLTestCase):
10 def test_executer(self):
11 def generic_test(abits, babits, trp, trfc):
12 m = Module()
13 m.submodules.dut = dut = RefreshExecuter(abits=abits, babits=babits, trp=trp, trfc=trfc)
14
15 def process():
16 yield dut.start.eq(1)
17 yield
18 yield
19 self.assertEqual((yield dut.a), 2**10)
20 for i in range(trp):
21 yield
22 self.assertEqual((yield dut.a), 0)
23
24 runSimulation(m, process, "test_refreshexecuter.vcd")
25
26 generic_test(20, 20, 5, 5)
27 generic_test(20, 20, 100, 5)
28
29 class RefreshSequencerTestCase(FHDLTestCase):
30 def test_formal(self):
31 trp = 5; trfc = 5
32 dut = RefreshSequencer(abits=14, babits=3, trp=trp, trfc=trfc, postponing=1)
33 self.assertFormal(dut, mode="bmc", depth=trp+trfc+1)
34
35 class RefreshTimerTestCase(FHDLTestCase):
36 def test_formal(self):
37 def generic_test(tREFI):
38 dut = RefreshTimer(tREFI)
39 self.assertFormal(dut, mode="bmc", depth=tREFI+1)
40 [generic_test(_) for _ in [2, 5, 10]]
41
42 class RefreshPostponerTestCase(FHDLTestCase):
43 def test_init(self):
44 m = Module()
45 m.submodules.dut = dut = RefreshPostponer(1)
46
47 def process():
48 self.assertFalse((yield dut.req_o))
49
50 runSimulation(m, process, "test_refreshpostponer.vcd")
51
52 def test_delay(self):
53 def generic_test(delay):
54 m = Module()
55 m.submodules.dut = dut = RefreshPostponer(delay)
56
57 def process():
58 yield dut.req_i.eq(1)
59 yield
60
61 for i in range(delay):
62 self.assertFalse((yield dut.req_o))
63 yield
64
65 self.assertTrue((yield dut.req_o))
66
67 runSimulation(m, process, "test_refreshpostponer.vcd")
68
69 [generic_test(_) for _ in [1, 5, 10]]
70
71 def test_req_not_stuck(self):
72 def generic_test(delay):
73 m = Module()
74 m.submodules.dut = dut = RefreshPostponer(delay)
75
76 def process():
77 yield dut.req_i.eq(1)
78 yield
79
80 for i in range(delay):
81 yield
82
83 yield dut.req_i.eq(0)
84 yield
85 yield
86
87 self.assertFalse((yield dut.req_o))
88
89 runSimulation(m, process, "test_refreshpostponer.vcd")
90
91 [generic_test(_) for _ in [1, 5, 10]]
92
93 class RefresherTestCase(FHDLTestCase):
94 class Obj:
95 pass
96
97 settings = Obj()
98 settings.with_refresh = True
99 settings.refresh_zqcs_freq = 1e0
100 settings.timing = Obj()
101 settings.timing.tREFI = 64
102 settings.timing.tRP = 1
103 settings.timing.tRFC = 2
104 settings.timing.tZQCS = 64
105 settings.geom = Obj()
106 settings.geom.addressbits = 16
107 settings.geom.bankbits = 3
108 settings.phy = Obj()
109 settings.phy.nranks = 1
110
111 def test_init(self):
112 def generic_test(postponing):
113 m = Module()
114 m.submodules.dut = dut = Refresher(self.settings, 100e6, postponing)
115
116 def process():
117 self.assertFalse((yield dut.cmd.valid))
118
119 runSimulation(m, process, "test_refresher.vcd")
120
121 [generic_test(_) for _ in [1, 2, 4, 8]]