guidelines/Checklists

   1 Checklist for adding internal cell types
   2 ========================================
   3
   4 Things to do right away:
   5
   6         - Add to kernel/celltypes.h (incl. eval() handling for non-mem cells)
   7         - Add to InternalCellChecker::check() in kernel/rtlil.cc
   8         - Add to techlibs/common/simlib.v
   9         - Add to techlibs/common/techmap.v
  10
  11 Things to do after finalizing the cell interface:
  12
  13         - Add support to kernel/satgen.h for the new cell type
  14         - Add to manual/CHAPTER_CellLib.tex (or just add a fixme to the bottom)
  15         - Maybe add support to the Verilog backend for dumping such cells as expression
  16
  17
  18
  19 Checklist for creating Yosys releases
  20 =====================================
  21
  22 Update the CHANGELOG file:
  23
  24         cd ~yosys
  25         gitk &
  26         vi CHANGELOG
  27
  28
  29 Update and check documentation:
  30
  31         cd ~yosys
  32         make update-manual
  33         make manual
  34         - sanity check the figures in the appnotes and presentation
  35             - if there are any odd things -> investigate
  36             - make cosmetic changes to the .tex files if necessary
  37
  38         cd ~yosys
  39         vi README guidelines/*
  40         - is the information provided in those file still up to date
  41
  42
  43 Then with default config setting:
  44
  45         cd ~yosys
  46         make vgtest
  47
  48         cd ~yosys
  49         ./yosys -p 'proc; show' tests/simple/fiedler-cooley.v
  50         ./yosys -p 'proc; opt; show' tests/simple/fiedler-cooley.v
  51         ./yosys -p 'synth; show' tests/simple/fiedler-cooley.v
  52         ./yosys -p 'synth_xilinx -top up3down5; show' tests/simple/fiedler-cooley.v
  53
  54         cd ~yosys/examples/cmos
  55         bash testbench.sh
  56
  57         cd ~yosys/examples/basys3
  58         bash run.sh
  59
  60
  61 Test building plugins with various of the standard passes:
  62
  63         yosys-config --build test.so equiv_simple.cc
  64         - also check the code examples in guidelines/GettingStarted
  65
  66
  67 And if a version of the verific library is currently available:
  68
  69         cd ~yosys
  70         cat frontends/verific/build_amd64.txt
  71         - follow instructions
  72
  73         cd frontends/verific
  74         ../../yosys test_navre.ys
  75
  76
  77 Finally run all tests with "make config-{clang,gcc,gcc-4.8}":
  78
  79         cd ~yosys
  80         make clean
  81         make test
  82         make ystests
  83         make vloghtb
  84         make install
  85
  86         cd ~yosys-bigsim
  87         make clean
  88         make full
  89
  90         cd ~vloghammer
  91         make purge gen_issues gen_samples
  92         make SYN_LIST="yosys" SIM_LIST="icarus yosim verilator" REPORT_FULL=1 world
  93         chromium-browser report.html
  94
  95
  96 Release:
  97
  98         - set YOSYS_VER to x.y.z in Makefile
  99         - remove "bumpversion" target from Makefile
 100         - update version string in CHANGELOG
 101         git commit -am "Yosys x.y.z"
 102
 103         - push tag to github
 104         - post changelog on github
 105         - post short release note on reddit
 106
 107
 108 Updating the website:
 109
 110         cd ~yosys
 111         make manual
 112         make install
 113
 114         - update pdf files on the website
 115
 116         cd ~yosys-web
 117         make update_cmd
 118         make update_show
 119         git commit -am update
 120         make push