[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS
[binutils-gdb.git] / include / ChangeLog
1 2018-10-09 Sudakshina Das <sudi.das@arm.com>
2
3 * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
4 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
5
6 2018-10-09 Sudakshina Das <sudi.das@arm.com>
7
8 * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
9 (AARCH64_FEATURE_ID_PFR2): New.
10 (AARCH64_ARCH_V8_5): Add both by default.
11
12 2018-10-09 Sudakshina Das <sudi.das@arm.com>
13
14 * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
15 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
16 (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
17 (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
18 define HINT #imm values.
19 (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
20
21 2018-10-09 Sudakshina Das <sudi.das@arm.com>
22
23 * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
24
25 2018-10-09 Sudakshina Das <sudi.das@arm.com>
26
27 * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
28
29 2018-10-09 Sudakshina Das <sudi.das@arm.com>
30
31 * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
32 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
33 (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
34 (aarch64_sys_regs_sr): Declare new table.
35
36 2018-10-09 Sudakshina Das <sudi.das@arm.com>
37
38 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
39 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
40
41 2018-10-09 Sudakshina Das <sudi.das@arm.com>
42
43 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
44 (AARCH64_FEATURE_FRINTTS): New.
45 (AARCH64_ARCH_V8_5): Add both by default.
46
47 2018-10-09 Sudakshina Das <sudi.das@arm.com>
48
49 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
50 (AARCH64_ARCH_V8_5): New.
51
52 2018-10-08 Alan Modra <amodra@gmail.com>
53
54 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
55
56 2018-10-05 Sudakshina Das <sudi.das@arm.com>
57
58 * opcode/arm.h (ARM_EXT2_PREDRES): New.
59 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
60
61 2018-10-05 Sudakshina Das <sudi.das@arm.com>
62
63 * opcode/arm.h (ARM_EXT2_SB): New.
64 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
65
66 2018-10-05 Sudakshina Das <sudi.das@arm.com>
67
68 * opcode/arm.h (ARM_EXT2_V8_5A): New.
69 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
70
71 2018-10-05 Richard Henderson <rth@twiddle.net>
72
73 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
74 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
75 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
76 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
77 R_OR1K_SLO13, R_OR1K_PLTA26.
78
79 2018-10-05 Richard Henderson <rth@twiddle.net>
80
81 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
82 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
83 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
84
85 2018-10-03 Tamar Christina <tamar.christina@arm.com>
86
87 * opcode/aarch64.h (aarch64_inst): Remove.
88 (enum err_type): Add ERR_VFI.
89 (aarch64_is_destructive_by_operands): New.
90 (init_insn_sequence): New.
91 (aarch64_decode_insn): Remove param name.
92
93 2018-10-03 Tamar Christina <tamar.christina@arm.com>
94
95 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
96 more arguments.
97
98 2018-10-03 Tamar Christina <tamar.christina@arm.com>
99
100 * opcode/aarch64.h (enum err_type): New.
101 (aarch64_decode_insn): Use it.
102
103 2018-10-03 Tamar Christina <tamar.christina@arm.com>
104
105 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
106 (aarch64_opcode_encode): Use it.
107
108 2018-10-03 Tamar Christina <tamar.christina@arm.com>
109
110 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
111 extend flags field size.
112 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
113
114 2018-10-03 John Darrington <john@darrington.wattle.id.au>
115
116 * dis-asm.h (print_insn_s12z): New declaration.
117
118 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
119
120 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
121 (MASK_FENCE_TSO): Likewise.
122
123 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
124
125 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
126
127 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
128
129 PR binutils/23694
130 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
131 include zero size sections at start of PT_NOTE segment.
132
133 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
134
135 * elf/nds32.h: Remove the unused target features.
136 * dis-asm.h (disassemble_init_nds32): Declared.
137 * elf/nds32.h (E_NDS32_NULL): Removed.
138 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
139 * opcode/nds32.h: Ident.
140 (N32_SUB6, INSN_LW): New macros.
141 (enum n32_opcodes): Updated.
142 * elf/nds32.h: Doc fixes.
143 * elf/nds32.h: Add R_NDS32_LSI.
144 * elf/nds32.h: Add new relocations for TLS.
145
146 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
147
148 * elf/common.h (AT_SUN_HWCAP): Rename to ...
149 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
150 compatibility.
151 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
152 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
153
154 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
155
156 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
157
158 2018-08-31 Alan Modra <amodra@gmail.com>
159
160 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
161 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
162 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
163 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
164
165 2018-08-30 Kito Cheng <kito@andestech.com>
166
167 * opcode/riscv.h (MAX_SUBSET_NUM): New.
168 (riscv_opcode): Add xlen_requirement field and change type of
169 subset.
170
171 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
172
173 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
174 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
175
176 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
177
178 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
179 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
180
181 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
182
183 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
184 E_MIPS_MACH_GS464.
185 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
186 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
187 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
188 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
189
190 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
191
192 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
193 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
194 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
195
196 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
197
198 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
199 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
200 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
201
202 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
203
204 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
205 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
206 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
207
208 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
209
210 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
211 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
212 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
213 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
214 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
215 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
216 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
217 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
218 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
219 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
220 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
221 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
222 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
223 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
224 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
225 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
226 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
227 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
228 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
229 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
230 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
231 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
232 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
233 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
234 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
235 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
236 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
237 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
238 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
239 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
240 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
241 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
242 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
243 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
244 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
245 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
246 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
247 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
248 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
249 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
250 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
251 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
252 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
253 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
254 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
255 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
256 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
257 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
258 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
259 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
260 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
261 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
262 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
263 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
264 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
265 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
266
267 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
268
269 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
270
271 2018-08-21 John Darrington <john@darrington.wattle.id.au>
272
273 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
274
275 2018-08-21 Alan Modra <amodra@gmail.com>
276
277 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
278 Mention use of "extract" function to provide default value.
279 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
280 (ppc_optional_operand_value): Rewrite to use extract function.
281
282 2018-08-18 John Darrington <john@darrington.wattle.id.au>
283
284 * opcode/s12z.h: New file.
285
286 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
287
288 * elf/arm.h: Updated comments for e_flags definitions.
289
290 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
291
292 * elf/arc.h (Tag_ARC_ATR_version): New tag.
293
294 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
295
296 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
297
298 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
299
300 Copy over from GCC
301 2018-07-26 Martin Liska <mliska@suse.cz>
302
303 PR lto/86548
304 * libiberty.h (make_temp_file_with_prefix): New function.
305
306 2018-07-30 Jim Wilson <jimw@sifive.com>
307
308 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
309 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
310 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
311
312 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
313
314 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
315 * elf/csky.h: New file.
316
317 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
318 Maciej W. Rozycki <macro@linux-mips.org>
319
320 * elf/mips.h (AFL_ASE_MASK): Correct typo.
321
322 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
323
324 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
325
326 2018-07-26 Alan Modra <amodra@gmail.com>
327
328 * elf/ppc64.h: Specify byte offset to local entry for values
329 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
330 value for such functions when entering via global entry point.
331 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
332
333 2018-07-24 Alan Modra <amodra@gmail.com>
334
335 PR 23430
336 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
337
338 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
339 Maciej W. Rozycki <macro@mips.com>
340
341 * elf/mips.h (AFL_ASE_MMI): New macro.
342 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
343 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
344
345 2018-07-17 Maciej W. Rozycki <macro@mips.com>
346
347 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
348
349 2018-07-06 Alan Modra <amodra@gmail.com>
350
351 * diagnostics.h: Comment on macro usage.
352
353 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
354
355 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
356 Define for clang.
357
358 2018-07-02 Maciej W. Rozycki <macro@mips.com>
359
360 PR tdep/8282
361 * dis-asm.h (disasm_option_arg_t): New typedef.
362 (disasm_options_and_args_t): Likewise.
363 (disasm_options_t): Add `arg' member, document members.
364 (disassembler_options_mips): New prototype.
365 (disassembler_options_arm, disassembler_options_powerpc)
366 (disassembler_options_s390): Update prototypes.
367
368 2018-06-29 Tamar Christina <tamar.christina@arm.com>
369
370 PR binutils/23192
371 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
372
373 2018-06-26 Alan Modra <amodra@gmail.com>
374
375 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
376
377 2018-06-24 Nick Clifton <nickc@redhat.com>
378
379 2.31 branch created.
380
381 2018-06-21 Alan Hayward <alan.hayward@arm.com>
382
383 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
384 for non SHT_NOBITS.
385
386 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
387
388 Sync with GCC
389
390 2018-05-24 Tom Rix <trix@juniper.net>
391
392 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
393
394 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
395
396 * longlong.h [__riscv] (__umulsidi3): Define.
397 [__riscv] (umul_ppmm): Likewise.
398 [__riscv] (__muluw3): Likewise.
399
400 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
401
402 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
403 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
404 * opcode/mips.h: Document "+\" operand format.
405 (ASE_GINV): New macro.
406
407 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
408 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
409
410 * elf/mips.h (AFL_ASE_CRC): New macro.
411 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
412 * opcode/mips.h (ASE_CRC): New macro.
413 * opcode/mips.h (ASE_CRC64): Likewise.
414
415 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
416
417 * elf/xtensa.h (xtensa_read_table_entries)
418 (xtensa_compute_fill_extra_space): New declarations.
419
420 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
421
422 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
423 define for GCC.
424
425 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
426
427 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
428 (DIAGNOSTIC_STRINGIFY): Likewise.
429 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
430 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
431 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
432 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
433 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
434 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
435
436 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
437
438 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
439
440 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
441
442 * splay-tree.h (splay_tree_compare_strings,
443 splay_tree_delete_pointers): Declare new utility functions.
444
445 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
446
447 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
448
449 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
450
451 * elf/riscv.h (EF_RISCV_RVE): New define.
452
453 2018-05-18 John Darrington <john@darrington.wattle.id.au>
454
455 * elf/s12z.h: New header.
456
457 2018-05-15 Tamar Christina <tamar.christina@arm.com>
458
459 PR binutils/21446
460 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
461
462 2018-05-15 Tamar Christina <tamar.christina@arm.com>
463
464 PR binutils/21446
465 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
466 (aarch64_print_operand): Support notes.
467
468 2018-05-15 Tamar Christina <tamar.christina@arm.com>
469
470 PR binutils/21446
471 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
472 (aarch64_decode_insn): Accept error struct.
473
474 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
475
476 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
477
478 2018-05-10 John Darrington <john@darrington.wattle.id.au>
479
480 * elf/common.h (EM_S12Z): New macro.
481
482 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
483
484 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
485 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
486 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
487 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
488
489 2018-05-08 Jim Wilson <jimw@sifive.com>
490
491 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
492 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
493 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
494
495 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
496
497 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
498 (vle_num_opcodes): Likewise.
499 (spe2_num_opcodes): Likewise.
500
501 2018-05-04 Alan Modra <amodra@gmail.com>
502
503 * ansidecl.h: Import from gcc.
504 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
505 to s_name.
506 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
507
508 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
509
510 * dis-asm.h: Added print_nfp_disassembler_options prototype.
511 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
512 Generic System V Application Binary Interface.
513 * elf/nfp.h: New, for NFP support.
514 * opcode/nfp.h: New, for NFP support.
515
516 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
517 Mickaël Guêné <mickael.guene@st.com>
518
519 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
520 R_ARM_TLS_IE32_FDPIC.
521
522 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
523 Mickaël Guêné <mickael.guene@st.com>
524
525 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
526 (R_ARM_FUNCDESC)
527 (R_ARM_FUNCDESC_VALUE): Define new relocations.
528
529 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
530 Mickaël Guêné <mickael.guene@st.com>
531
532 * elf/arm.h (EF_ARM_FDPIC): New.
533
534 2018-04-18 Alan Modra <amodra@gmail.com>
535
536 * coff/mipspe.h: Delete.
537
538 2018-04-18 Alan Modra <amodra@gmail.com>
539
540 * aout/dynix3.h: Delete.
541
542 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
543
544 Microblaze Target: PIC data text relative
545
546 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
547 * elf/microblaze.h (Add 3 new relocations):
548 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
549 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
550
551 2018-04-17 Alan Modra <amodra@gmail.com>
552
553 * elf/i370.h: Revert removal.
554 * elf/i860.h: Likewise.
555 * elf/i960.h: Likewise.
556
557 2018-04-16 Alan Modra <amodra@gmail.com>
558
559 * coff/sparc.h: Delete.
560
561 2018-04-16 Alan Modra <amodra@gmail.com>
562
563 * aout/host.h: Remove m68k-aout and m68k-coff support.
564 * aout/hp300hpux.h: Delete.
565 * coff/apollo.h: Delete.
566 * coff/aux-coff.h: Delete.
567 * coff/m68k.h: Delete.
568
569 2018-04-16 Alan Modra <amodra@gmail.com>
570
571 * dis-asm.h: Remove sh5 and sh64 support.
572
573 2018-04-16 Alan Modra <amodra@gmail.com>
574
575 * coff/internal.h: Remove w65 support.
576 * coff/w65.h: Delete.
577
578 2018-04-16 Alan Modra <amodra@gmail.com>
579
580 * coff/we32k.h: Delete.
581
582 2018-04-16 Alan Modra <amodra@gmail.com>
583
584 * coff/internal.h: Remove m88k support.
585 * coff/m88k.h: Delete.
586 * opcode/m88k.h: Delete.
587
588 2018-04-16 Alan Modra <amodra@gmail.com>
589
590 * elf/i370.h: Delete.
591 * opcode/i370.h: Delete.
592
593 2018-04-16 Alan Modra <amodra@gmail.com>
594
595 * coff/h8500.h: Delete.
596 * coff/internal.h: Remove h8500 support.
597
598 2018-04-16 Alan Modra <amodra@gmail.com>
599
600 * coff/h8300.h: Delete.
601
602 2018-04-16 Alan Modra <amodra@gmail.com>
603
604 * ieee.h: Delete.
605
606 2018-04-16 Alan Modra <amodra@gmail.com>
607
608 * aout/host.h: Remove newsos3 support.
609
610 2018-04-16 Alan Modra <amodra@gmail.com>
611
612 * nlm/ChangeLog-9315: Delete.
613 * nlm/alpha-ext.h: Delete.
614 * nlm/common.h: Delete.
615 * nlm/external.h: Delete.
616 * nlm/i386-ext.h: Delete.
617 * nlm/internal.h: Delete.
618 * nlm/ppc-ext.h: Delete.
619 * nlm/sparc32-ext.h: Delete.
620
621 2018-04-16 Alan Modra <amodra@gmail.com>
622
623 * opcode/tahoe.h: Delete.
624
625 2018-04-11 Alan Modra <amodra@gmail.com>
626
627 * aout/adobe.h: Delete.
628 * aout/reloc.h: Delete.
629 * coff/i860.h: Delete.
630 * coff/i960.h: Delete.
631 * elf/i860.h: Delete.
632 * elf/i960.h: Delete.
633 * opcode/i860.h: Delete.
634 * opcode/i960.h: Delete.
635 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
636 * aout/ar.h (ARMAGB): Remove.
637 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
638 union internal_auxent): Remove i960 support.
639
640 2018-04-09 Alan Modra <amodra@gmail.com>
641
642 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
643 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
644
645 2018-03-28 Renlin Li <renlin.li@arm.com>
646
647 PR ld/22970
648 * elf/aarch64.h: Add relocation number for
649 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
650 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
651 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
652 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
653 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
654 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
655 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
656 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
657
658 2018-03-28 Nick Clifton <nickc@redhat.com>
659
660 PR 22988
661 * opcode/aarch64.h (enum aarch64_opnd): Add
662 AARCH64_OPND_SVE_ADDR_R.
663
664 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
665
666 * elf/common.h (DF_1_KMOD): New.
667 (DF_1_WEAKFILTER): Likewise.
668 (DF_1_NOCOMMON): Likewise.
669
670 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
671
672 * opcode/riscv.h (OP_MASK_FUNCT3): New.
673 (OP_SH_FUNCT3): Likewise.
674 (OP_MASK_FUNCT7): Likewise.
675 (OP_SH_FUNCT7): Likewise.
676 (OP_MASK_OP2): Likewise.
677 (OP_SH_OP2): Likewise.
678 (OP_MASK_CFUNCT4): Likewise.
679 (OP_SH_CFUNCT4): Likewise.
680 (OP_MASK_CFUNCT3): Likewise.
681 (OP_SH_CFUNCT3): Likewise.
682 (riscv_insn_types): Likewise.
683
684 2018-03-13 Nick Clifton <nickc@redhat.com>
685
686 PR 22113
687 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
688 field.
689
690 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
691
692 * opcode/i386 (OLDGCC_COMPAT): Removed.
693
694 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
695
696 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
697
698 2018-02-20 Maciej W. Rozycki <macro@mips.com>
699
700 * opcode/mips.h: Remove `M' operand code.
701
702 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
703
704 * coff/msdos.h: New header.
705 * coff/pe.h: Move common defines to msdos.h.
706 * coff/powerpc.h: Likewise.
707
708 2018-01-13 Nick Clifton <nickc@redhat.com>
709
710 2.30 branch created.
711
712 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
713
714 PR ld/22393
715 * bfdlink.h (bfd_link_info): Add separate_code.
716
717 2018-01-04 Jim Wilson <jimw@sifive.com>
718
719 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
720 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
721 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
722 Add alias to map mbadaddr to CSR_MTVAL.
723
724 2018-01-03 Alan Modra <amodra@gmail.com>
725
726 Update year range in copyright notice of all files.
727
728 For older changes see ChangeLog-2017
729 \f
730 Copyright (C) 2018 Free Software Foundation, Inc.
731
732 Copying and distribution of this file, with or without modification,
733 are permitted in any medium without royalty provided the copyright
734 notice and this notice are preserved.
735
736 Local Variables:
737 mode: change-log
738 left-margin: 8
739 fill-column: 74
740 version-control: never
741 End: