include/ChangeLog

   1 2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
   2
   3         * elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
   4         typedef as `elf_internal_abiflags_v0'.
   5
   6 2016-12-13 Renlin Li <renlin.li@arm.com>
   7
   8         * opcode/aarch64.h (aarch64_operand_class): Remove
   9         AARCH64_OPND_CLASS_CP_REG.
  10         (enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn,
  11         AARCH64_OPND_Cm to AARCH64_OPND_CRm.
  12         (aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier.
  13
  14 2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
  15
  16         * opcode/mips.h: Remove references to `>' operand code.
  17
  18 2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
  19
  20         * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
  21
  22 2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
  23
  24         * opcode/mips.h (ASE_DSPR3): Add a comment.
  25
  26 2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  27
  28         * opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
  29         (ARM_ARCH_V8_3A): New.
  30
  31 2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
  32
  33         * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
  34         instruction classes.
  35
  36 2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
  37
  38         * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
  39         hwcaps2.
  40
  41 2016-11-22  Alan Modra  <amodra@gmail.com>
  42
  43         PR 20744
  44         * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
  45
  46 2016-11-03  David Tolnay <dtolnay@gmail.com>
  47             Mark Wielaard  <mark@klomp.org>
  48
  49         * demangle.h (DMGL_RUST): New macro.
  50         (DMGL_STYLE_MASK): Add DMGL_RUST.
  51         (demangling_styles): Add dlang_rust.
  52         (RUST_DEMANGLING_STYLE_STRING): New macro.
  53         (RUST_DEMANGLING): New macro.
  54         (rust_demangle): New prototype.
  55         (rust_is_mangled): Likewise.
  56         (rust_demangle_sym): Likewise.
  57
  58 2016-11-07  Jason Merrill  <jason@redhat.com>
  59
  60         * demangle.h (enum demangle_component_type): Add
  61         DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
  62
  63 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  64
  65         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
  66         AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
  67         (enum aarch64_op): Add OP_FCMLA_ELEM.
  68
  69 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  70
  71         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
  72         (enum aarch64_insn_class): Add ldst_imm10.
  73
  74 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  75
  76         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
  77
  78 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  79
  80         * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
  81         (AARCH64_ARCH_V8_3): Define.
  82         (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
  83
  84 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  85
  86         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
  87         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
  88         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
  89
  90 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  91
  92         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
  93
  94 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  95
  96         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
  97         fields.
  98         (struct arc_long_opcode): Delete.
  99         (struct arc_operand): Change types for insert and extract
 100         handlers.
 101
 102 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
 103
 104         * opcode/arc.h: Make macros 64-bit safe.
 105
 106 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
 107
 108         * opcode/arc.h (arc_opcode_len): Declare.
 109         (ARC_SHORT): Delete.
 110
 111 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
 112             Andrew Waterman <andrew@sifive.com>
 113
 114         Add support for RISC-V architecture.
 115         * dis-asm.h: Add prototypes for print_insn_riscv and
 116         print_riscv_disassembler_options.
 117         * elf/riscv.h: New file.
 118         * opcode/riscv-opc.h: New file.
 119         * opcode/riscv.h: New file.
 120
 121 2016-10-17  Nick Clifton  <nickc@redhat.com>
 122
 123         * elf/common.h (DT_SYMTAB_SHNDX): Define.
 124         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
 125         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
 126         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
 127         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
 128         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
 129         (ELFOSABI_OPENVOS): Define.
 130         (GRP_MASKOS, GRP_MASKPROC): Define.
 131
 132 2016-10-14  Pedro Alves  <palves@redhat.com>
 133
 134         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
 135         OVERRIDE): Define as empty.
 136         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
 137         __final.
 138         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
 139         empty.
 140
 141 2016-10-14  Pedro Alves  <palves@redhat.com>
 142
 143         * ansidecl.h (GCC_FINAL): Delete.
 144         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
 145
 146 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
 147
 148         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
 149
 150 2016-09-29  Alan Modra  <amodra@gmail.com>
 151
 152         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
 153
 154 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
 155
 156         * opcode/arc.h (insn_class_t): Add two new classes.
 157
 158 2016-09-26  Alan Modra  <amodra@gmail.com>
 159
 160         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
 161
 162 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 163
 164         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
 165
 166 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 167
 168         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
 169         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
 170         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
 171         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
 172
 173 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 174
 175         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
 176         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
 177         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
 178         aarch64_insn_classes.
 179
 180 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 181
 182         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 183         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 184         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 185
 186 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 187
 188         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 189         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 190         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 191
 192 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 193
 194         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 195         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 196         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 197         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 198         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 199         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 200         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 201         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 202         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 203         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 204         (aarch64_sve_dupm_mov_immediate_p): Declare.
 205
 206 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 207
 208         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 209         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 210         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 211         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 212         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 213
 214 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 215
 216         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 217         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 218         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 219         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 220         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 221         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 222         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 223         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 224         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 225         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 226         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 227         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 228         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 229         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 230         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 231         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 232         Likewise.
 233
 234 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 235
 236         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 237         aarch64_opnd.
 238         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 239         (aarch64_opnd_info): Make shifter.amount an int64_t and
 240         rearrange the fields.
 241
 242 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 243
 244         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 245         (AARCH64_OPND_SVE_PRFOP): Likewise.
 246         (aarch64_sve_pattern_array): Declare.
 247         (aarch64_sve_prfop_array): Likewise.
 248
 249 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 250
 251         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 252         (AARCH64_OPND_QLF_P_M): Likewise.
 253
 254 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 255
 256         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 257         aarch64_operand_class.
 258         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 259         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 260         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 261         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 262         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 263         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 264         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 265         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 266
 267 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 268
 269         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 270         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 271
 272 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 273
 274         * opcode/aarch64.h (F_STRICT): New flag.
 275
 276 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 277
 278         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 279
 280 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 281         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 282         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 283         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 284         relocation.
 285
 286 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 287
 288         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 289         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 290
 291 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 292
 293         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 294
 295 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 296
 297         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 298
 299 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 300
 301         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 302         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 303         ARC_NUM_ADDRTYPES.
 304         * opcode/arc.h: Add BMU to insn_class_t enum.
 305         * opcode/arc.h: Add PMU to insn_class_t enum.
 306
 307 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 308
 309         * dis-asm.h: Declare print_arc_disassembler_options.
 310
 311 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 312
 313         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 314         out_implib_bfd fields.
 315
 316 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 317
 318         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 319
 320 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 321
 322         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 323         (SHF_ARM_PURECODE): ... this.
 324
 325 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 326
 327         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 328         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 329         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 330         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 331
 332 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 333
 334         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 335         of enabled FPU features.
 336
 337 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 338
 339         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 340         SPARC_OPCODE_ARCH_MAX into the enum.
 341
 342 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 343
 344         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 345
 346 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 347
 348         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 349
 350 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 351
 352         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 353
 354 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 355
 356         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 357         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 358         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 359         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 360
 361 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 362
 363         * opcode/arc.h: Make insn_class_t alphabetical again.
 364
 365 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 366
 367         * elf/dlx.h: Wrap in extern C.
 368         * elf/xtensa.h: Likewise.
 369         * opcode/arc.h: Likewise.
 370
 371 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 372
 373         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 374         tilegx_pipeline.
 375
 376 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 377
 378         * opcode/arc.h: Add nps400 extension and instruction
 379         subclass.
 380         Remove ARC_OPCODE_NPS400
 381         * elf/arc.h: Remove E_ARC_MACH_NPS400
 382
 383 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 384
 385         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 386         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 387         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 388         SPARC_OPCODE_ARCH_V9M.
 389
 390 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 391
 392         * opcode/msp430-decode.h (MSP430_Size): Remove.
 393         (Msp430_Opcode_Decoded): Change type of size to int.
 394
 395 2016-06-11  Alan Modra  <amodra@gmail.com>
 396
 397         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 398
 399 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 400
 401         * opcode/sparc.h: Add missing documentation for hyperprivileged
 402         registers in rd (%) and rs1 ($).
 403
 404 2016-06-07  Alan Modra  <amodra@gmail.com>
 405
 406         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 407         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 408         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 409         PPC_APUINFO_VLE: Define.
 410
 411 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 412
 413         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 414         entries.
 415         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 416
 417 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 418
 419         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 420         (struct arc_long_opcode): New structure.
 421         (arc_long_opcodes): Declare.
 422         (arc_num_long_opcodes): Declare.
 423
 424 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 425
 426         * elf/mips.h: Add extern "C".
 427         * elf/sh.h: Likewise.
 428         * opcode/d10v.h: Likewise.
 429         * opcode/d30v.h: Likewise.
 430         * opcode/ia64.h: Likewise.
 431         * opcode/mips.h: Likewise.
 432         * opcode/ppc.h: Likewise.
 433         * opcode/sparc.h: Likewise.
 434         * opcode/tic6x.h: Likewise.
 435         * opcode/v850.h: Likewise.
 436
 437 2016-05-28  Alan Modra  <amodra@gmail.com>
 438
 439         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 440         Return void from multiple_definition, multiple_common,
 441         add_to_set, constructor, warning, undefined_symbol,
 442         reloc_overflow, reloc_dangerous and unattached_reloc.
 443
 444 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 445
 446         * opcode/metag.h: wrap declarations in extern "C".
 447
 448 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 449
 450         * opcode/arc.h (insn_subclass_t): Add COND.
 451         (flag_class_t): Add F_CLASS_EXTEND.
 452
 453 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 454
 455         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 456         insn_class.
 457         (struct arc_flag_class): Renamed attribute class to flag_class.
 458
 459 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 460
 461         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 462         plain symbol.
 463
 464 2016-04-29  Tom Tromey  <tom@tromey.com>
 465
 466         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 467         DW_LANG_Rust_old>: New constants.
 468
 469 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 470
 471         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 472         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 473         * opcode/mips.h (ASE_DSPR3): New macro.
 474
 475 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 476             Nick Clifton  <nickc@redhat.com>
 477
 478         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 479         enumerator.
 480         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 481         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 482         (ARM_SYM_BRANCH_TYPE): Replace by ...
 483         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 484         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 485         BFD_ASSERT is defined or not.
 486
 487 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 488
 489         * elf/arm.h (Tag_DSP_extension): Define.
 490
 491 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 492
 493         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 494
 495 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 496
 497         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 498         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 499         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 500         for the high core bits.
 501
 502 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 503
 504         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 505         (ARC_SYNTAX_NOP): Likewsie.
 506         (ARC_OP1_MUST_BE_IMM): Update defined value.
 507         (ARC_OP1_IMM_IMPLIED): Likewise.
 508         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 509
 510 2016-04-28  Nick Clifton  <nickc@redhat.com>
 511
 512         PR target/19722
 513         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 514
 515 2016-04-27  Alan Modra  <amodra@gmail.com>
 516
 517         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 518         undef.  Formatting.
 519
 520 2016-04-21  Nick Clifton  <nickc@redhat.com>
 521
 522         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 523
 524 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 525
 526         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 527
 528 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 529
 530         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 531
 532 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 533
 534         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 535
 536 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 537
 538         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 539
 540 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 541
 542         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 543         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 544
 545 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 546
 547         * opcode/arc.h (flag_class_t): Update.
 548         (ARC_OPCODE_NONE): Define.
 549         (ARC_OPCODE_ARCALL): Likewise.
 550         (ARC_OPCODE_ARCFPX): Likewise.
 551         (ARC_REGISTER_READONLY): Likewise.
 552         (ARC_REGISTER_WRITEONLY): Likewise.
 553         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 554         (arc_aux_reg): Add cpu.
 555
 556 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 557
 558         * opcode/arc.h (arc_num_opcodes): Remove.
 559         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 560         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 561         (ARC_SUFFIX_FLAG): Define.
 562         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 563         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 564         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 565         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 566         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 567         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 568         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 569         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 570         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 571         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 572
 573 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 574
 575         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 576         (ARC_FPUDA): Define.
 577         (arc_aux_reg): Add new field.
 578
 579 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 580
 581         * opcode/arc-func.h (replace_bits24): Changed.
 582         (replace_bits24_be): Created.
 583
 584 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 585
 586         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 587         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 588         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 589         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 590         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 591         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 592         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 593         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 594         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 595         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 596         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 597         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 598         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 599         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 600
 601 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 602
 603         * opcode/i960.h: Add const qualifiers.
 604         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 605
 606 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 607
 608         * opcodes/arc.h (insn_class_t): Add BITOP type.
 609
 610 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 611
 612         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 613         new classes instead.
 614
 615 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 616
 617         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 618         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 619
 620 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 621
 622         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 623
 624 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 625
 626         * elf/arc.h (EF_ARC_MACH): Delete.
 627         (EF_ARC_MACH_MSK): Remove out of date comment.
 628
 629 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 630
 631         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 632
 633 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 634
 635         PR ld/19807
 636         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 637
 638 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 639             Andrew Burgess  <andrew.burgess@embecosm.com>
 640
 641         * elf/arc-reloc.def: Add a call to ME within the formula for each
 642         relocation that requires middle-endian correction.
 643
 644 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 645
 646         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 647         * opcode/h8300.h (struct h8_opcode): Likewise.
 648         * opcode/hppa.h (struct pa_opcode): Likewise.
 649         * opcode/msp430.h: Likewise.
 650         * opcode/spu.h (struct spu_opcode): Likewise.
 651         * opcode/tic30.h (struct _register): Likewise.
 652         * opcode/tic4x.h (struct tic4x_register): Likewise.
 653         (struct tic4x_cond): Likewise.
 654         (struct tic4x_indirect): Likewise.
 655         (struct tic4x_inst): Likewise.
 656         * opcode/visium.h (struct reg_entry): Likewise.
 657
 658 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 659
 660         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 661         (ARM_CPU_HAS_FEATURE): Add comment.
 662
 663 2016-03-03  Than McIntosh <thanm@google.com>
 664
 665         * plugin-api.h: Add new hooks to the plugin transfer vector to
 666         to support querying section alignment and section size.
 667         (ld_plugin_get_input_section_alignment): New hook.
 668         (ld_plugin_get_input_section_size): New hook.
 669         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 670         and LDPT_GET_INPUT_SECTION_SIZE.
 671         (ld_plugin_tv): Add tv_get_input_section_alignment and
 672         tv_get_input_section_size.
 673
 674 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 675
 676         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 677
 678 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 679
 680         PR ld/19645
 681         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 682         (bfd_link_info): Add elf_stt_common.
 683
 684 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 685
 686         PR ld/19636
 687         PR ld/19704
 688         PR ld/19719
 689         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 690
 691 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 692             Jiong Wang  <jiong.wang@arm.com>
 693
 694         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 695
 696 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 697             Janek van Oirschot  <jvanoirs@synopsys.com>
 698
 699         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 700         (arc_num_relax_opcodes): Declare.
 701
 702 2016-02-09  Nick Clifton  <nickc@redhat.com>
 703
 704         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 705         * opcode/nds32.h (nds32_r45map): Likewise.
 706         (nds32_r54map): Likewise.
 707         * opcode/visium.h (gen_reg_table): Likewise.
 708         (fp_reg_table, cc_table, opcode_table): Likewise.
 709
 710 2016-02-09  Alan Modra  <amodra@gmail.com>
 711
 712         PR 16583
 713         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 714
 715 2016-02-04  Nick Clifton  <nickc@redhat.com>
 716
 717         PR target/19561
 718         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 719         (RRUX): Synthesise using case 2 rather than 7.
 720
 721 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 722
 723         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 724         (NT_FREEBSD_PROCSTAT_PROC): Define.
 725         (NT_FREEBSD_PROCSTAT_FILES): Define.
 726         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 727         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 728         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 729         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 730         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 731         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 732         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 733
 734 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 735             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 736
 737         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 738         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 739         (ARC_TLS_LE_32): Fixed formula.
 740         (ARC_TLS_GD_LD): Use new special function.
 741         * opcode/arc-func.h: Changed all the replacement
 742         functions to clear the patching bits before doing an or it with the value
 743         argument.
 744
 745 2016-01-18  Nick Clifton  <nickc@redhat.com>
 746
 747         PR ld/19440
 748         * coff/internal.h (internal_syment): Use int to hold section
 749         number.
 750         (N_UNDEF): Cast to int not short.
 751         (N_ABS): Likewise.
 752         (N_DEBUG): Likewise.
 753         (N_TV): Likewise.
 754         (P_TV): Likewise.
 755
 756 2016-01-11  Nick Clifton  <nickc@redhat.com>
 757
 758         Import this change from GCC mainline:
 759
 760         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 761
 762         * longlong.h: Change !__SHMEDIA__ to
 763         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 764         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 765
 766 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 767
 768         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 769
 770 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 771
 772         * libiberty.h (dupargv): Change arg to char * const *.
 773         (writeargv, countargv): Likewise.
 774
 775 2016-01-01  Alan Modra  <amodra@gmail.com>
 776
 777         Update year range in copyright notice of all files.
 778
 779 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 780 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 781 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 782 som/ChangeLog-1015, and vms/ChangeLog-1015
 783 \f
 784 Copyright (C) 2016 Free Software Foundation, Inc.
 785
 786 Copying and distribution of this file, with or without modification,
 787 are permitted in any medium without royalty provided the copyright
 788 notice and this notice are preserved.
 789
 790 Local Variables:
 791 mode: change-log
 792 left-margin: 8
 793 fill-column: 74
 794 version-control: never
 795 End: