MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support
[binutils-gdb.git] / include / ChangeLog
1 2017-06-28 Maciej W. Rozycki <macro@imgtec.com>
2 Matthew Fortune <matthew.fortune@imgtec.com>
3
4 * elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
5 (AFL_EXT_INTERAPTIV_MR2): Likewise.
6 * opcode/mips.h: Document new operand codes defined.
7 (INSN_INTERAPTIV_MR2): New macro.
8 (INSN_CHIP_MASK): Adjust accordingly.
9 (CPU_INTERAPTIV_MR2): New macro.
10 (cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
11 (MIPS16_ALL_ARGS): Rename to...
12 (MIPS_SVRS_ALL_ARGS): ... this.
13 (MIPS16_ALL_STATICS): Rename to...
14 (MIPS_SVRS_ALL_STATICS): ... this.
15
16 2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
17
18 * elf/riscv.h (R_RISCV_32_PCREL): New.
19
20 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
21
22 * elf/arm.h (TAG_CPU_ARCH_V8R): New macro.
23 * opcode/arm.h (ARM_EXT2_V8A): New macro.
24 (ARM_AEXT2_V8A): Rename into ...
25 (ARM_AEXT2_V8AR): This.
26 (ARM_AEXT2_V8A): New macro.
27 (ARM_AEXT_V8R): New macro.
28 (ARM_AEXT2_V8R): New macro.
29 (ARM_ARCH_V8R): New macro.
30
31 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
32
33 * opcode/arm.h (ARM_AEXT_V4TxM): Add ARM_EXT_OS bit to the set.
34 (ARM_AEXT_V4T): Likewise.
35 (ARM_AEXT_V5TxM): Likewise.
36 (ARM_AEXT_V5T): Likewise.
37 (ARM_AEXT_V6M): Mask off ARM_EXT_OS bit.
38
39 2017-06-22 H.J. Lu <hongjiu.lu@intel.com>
40
41 * bfdlink.h (bfd_link_info): Add shstk.
42 * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_SHSTK): New.
43
44 2017-06-22 H.J. Lu <hongjiu.lu@intel.com>
45
46 * bfdlink.h (bfd_link_info): Add ibtplt and ibt.
47 * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_AND): New.
48 (GNU_PROPERTY_X86_FEATURE_1_IBT): Likewise.
49
50 2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
51
52 * opcode/arm.h (FPU_ANY): New macro.
53
54 2017-06-20 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
55
56 * elf/s390.h (PT_S390_PGSTE): Define macro.
57
58 2017-06-16 Alan Modra <amodra@gmail.com>
59
60 PR ld/20022
61 PR ld/21557
62 PR ld/21562
63 PR ld/21571
64 * bfdlink.h (struct bfd_link_hash_entry): Delete undef.section.
65
66 2017-06-14 Yao Qi <yao.qi@linaro.org>
67
68 * dis-asm.h (print_insn_aarch64): Move it to opcodes/disassemble.h.
69 (print_insn_big_arm, print_insn_big_mips): Likewise.
70 (print_insn_i386, print_insn_ia64): Likewise.
71 (print_insn_little_arm, print_insn_little_mips): Likewise.
72 (print_insn_spu): Likewise.
73
74 2017-06-06 Andrew Burgess <andrew.burgess@embecosm.com>
75
76 * bfdlink.h (struct bfd_link_info): Add new resolve_section_groups
77 flag.
78
79 2017-06-01 Alan Modra <amodra@gmail.com>
80
81 * elf/ppc64.h (PPC64_OPT_LOCALENTRY): Define.
82
83 2017-05-31 Eli Zaretskii <eliz@gnu.org>
84
85 * environ.h: Add #ifndef guard.
86
87 2017-05-30 Anton Kolesov <anton.kolesov@synopsys.com>
88
89 * elf/arc-cpu.def: New file.
90
91 2017-05-24 Yao Qi <yao.qi@linaro.org>
92
93 * dis-asm.h: Move some function declarations to
94 opcodes/disassemble.h.
95
96 2017-05-24 Yao Qi <yao.qi@linaro.org>
97
98 * dis-asm.h (disassembler): Update declaration.
99
100 2017-05-23 Claudiu Zissulescu <claziss@synopsys.com>
101
102 * opcode/arc.h (MAX_INSN_FLGS): Update to 4.
103
104 2017-05-22 H.J. Lu <hongjiu.lu@intel.com>
105
106 * include/opcode/i386.h (NOTRACK_PREFIX_OPCODE): New.
107
108 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
109
110 * elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define.
111 (ELF_SPARC_HWCAP2_ONADDSUB): Likewise.
112 (ELF_SPARC_HWCAP2_ONMUL): Likewise.
113 (ELF_SPARC_HWCAP2_ONDIV): Likewise.
114 (ELF_SPARC_HWCAP2_DICTUNP): Likewise.
115 (ELF_SPARC_HWCAP2_FPCMPSHL): Likewise.
116 (ELF_SPARC_HWCAP2_RLE): Likewise.
117 (ELF_SPARC_HWCAP2_SHA3): Likewise.
118 * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8
119 and adjust SPARC_OPCODE_ARCH_MAX.
120 (HWCAP2_SPARC6): Define.
121 (HWCAP2_ONADDSUB): Likewise.
122 (HWCAP2_ONMUL): Likewise.
123 (HWCAP2_ONDIV): Likewise.
124 (HWCAP2_DICTUNP): Likewise.
125 (HWCAP2_FPCMPSHL): Likewise.
126 (HWCAP2_RLE): Likewise.
127 (HWCAP2_SHA3): Likewise.
128 (OPM): Likewise.
129 (OPMI): Likewise.
130 (ONFCN): Likewise.
131 (REVFCN): Likewise.
132 (SIMM10): Likewise.
133
134 2017-05-16 Alan Modra <amodra@gmail.com>
135
136 * bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to
137 non_ir_ref_regular.
138
139 2017-05-16 Alan Modra <amodra@gmail.com>
140
141 * bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref
142 comment. Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic.
143
144 2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
145 Matthew Fortune <matthew.fortune@imgtec.com>
146
147 * elf/mips.h (AFL_ASE_MIPS16E2): New macro.
148 (AFL_ASE_MASK): Adjust accordingly.
149 * opcode/mips.h: Document new operand codes defined.
150 (mips_operand_type): Add OP_REG28 enum value.
151 (INSN2_SHORT_ONLY): Update description.
152 (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros.
153
154 2017-05-14 John David Anglin <danglin@gcc.gnu.org>
155
156 * opcode/hppa.h: Fix match and mask for 64-bit bb opcode.
157
158 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
159
160 * elf/arc.h (SHT_ARC_ATTRIBUTES): Define.
161 (Tag_ARC_*): Define.
162 (E_ARC_OSABI_V4): Define.
163 (E_ARC_OSABI_CURRENT): Reassign it.
164 (TAG_CPU_*): Define.
165 * opcode/arc-attrs.h: New file.
166 * opcode/arc.h (insn_subclass_t): Assign enum values.
167 (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64.
168 (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT)
169 (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP)
170 (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW)
171 (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC)
172 (ARC_CRC): Delete.
173
174 2017-04-20 H.J. Lu <hongjiu.lu@intel.com>
175
176 PR ld/21382
177 * bfdlink.h (bfd_link_hash_entry): Add dynamic_ref_after_ir_def.
178
179 2017-04-19 Alan Modra <amodra@gmail.com>
180
181 * bfdlink.h (struct bfd_link_info <dynamic_undefined_weak>):
182 Revise comment.
183
184 2017-04-11 Alan Modra <amodra@gmail.com>
185
186 * opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
187 (PPC_OPCODE_VSX3): Delete.
188 (PPC_OPCODE_HTM): Delete.
189 (PPC_OPCODE_*): Renumber and order chronologically.
190 (PPC_OPCODE_SPE): Comment on this and other bits used for APUinfo.
191
192 2017-04-06 Pip Cet <pipcet@gmail.com>
193
194 * dis-asm.h: Add prototypes for wasm32 disassembler.
195
196 2017-04-05 Pedro Alves <palves@redhat.com>
197
198 * dis-asm.h (disassemble_info) <disassembler_options>: Now a
199 "const char *".
200 (next_disassembler_option): Constify.
201
202 2017-04-04 H.J. Lu <hongjiu.lu@intel.com>
203
204 * elf/common.h (PT_GNU_MBIND_NUM): New.
205 (PT_GNU_MBIND_LO): Likewise.
206 (PT_GNU_MBIND_HI): Likewise.
207 (SHF_GNU_MBIND): Likewise.
208
209 2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
210
211 * elf/riscv.h (RISCV_GP_SYMBOL): New define.
212
213 2017-03-27 Andrew Waterman <andrew@sifive.com>
214
215 * opcode/riscv-opc.h (CSR_PMPCFG0): New define.
216 (CSR_PMPCFG1): Likewise.
217 (CSR_PMPCFG2): Likewise.
218 (CSR_PMPCFG3): Likewise.
219 (CSR_PMPADDR0): Likewise.
220 (CSR_PMPADDR1): Likewise.
221 (CSR_PMPADDR2): Likewise.
222 (CSR_PMPADDR3): Likewise.
223 (CSR_PMPADDR4): Likewise.
224 (CSR_PMPADDR5): Likewise.
225 (CSR_PMPADDR6): Likewise.
226 (CSR_PMPADDR7): Likewise.
227 (CSR_PMPADDR8): Likewise.
228 (CSR_PMPADDR9): Likewise.
229 (CSR_PMPADDR10): Likewise.
230 (CSR_PMPADDR11): Likewise.
231 (CSR_PMPADDR12): Likewise.
232 (CSR_PMPADDR13): Likewise.
233 (CSR_PMPADDR14): Likewise.
234 (CSR_PMPADDR15): Likewise.
235 (pmpcfg0): Declare register.
236 (pmpcfg1): Likewise.
237 (pmpcfg2): Likewise.
238 (pmpcfg3): Likewise.
239 (pmpaddr0): Likewise.
240 (pmpaddr1): Likewise.
241 (pmpaddr2): Likewise.
242 (pmpaddr3): Likewise.
243 (pmpaddr4): Likewise.
244 (pmpaddr5): Likewise.
245 (pmpaddr6): Likewise.
246 (pmpaddr7): Likewise.
247 (pmpaddr8): Likewise.
248 (pmpaddr9): Likewise.
249 (pmpaddr10): Likewise.
250 (pmpaddr11): Likewise.
251 (pmpaddr12): Likewise.
252 (pmpaddr13): Likewise.
253 (pmpaddr14): Likewise.
254 (pmpaddr15): Likewise.
255
256 2017-03-30 Pip Cet <pipcet@gmail.com>
257
258 * opcode/wasm.h: New file to support wasm32 architecture.
259 * elf/wasm32.h: Add R_WASM32_32 relocation.
260
261 2017-03-29 Alan Modra <amodra@gmail.com>
262
263 * opcode/ppc.h (PPC_OPCODE_RAW): Define.
264 (PPC_OPCODE_*): Make them all unsigned long long constants.
265
266 2017-03-27 Pip Cet <pipcet@gmail.com>
267
268 * elf/wasm32.h: New file to support wasm32 architecture.
269
270 2017-03-27 Rinat Zelig <rinat@mellanox.com>
271
272 * opcode/arc.h (insn_class_t): Add ULTRAIP and MISC class.
273
274 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
275
276 * opcode/s390.h (S390_INSTR_FLAG_VX2): Remove.
277 (S390_INSTR_FLAG_FACILITY_MASK): Adjust value.
278
279 2017-03-21 Rinat Zelig <rinat@mellanox.com>
280
281 * opcode/arc.h (insn_class_t): Add DMA class.
282
283 2017-03-16 Nick Clifton <nickc@redhat.com>
284
285 * elf/common.h (GNU_BUILD_ATTRIBUTE_SHORT_ENUM): New GNU BUILD
286 note type.
287
288 2017-03-14 Jakub Jelinek <jakub@redhat.com>
289
290 PR debug/77589
291 * dwarf2.def (DW_OP_GNU_variable_value): New opcode.
292
293 2017-03-13 Markus Trippelsdorf <markus@trippelsdorf.de>
294
295 PR demangler/70909
296 PR demangler/67264
297 * demangle.h (struct demangle_component): Add d_printing field.
298 (cplus_demangle_print): Remove const qualifier from tree
299 parameter.
300 (cplus_demangle_print_callback): Likewise.
301
302 2017-03-13 Nick Clifton <nickc@redhat.com>
303
304 PR binutils/21202
305 * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to
306 R_AARCH64_TLSDESC_LD64_LO12.
307 (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to
308 R_AARCH64_TLSDESC_ADD_LO12_NC.
309
310 2017-03-10 Nick Clifton <nickc@redhat.com>
311
312 * elf/common.h (EM_LANAI): New machine number.
313 (EM_BPF): Likewise.
314 (EM_WEBASSEMBLY): Likewise.
315 Move low value, deprecated, numbers to their numerical
316 equivalents.
317
318 2017-03-08 H.J. Lu <hongjiu.lu@intel.com>
319
320 PR binutils/21231
321 * elf/common.h (GNU_PROPERTY_LOPROC): New.
322 (GNU_PROPERTY_HIPROC): Likewise.
323 (GNU_PROPERTY_LOUSER): Likewise.
324 (GNU_PROPERTY_HIUSER): Likewise.
325
326 2017-03-01 Nick Clifton <nickc@redhat.com>
327
328 * elf/common.h (SHF_GNU_BUILD_NOTE): Define.
329 (NT_GNU_PROPERTY_TYPE_0): Define.
330 (NT_GNU_BUILD_ATTRIBUTE_OPEN): Define.
331 (NT_GNU_BUILD_ATTRIBUTE_FUN): Define.
332 (GNU_BUILD_ATTRIBUTE_TYPE_NUMERIC): Define.
333 (GNU_BUILD_ATTRIBUTE_TYPE_STRING): Define.
334 (GNU_BUILD_ATTRIBUTE_TYPE_BOOL_TRUE): Define.
335 (GNU_BUILD_ATTRIBUTE_TYPE_BOOL_FALSE): Define.
336 (GNU_BUILD_ATTRIBUTE_VERSION): Define.
337 (GNU_BUILD_ATTRIBUTE_STACK_PROT): Define.
338 (GNU_BUILD_ATTRIBUTE_RELRO): Define.
339 (GNU_BUILD_ATTRIBUTE_STACK_SIZE): Define.
340 (GNU_BUILD_ATTRIBUTE_TOOL): Define.
341 (GNU_BUILD_ATTRIBUTE_ABI): Define.
342 (GNU_BUILD_ATTRIBUTE_PIC): Define.
343 (NOTE_GNU_PROPERTY_SECTION_NAME): Define.
344 (GNU_BUILD_ATTRS_SECTION_NAME): Define.
345 (GNU_PROPERTY_STACK_SIZE): Define.
346 (GNU_PROPERTY_NO_COPY_ON_PROTECTED): Define.
347 (GNU_PROPERTY_X86_ISA_1_USED): Define.
348 (GNU_PROPERTY_X86_ISA_1_NEEDED): Define.
349 (GNU_PROPERTY_X86_ISA_1_486): Define.
350 (GNU_PROPERTY_X86_ISA_1_586): Define.
351 (GNU_PROPERTY_X86_ISA_1_686): Define.
352 (GNU_PROPERTY_X86_ISA_1_SSE): Define.
353 (GNU_PROPERTY_X86_ISA_1_SSE2): Define.
354 (GNU_PROPERTY_X86_ISA_1_SSE3): Define.
355 (GNU_PROPERTY_X86_ISA_1_SSSE3): Define.
356 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Define.
357 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Define.
358 (GNU_PROPERTY_X86_ISA_1_AVX): Define.
359 (GNU_PROPERTY_X86_ISA_1_AVX2): Define.
360 (GNU_PROPERTY_X86_ISA_1_AVX512F): Define.
361 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Define.
362 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Define.
363 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Define.
364 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Define.
365 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Define.
366 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Define.
367
368 2017-02-28 Peter Bergner <bergner@vnet.ibm.com>
369
370 * dis-asm.h (disasm_options_t): New typedef.
371 (parse_arm_disassembler_option): Remove prototype.
372 (set_arm_regname_option): Likewise.
373 (get_arm_regnames): Likewise.
374 (get_arm_regname_num_options): Likewise.
375 (disassemble_init_s390): New prototype.
376 (disassembler_options_powerpc): Likewise.
377 (disassembler_options_arm): Likewise.
378 (disassembler_options_s390): Likewise.
379 (remove_whitespace_and_extra_commas): Likewise.
380 (disassembler_options_cmp): Likewise.
381 (next_disassembler_option): New inline function.
382 (FOR_EACH_DISASSEMBLER_OPTION): New macro.
383
384 2017-02-28 Alan Modra <amodra@gmail.com>
385
386 * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment.
387 * elf/ppc.h (R_PPC_16DX_HA): Likewise.
388
389 2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
390
391 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16)
392 (AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2)
393 (AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX)
394 (AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds.
395
396 2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
397
398 * opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro.
399 (AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM.
400
401 2017-02-22 Andrew Waterman <andrew@sifive.com>
402
403 * opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
404 (CSR_MCOUNTEREN): Likewise.
405 (scounteren): Declare register.
406 (mcounteren): Likewise.
407
408 2017-02-14 Andrew Waterman <andrew@sifive.com>
409
410 * opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.
411 (MASK_SFENCE_VMA): Likewise.
412 (sfence_vma): Declare instruction.
413
414 2017-02-14 Alan Modra <amodra@gmail.com>
415
416 PR 21118
417 * opcode/ppc.h (PPC_OPERAND_*): Reassign values, regs first.
418 (PPC_OPERAND_SPR, PPC_OPERAND_GQR): Define.
419
420 2017-01-24 Dimitar Dimitrov <dimitar@dinux.eu>
421
422 * opcode/hppa.h: Clarify that file is part of GNU opcodes.
423 * opcode/i860.h: Ditto.
424 * opcode/nios2.h: Ditto.
425 * opcode/nios2r1.h: Ditto.
426 * opcode/nios2r2.h: Ditto.
427 * opcode/pru.h: Ditto.
428
429 2017-01-24 Alan Hayward <alan.hayward@arm.com>
430
431 * elf/common.h (NT_ARM_SVE): Define.
432
433 2017-01-04 Jiong Wang <jiong.wang@arm.com>
434
435 * dwarf2.def: Sync with mainline gcc sources.
436
437 2017-01-04 Richard Earnshaw <rearnsha@arm.com>
438 Jiong Wang <jiong.wang@arm.com>
439
440 * dwarf2.def (DW_OP_AARCH64_operation): Reserve the number 0xea.
441 (DW_CFA_GNU_window_save): Comments the multiplexing on AArch64.
442
443 2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
444
445 * opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
446 (AARCH64_ARCH_V8_3): Update.
447
448 2017-01-03 Kito Cheng <kito.cheng@gmail.com>
449
450 * opcode/riscv-opc.h: Add support for the "q" ISA extension.
451
452 2017-01-03 Nick Clifton <nickc@redhat.com>
453
454 * dwarf2.def: Sync with mainline gcc sources
455 * dwarf2.h: Likewise.
456
457 2016-12-21 Jakub Jelinek <jakub@redhat.com>
458
459 * dwarf2.def (DW_FORM_ref_sup): Renamed to ...
460 (DW_FORM_ref_sup4): ... this. New form.
461 (DW_FORM_ref_sup8): New form.
462
463 2016-10-17 Jakub Jelinek <jakub@redhat.com>
464
465 * dwarf2.h (enum dwarf_calling_convention): Add new DWARF5
466 calling convention codes.
467 (enum dwarf_line_number_content_type): New.
468 (enum dwarf_location_list_entry_type): Add DWARF5 DW_LLE_*
469 codes.
470 (enum dwarf_source_language): Add new DWARF5 DW_LANG_* codes.
471 (enum dwarf_macro_record_type): Add DWARF5 DW_MACRO_* codes.
472 (enum dwarf_name_index_attribute): New.
473 (enum dwarf_range_list_entry): New.
474 (enum dwarf_unit_type): New.
475 * dwarf2.def: Add new DWARF5 DW_TAG_*, DW_FORM_*, DW_AT_*,
476 DW_OP_* and DW_ATE_* entries.
477
478 2016-08-15 Jakub Jelinek <jakub@redhat.com>
479
480 * dwarf2.def (DW_AT_string_length_bit_size,
481 DW_AT_string_length_byte_size): New attributes.
482
483 2016-08-12 Alexandre Oliva <aoliva@redhat.com>
484
485 PR debug/63240
486 * dwarf2.def (DW_AT_deleted, DW_AT_defaulted): New.
487 * dwarf2.h (enum dwarf_defaulted_attribute): New.
488
489 2017-01-02 Alan Modra <amodra@gmail.com>
490
491 Update year range in copyright notice of all files.
492
493 For older changes see ChangeLog-2016
494 \f
495 Copyright (C) 2017 Free Software Foundation, Inc.
496
497 Copying and distribution of this file, with or without modification,
498 are permitted in any medium without royalty provided the copyright
499 notice and this notice are preserved.
500
501 Local Variables:
502 mode: change-log
503 left-margin: 8
504 fill-column: 74
505 version-control: never
506 End: