include/ChangeLog

   1 2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
   2
   3         * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
   4
   5 2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
   6
   7         * opcode/mips.h (ASE_DSPR3): Add a comment.
   8
   9 2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  10
  11         * opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
  12         (ARM_ARCH_V8_3A): New.
  13
  14 2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
  15
  16         * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
  17         instruction classes.
  18
  19 2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
  20
  21         * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
  22         hwcaps2.
  23
  24 2016-11-22  Alan Modra  <amodra@gmail.com>
  25
  26         PR 20744
  27         * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
  28
  29 2016-11-03  David Tolnay <dtolnay@gmail.com>
  30             Mark Wielaard  <mark@klomp.org>
  31
  32         * demangle.h (DMGL_RUST): New macro.
  33         (DMGL_STYLE_MASK): Add DMGL_RUST.
  34         (demangling_styles): Add dlang_rust.
  35         (RUST_DEMANGLING_STYLE_STRING): New macro.
  36         (RUST_DEMANGLING): New macro.
  37         (rust_demangle): New prototype.
  38         (rust_is_mangled): Likewise.
  39         (rust_demangle_sym): Likewise.
  40
  41 2016-11-07  Jason Merrill  <jason@redhat.com>
  42
  43         * demangle.h (enum demangle_component_type): Add
  44         DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
  45
  46 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  47
  48         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
  49         AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
  50         (enum aarch64_op): Add OP_FCMLA_ELEM.
  51
  52 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  53
  54         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
  55         (enum aarch64_insn_class): Add ldst_imm10.
  56
  57 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  58
  59         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
  60
  61 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  62
  63         * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
  64         (AARCH64_ARCH_V8_3): Define.
  65         (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
  66
  67 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  68
  69         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
  70         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
  71         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
  72
  73 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  74
  75         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
  76
  77 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  78
  79         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
  80         fields.
  81         (struct arc_long_opcode): Delete.
  82         (struct arc_operand): Change types for insert and extract
  83         handlers.
  84
  85 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  86
  87         * opcode/arc.h: Make macros 64-bit safe.
  88
  89 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  90
  91         * opcode/arc.h (arc_opcode_len): Declare.
  92         (ARC_SHORT): Delete.
  93
  94 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
  95             Andrew Waterman <andrew@sifive.com>
  96
  97         Add support for RISC-V architecture.
  98         * dis-asm.h: Add prototypes for print_insn_riscv and
  99         print_riscv_disassembler_options.
 100         * elf/riscv.h: New file.
 101         * opcode/riscv-opc.h: New file.
 102         * opcode/riscv.h: New file.
 103
 104 2016-10-17  Nick Clifton  <nickc@redhat.com>
 105
 106         * elf/common.h (DT_SYMTAB_SHNDX): Define.
 107         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
 108         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
 109         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
 110         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
 111         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
 112         (ELFOSABI_OPENVOS): Define.
 113         (GRP_MASKOS, GRP_MASKPROC): Define.
 114
 115 2016-10-14  Pedro Alves  <palves@redhat.com>
 116
 117         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
 118         OVERRIDE): Define as empty.
 119         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
 120         __final.
 121         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
 122         empty.
 123
 124 2016-10-14  Pedro Alves  <palves@redhat.com>
 125
 126         * ansidecl.h (GCC_FINAL): Delete.
 127         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
 128
 129 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
 130
 131         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
 132
 133 2016-09-29  Alan Modra  <amodra@gmail.com>
 134
 135         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
 136
 137 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
 138
 139         * opcode/arc.h (insn_class_t): Add two new classes.
 140
 141 2016-09-26  Alan Modra  <amodra@gmail.com>
 142
 143         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
 144
 145 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 146
 147         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
 148
 149 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 150
 151         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
 152         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
 153         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
 154         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
 155
 156 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 157
 158         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
 159         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
 160         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
 161         aarch64_insn_classes.
 162
 163 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 164
 165         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 166         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 167         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 168
 169 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 170
 171         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 172         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 173         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 174
 175 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 176
 177         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 178         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 179         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 180         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 181         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 182         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 183         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 184         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 185         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 186         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 187         (aarch64_sve_dupm_mov_immediate_p): Declare.
 188
 189 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 190
 191         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 192         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 193         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 194         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 195         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 196
 197 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 198
 199         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 200         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 201         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 202         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 203         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 204         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 205         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 206         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 207         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 208         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 209         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 210         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 211         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 212         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 213         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 214         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 215         Likewise.
 216
 217 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 218
 219         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 220         aarch64_opnd.
 221         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 222         (aarch64_opnd_info): Make shifter.amount an int64_t and
 223         rearrange the fields.
 224
 225 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 226
 227         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 228         (AARCH64_OPND_SVE_PRFOP): Likewise.
 229         (aarch64_sve_pattern_array): Declare.
 230         (aarch64_sve_prfop_array): Likewise.
 231
 232 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 233
 234         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 235         (AARCH64_OPND_QLF_P_M): Likewise.
 236
 237 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 238
 239         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 240         aarch64_operand_class.
 241         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 242         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 243         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 244         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 245         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 246         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 247         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 248         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 249
 250 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 251
 252         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 253         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 254
 255 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 256
 257         * opcode/aarch64.h (F_STRICT): New flag.
 258
 259 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 260
 261         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 262
 263 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 264         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 265         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 266         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 267         relocation.
 268
 269 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 270
 271         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 272         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 273
 274 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 275
 276         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 277
 278 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 279
 280         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 281
 282 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 283
 284         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 285         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 286         ARC_NUM_ADDRTYPES.
 287         * opcode/arc.h: Add BMU to insn_class_t enum.
 288         * opcode/arc.h: Add PMU to insn_class_t enum.
 289
 290 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 291
 292         * dis-asm.h: Declare print_arc_disassembler_options.
 293
 294 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 295
 296         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 297         out_implib_bfd fields.
 298
 299 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 300
 301         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 302
 303 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 304
 305         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 306         (SHF_ARM_PURECODE): ... this.
 307
 308 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 309
 310         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 311         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 312         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 313         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 314
 315 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 316
 317         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 318         of enabled FPU features.
 319
 320 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 321
 322         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 323         SPARC_OPCODE_ARCH_MAX into the enum.
 324
 325 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 326
 327         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 328
 329 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 330
 331         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 332
 333 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 334
 335         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 336
 337 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 338
 339         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 340         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 341         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 342         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 343
 344 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 345
 346         * opcode/arc.h: Make insn_class_t alphabetical again.
 347
 348 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 349
 350         * elf/dlx.h: Wrap in extern C.
 351         * elf/xtensa.h: Likewise.
 352         * opcode/arc.h: Likewise.
 353
 354 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 355
 356         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 357         tilegx_pipeline.
 358
 359 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 360
 361         * opcode/arc.h: Add nps400 extension and instruction
 362         subclass.
 363         Remove ARC_OPCODE_NPS400
 364         * elf/arc.h: Remove E_ARC_MACH_NPS400
 365
 366 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 367
 368         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 369         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 370         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 371         SPARC_OPCODE_ARCH_V9M.
 372
 373 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 374
 375         * opcode/msp430-decode.h (MSP430_Size): Remove.
 376         (Msp430_Opcode_Decoded): Change type of size to int.
 377
 378 2016-06-11  Alan Modra  <amodra@gmail.com>
 379
 380         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 381
 382 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 383
 384         * opcode/sparc.h: Add missing documentation for hyperprivileged
 385         registers in rd (%) and rs1 ($).
 386
 387 2016-06-07  Alan Modra  <amodra@gmail.com>
 388
 389         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 390         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 391         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 392         PPC_APUINFO_VLE: Define.
 393
 394 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 395
 396         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 397         entries.
 398         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 399
 400 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 401
 402         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 403         (struct arc_long_opcode): New structure.
 404         (arc_long_opcodes): Declare.
 405         (arc_num_long_opcodes): Declare.
 406
 407 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 408
 409         * elf/mips.h: Add extern "C".
 410         * elf/sh.h: Likewise.
 411         * opcode/d10v.h: Likewise.
 412         * opcode/d30v.h: Likewise.
 413         * opcode/ia64.h: Likewise.
 414         * opcode/mips.h: Likewise.
 415         * opcode/ppc.h: Likewise.
 416         * opcode/sparc.h: Likewise.
 417         * opcode/tic6x.h: Likewise.
 418         * opcode/v850.h: Likewise.
 419
 420 2016-05-28  Alan Modra  <amodra@gmail.com>
 421
 422         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 423         Return void from multiple_definition, multiple_common,
 424         add_to_set, constructor, warning, undefined_symbol,
 425         reloc_overflow, reloc_dangerous and unattached_reloc.
 426
 427 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 428
 429         * opcode/metag.h: wrap declarations in extern "C".
 430
 431 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 432
 433         * opcode/arc.h (insn_subclass_t): Add COND.
 434         (flag_class_t): Add F_CLASS_EXTEND.
 435
 436 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 437
 438         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 439         insn_class.
 440         (struct arc_flag_class): Renamed attribute class to flag_class.
 441
 442 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 443
 444         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 445         plain symbol.
 446
 447 2016-04-29  Tom Tromey  <tom@tromey.com>
 448
 449         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 450         DW_LANG_Rust_old>: New constants.
 451
 452 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 453
 454         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 455         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 456         * opcode/mips.h (ASE_DSPR3): New macro.
 457
 458 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 459             Nick Clifton  <nickc@redhat.com>
 460
 461         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 462         enumerator.
 463         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 464         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 465         (ARM_SYM_BRANCH_TYPE): Replace by ...
 466         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 467         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 468         BFD_ASSERT is defined or not.
 469
 470 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 471
 472         * elf/arm.h (Tag_DSP_extension): Define.
 473
 474 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 475
 476         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 477
 478 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 479
 480         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 481         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 482         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 483         for the high core bits.
 484
 485 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 486
 487         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 488         (ARC_SYNTAX_NOP): Likewsie.
 489         (ARC_OP1_MUST_BE_IMM): Update defined value.
 490         (ARC_OP1_IMM_IMPLIED): Likewise.
 491         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 492
 493 2016-04-28  Nick Clifton  <nickc@redhat.com>
 494
 495         PR target/19722
 496         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 497
 498 2016-04-27  Alan Modra  <amodra@gmail.com>
 499
 500         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 501         undef.  Formatting.
 502
 503 2016-04-21  Nick Clifton  <nickc@redhat.com>
 504
 505         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 506
 507 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 508
 509         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 510
 511 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 512
 513         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 514
 515 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 516
 517         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 518
 519 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 520
 521         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 522
 523 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 524
 525         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 526         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 527
 528 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 529
 530         * opcode/arc.h (flag_class_t): Update.
 531         (ARC_OPCODE_NONE): Define.
 532         (ARC_OPCODE_ARCALL): Likewise.
 533         (ARC_OPCODE_ARCFPX): Likewise.
 534         (ARC_REGISTER_READONLY): Likewise.
 535         (ARC_REGISTER_WRITEONLY): Likewise.
 536         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 537         (arc_aux_reg): Add cpu.
 538
 539 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 540
 541         * opcode/arc.h (arc_num_opcodes): Remove.
 542         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 543         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 544         (ARC_SUFFIX_FLAG): Define.
 545         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 546         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 547         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 548         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 549         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 550         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 551         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 552         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 553         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 554         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 555
 556 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 557
 558         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 559         (ARC_FPUDA): Define.
 560         (arc_aux_reg): Add new field.
 561
 562 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 563
 564         * opcode/arc-func.h (replace_bits24): Changed.
 565         (replace_bits24_be): Created.
 566
 567 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 568
 569         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 570         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 571         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 572         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 573         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 574         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 575         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 576         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 577         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 578         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 579         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 580         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 581         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 582         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 583
 584 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 585
 586         * opcode/i960.h: Add const qualifiers.
 587         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 588
 589 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 590
 591         * opcodes/arc.h (insn_class_t): Add BITOP type.
 592
 593 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 594
 595         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 596         new classes instead.
 597
 598 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 599
 600         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 601         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 602
 603 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 604
 605         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 606
 607 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 608
 609         * elf/arc.h (EF_ARC_MACH): Delete.
 610         (EF_ARC_MACH_MSK): Remove out of date comment.
 611
 612 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 613
 614         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 615
 616 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 617
 618         PR ld/19807
 619         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 620
 621 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 622             Andrew Burgess  <andrew.burgess@embecosm.com>
 623
 624         * elf/arc-reloc.def: Add a call to ME within the formula for each
 625         relocation that requires middle-endian correction.
 626
 627 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 628
 629         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 630         * opcode/h8300.h (struct h8_opcode): Likewise.
 631         * opcode/hppa.h (struct pa_opcode): Likewise.
 632         * opcode/msp430.h: Likewise.
 633         * opcode/spu.h (struct spu_opcode): Likewise.
 634         * opcode/tic30.h (struct _register): Likewise.
 635         * opcode/tic4x.h (struct tic4x_register): Likewise.
 636         (struct tic4x_cond): Likewise.
 637         (struct tic4x_indirect): Likewise.
 638         (struct tic4x_inst): Likewise.
 639         * opcode/visium.h (struct reg_entry): Likewise.
 640
 641 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 642
 643         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 644         (ARM_CPU_HAS_FEATURE): Add comment.
 645
 646 2016-03-03  Than McIntosh <thanm@google.com>
 647
 648         * plugin-api.h: Add new hooks to the plugin transfer vector to
 649         to support querying section alignment and section size.
 650         (ld_plugin_get_input_section_alignment): New hook.
 651         (ld_plugin_get_input_section_size): New hook.
 652         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 653         and LDPT_GET_INPUT_SECTION_SIZE.
 654         (ld_plugin_tv): Add tv_get_input_section_alignment and
 655         tv_get_input_section_size.
 656
 657 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 658
 659         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 660
 661 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 662
 663         PR ld/19645
 664         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 665         (bfd_link_info): Add elf_stt_common.
 666
 667 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 668
 669         PR ld/19636
 670         PR ld/19704
 671         PR ld/19719
 672         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 673
 674 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 675             Jiong Wang  <jiong.wang@arm.com>
 676
 677         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 678
 679 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 680             Janek van Oirschot  <jvanoirs@synopsys.com>
 681
 682         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 683         (arc_num_relax_opcodes): Declare.
 684
 685 2016-02-09  Nick Clifton  <nickc@redhat.com>
 686
 687         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 688         * opcode/nds32.h (nds32_r45map): Likewise.
 689         (nds32_r54map): Likewise.
 690         * opcode/visium.h (gen_reg_table): Likewise.
 691         (fp_reg_table, cc_table, opcode_table): Likewise.
 692
 693 2016-02-09  Alan Modra  <amodra@gmail.com>
 694
 695         PR 16583
 696         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 697
 698 2016-02-04  Nick Clifton  <nickc@redhat.com>
 699
 700         PR target/19561
 701         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 702         (RRUX): Synthesise using case 2 rather than 7.
 703
 704 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 705
 706         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 707         (NT_FREEBSD_PROCSTAT_PROC): Define.
 708         (NT_FREEBSD_PROCSTAT_FILES): Define.
 709         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 710         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 711         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 712         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 713         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 714         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 715         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 716
 717 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 718             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 719
 720         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 721         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 722         (ARC_TLS_LE_32): Fixed formula.
 723         (ARC_TLS_GD_LD): Use new special function.
 724         * opcode/arc-func.h: Changed all the replacement
 725         functions to clear the patching bits before doing an or it with the value
 726         argument.
 727
 728 2016-01-18  Nick Clifton  <nickc@redhat.com>
 729
 730         PR ld/19440
 731         * coff/internal.h (internal_syment): Use int to hold section
 732         number.
 733         (N_UNDEF): Cast to int not short.
 734         (N_ABS): Likewise.
 735         (N_DEBUG): Likewise.
 736         (N_TV): Likewise.
 737         (P_TV): Likewise.
 738
 739 2016-01-11  Nick Clifton  <nickc@redhat.com>
 740
 741         Import this change from GCC mainline:
 742
 743         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 744
 745         * longlong.h: Change !__SHMEDIA__ to
 746         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 747         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 748
 749 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 750
 751         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 752
 753 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 754
 755         * libiberty.h (dupargv): Change arg to char * const *.
 756         (writeargv, countargv): Likewise.
 757
 758 2016-01-01  Alan Modra  <amodra@gmail.com>
 759
 760         Update year range in copyright notice of all files.
 761
 762 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 763 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 764 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 765 som/ChangeLog-1015, and vms/ChangeLog-1015
 766 \f
 767 Copyright (C) 2016 Free Software Foundation, Inc.
 768
 769 Copying and distribution of this file, with or without modification,
 770 are permitted in any medium without royalty provided the copyright
 771 notice and this notice are preserved.
 772
 773 Local Variables:
 774 mode: change-log
 775 left-margin: 8
 776 fill-column: 74
 777 version-control: never
 778 End: