1 2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
2 Andrew Bennett <andrew.bennett@imgtec.com>
4 * opcode/mips.h (ASE_XPA_VIRT): New macro.
6 2017-06-29 Andreas Arnez <arnez@linux.vnet.ibm.com>
8 * elf/common.h (NT_S390_GS_CB): New macro.
9 (NT_S390_GS_BC): Likewise.
11 2017-06-28 Tamar Christina <tamar.christina@arm.com>
13 * opcode/aarch64.h: (AARCH64_FEATURE_DOTPROD): New.
14 (aarch64_insn_class): Added dotprod.
16 2017-06-28 Jiong Wang <jiong.wang@arm.com>
18 * opcode/arm.h (FPU_NEON_EXT_DOTPROD): New macro.
19 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): New macro.
21 2017-06-28 Maciej W. Rozycki <macro@imgtec.com>
22 Matthew Fortune <matthew.fortune@imgtec.com>
24 * elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
25 (AFL_EXT_INTERAPTIV_MR2): Likewise.
26 * opcode/mips.h: Document new operand codes defined.
27 (INSN_INTERAPTIV_MR2): New macro.
28 (INSN_CHIP_MASK): Adjust accordingly.
29 (CPU_INTERAPTIV_MR2): New macro.
30 (cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
31 (MIPS16_ALL_ARGS): Rename to...
32 (MIPS_SVRS_ALL_ARGS): ... this.
33 (MIPS16_ALL_STATICS): Rename to...
34 (MIPS_SVRS_ALL_STATICS): ... this.
36 2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
38 * elf/riscv.h (R_RISCV_32_PCREL): New.
40 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
42 * elf/arm.h (TAG_CPU_ARCH_V8R): New macro.
43 * opcode/arm.h (ARM_EXT2_V8A): New macro.
44 (ARM_AEXT2_V8A): Rename into ...
45 (ARM_AEXT2_V8AR): This.
46 (ARM_AEXT2_V8A): New macro.
47 (ARM_AEXT_V8R): New macro.
48 (ARM_AEXT2_V8R): New macro.
49 (ARM_ARCH_V8R): New macro.
51 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
53 * opcode/arm.h (ARM_AEXT_V4TxM): Add ARM_EXT_OS bit to the set.
54 (ARM_AEXT_V4T): Likewise.
55 (ARM_AEXT_V5TxM): Likewise.
56 (ARM_AEXT_V5T): Likewise.
57 (ARM_AEXT_V6M): Mask off ARM_EXT_OS bit.
59 2017-06-22 H.J. Lu <hongjiu.lu@intel.com>
61 * bfdlink.h (bfd_link_info): Add shstk.
62 * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_SHSTK): New.
64 2017-06-22 H.J. Lu <hongjiu.lu@intel.com>
66 * bfdlink.h (bfd_link_info): Add ibtplt and ibt.
67 * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_AND): New.
68 (GNU_PROPERTY_X86_FEATURE_1_IBT): Likewise.
70 2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
72 * opcode/arm.h (FPU_ANY): New macro.
74 2017-06-20 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
76 * elf/s390.h (PT_S390_PGSTE): Define macro.
78 2017-06-16 Alan Modra <amodra@gmail.com>
84 * bfdlink.h (struct bfd_link_hash_entry): Delete undef.section.
86 2017-06-14 Yao Qi <yao.qi@linaro.org>
88 * dis-asm.h (print_insn_aarch64): Move it to opcodes/disassemble.h.
89 (print_insn_big_arm, print_insn_big_mips): Likewise.
90 (print_insn_i386, print_insn_ia64): Likewise.
91 (print_insn_little_arm, print_insn_little_mips): Likewise.
92 (print_insn_spu): Likewise.
94 2017-06-06 Andrew Burgess <andrew.burgess@embecosm.com>
96 * bfdlink.h (struct bfd_link_info): Add new resolve_section_groups
99 2017-06-01 Alan Modra <amodra@gmail.com>
101 * elf/ppc64.h (PPC64_OPT_LOCALENTRY): Define.
103 2017-05-31 Eli Zaretskii <eliz@gnu.org>
105 * environ.h: Add #ifndef guard.
107 2017-05-30 Anton Kolesov <anton.kolesov@synopsys.com>
109 * elf/arc-cpu.def: New file.
111 2017-05-24 Yao Qi <yao.qi@linaro.org>
113 * dis-asm.h: Move some function declarations to
114 opcodes/disassemble.h.
116 2017-05-24 Yao Qi <yao.qi@linaro.org>
118 * dis-asm.h (disassembler): Update declaration.
120 2017-05-23 Claudiu Zissulescu <claziss@synopsys.com>
122 * opcode/arc.h (MAX_INSN_FLGS): Update to 4.
124 2017-05-22 H.J. Lu <hongjiu.lu@intel.com>
126 * include/opcode/i386.h (NOTRACK_PREFIX_OPCODE): New.
128 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
130 * elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define.
131 (ELF_SPARC_HWCAP2_ONADDSUB): Likewise.
132 (ELF_SPARC_HWCAP2_ONMUL): Likewise.
133 (ELF_SPARC_HWCAP2_ONDIV): Likewise.
134 (ELF_SPARC_HWCAP2_DICTUNP): Likewise.
135 (ELF_SPARC_HWCAP2_FPCMPSHL): Likewise.
136 (ELF_SPARC_HWCAP2_RLE): Likewise.
137 (ELF_SPARC_HWCAP2_SHA3): Likewise.
138 * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8
139 and adjust SPARC_OPCODE_ARCH_MAX.
140 (HWCAP2_SPARC6): Define.
141 (HWCAP2_ONADDSUB): Likewise.
142 (HWCAP2_ONMUL): Likewise.
143 (HWCAP2_ONDIV): Likewise.
144 (HWCAP2_DICTUNP): Likewise.
145 (HWCAP2_FPCMPSHL): Likewise.
146 (HWCAP2_RLE): Likewise.
147 (HWCAP2_SHA3): Likewise.
154 2017-05-16 Alan Modra <amodra@gmail.com>
156 * bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to
159 2017-05-16 Alan Modra <amodra@gmail.com>
161 * bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref
162 comment. Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic.
164 2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
165 Matthew Fortune <matthew.fortune@imgtec.com>
167 * elf/mips.h (AFL_ASE_MIPS16E2): New macro.
168 (AFL_ASE_MASK): Adjust accordingly.
169 * opcode/mips.h: Document new operand codes defined.
170 (mips_operand_type): Add OP_REG28 enum value.
171 (INSN2_SHORT_ONLY): Update description.
172 (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros.
174 2017-05-14 John David Anglin <danglin@gcc.gnu.org>
176 * opcode/hppa.h: Fix match and mask for 64-bit bb opcode.
178 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
180 * elf/arc.h (SHT_ARC_ATTRIBUTES): Define.
182 (E_ARC_OSABI_V4): Define.
183 (E_ARC_OSABI_CURRENT): Reassign it.
185 * opcode/arc-attrs.h: New file.
186 * opcode/arc.h (insn_subclass_t): Assign enum values.
187 (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64.
188 (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT)
189 (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP)
190 (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW)
191 (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC)
194 2017-04-20 H.J. Lu <hongjiu.lu@intel.com>
197 * bfdlink.h (bfd_link_hash_entry): Add dynamic_ref_after_ir_def.
199 2017-04-19 Alan Modra <amodra@gmail.com>
201 * bfdlink.h (struct bfd_link_info <dynamic_undefined_weak>):
204 2017-04-11 Alan Modra <amodra@gmail.com>
206 * opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
207 (PPC_OPCODE_VSX3): Delete.
208 (PPC_OPCODE_HTM): Delete.
209 (PPC_OPCODE_*): Renumber and order chronologically.
210 (PPC_OPCODE_SPE): Comment on this and other bits used for APUinfo.
212 2017-04-06 Pip Cet <pipcet@gmail.com>
214 * dis-asm.h: Add prototypes for wasm32 disassembler.
216 2017-04-05 Pedro Alves <palves@redhat.com>
218 * dis-asm.h (disassemble_info) <disassembler_options>: Now a
220 (next_disassembler_option): Constify.
222 2017-04-04 H.J. Lu <hongjiu.lu@intel.com>
224 * elf/common.h (PT_GNU_MBIND_NUM): New.
225 (PT_GNU_MBIND_LO): Likewise.
226 (PT_GNU_MBIND_HI): Likewise.
227 (SHF_GNU_MBIND): Likewise.
229 2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
231 * elf/riscv.h (RISCV_GP_SYMBOL): New define.
233 2017-03-27 Andrew Waterman <andrew@sifive.com>
235 * opcode/riscv-opc.h (CSR_PMPCFG0): New define.
236 (CSR_PMPCFG1): Likewise.
237 (CSR_PMPCFG2): Likewise.
238 (CSR_PMPCFG3): Likewise.
239 (CSR_PMPADDR0): Likewise.
240 (CSR_PMPADDR1): Likewise.
241 (CSR_PMPADDR2): Likewise.
242 (CSR_PMPADDR3): Likewise.
243 (CSR_PMPADDR4): Likewise.
244 (CSR_PMPADDR5): Likewise.
245 (CSR_PMPADDR6): Likewise.
246 (CSR_PMPADDR7): Likewise.
247 (CSR_PMPADDR8): Likewise.
248 (CSR_PMPADDR9): Likewise.
249 (CSR_PMPADDR10): Likewise.
250 (CSR_PMPADDR11): Likewise.
251 (CSR_PMPADDR12): Likewise.
252 (CSR_PMPADDR13): Likewise.
253 (CSR_PMPADDR14): Likewise.
254 (CSR_PMPADDR15): Likewise.
255 (pmpcfg0): Declare register.
259 (pmpaddr0): Likewise.
260 (pmpaddr1): Likewise.
261 (pmpaddr2): Likewise.
262 (pmpaddr3): Likewise.
263 (pmpaddr4): Likewise.
264 (pmpaddr5): Likewise.
265 (pmpaddr6): Likewise.
266 (pmpaddr7): Likewise.
267 (pmpaddr8): Likewise.
268 (pmpaddr9): Likewise.
269 (pmpaddr10): Likewise.
270 (pmpaddr11): Likewise.
271 (pmpaddr12): Likewise.
272 (pmpaddr13): Likewise.
273 (pmpaddr14): Likewise.
274 (pmpaddr15): Likewise.
276 2017-03-30 Pip Cet <pipcet@gmail.com>
278 * opcode/wasm.h: New file to support wasm32 architecture.
279 * elf/wasm32.h: Add R_WASM32_32 relocation.
281 2017-03-29 Alan Modra <amodra@gmail.com>
283 * opcode/ppc.h (PPC_OPCODE_RAW): Define.
284 (PPC_OPCODE_*): Make them all unsigned long long constants.
286 2017-03-27 Pip Cet <pipcet@gmail.com>
288 * elf/wasm32.h: New file to support wasm32 architecture.
290 2017-03-27 Rinat Zelig <rinat@mellanox.com>
292 * opcode/arc.h (insn_class_t): Add ULTRAIP and MISC class.
294 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
296 * opcode/s390.h (S390_INSTR_FLAG_VX2): Remove.
297 (S390_INSTR_FLAG_FACILITY_MASK): Adjust value.
299 2017-03-21 Rinat Zelig <rinat@mellanox.com>
301 * opcode/arc.h (insn_class_t): Add DMA class.
303 2017-03-16 Nick Clifton <nickc@redhat.com>
305 * elf/common.h (GNU_BUILD_ATTRIBUTE_SHORT_ENUM): New GNU BUILD
308 2017-03-14 Jakub Jelinek <jakub@redhat.com>
311 * dwarf2.def (DW_OP_GNU_variable_value): New opcode.
313 2017-03-13 Markus Trippelsdorf <markus@trippelsdorf.de>
317 * demangle.h (struct demangle_component): Add d_printing field.
318 (cplus_demangle_print): Remove const qualifier from tree
320 (cplus_demangle_print_callback): Likewise.
322 2017-03-13 Nick Clifton <nickc@redhat.com>
325 * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to
326 R_AARCH64_TLSDESC_LD64_LO12.
327 (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to
328 R_AARCH64_TLSDESC_ADD_LO12_NC.
330 2017-03-10 Nick Clifton <nickc@redhat.com>
332 * elf/common.h (EM_LANAI): New machine number.
334 (EM_WEBASSEMBLY): Likewise.
335 Move low value, deprecated, numbers to their numerical
338 2017-03-08 H.J. Lu <hongjiu.lu@intel.com>
341 * elf/common.h (GNU_PROPERTY_LOPROC): New.
342 (GNU_PROPERTY_HIPROC): Likewise.
343 (GNU_PROPERTY_LOUSER): Likewise.
344 (GNU_PROPERTY_HIUSER): Likewise.
346 2017-03-01 Nick Clifton <nickc@redhat.com>
348 * elf/common.h (SHF_GNU_BUILD_NOTE): Define.
349 (NT_GNU_PROPERTY_TYPE_0): Define.
350 (NT_GNU_BUILD_ATTRIBUTE_OPEN): Define.
351 (NT_GNU_BUILD_ATTRIBUTE_FUN): Define.
352 (GNU_BUILD_ATTRIBUTE_TYPE_NUMERIC): Define.
353 (GNU_BUILD_ATTRIBUTE_TYPE_STRING): Define.
354 (GNU_BUILD_ATTRIBUTE_TYPE_BOOL_TRUE): Define.
355 (GNU_BUILD_ATTRIBUTE_TYPE_BOOL_FALSE): Define.
356 (GNU_BUILD_ATTRIBUTE_VERSION): Define.
357 (GNU_BUILD_ATTRIBUTE_STACK_PROT): Define.
358 (GNU_BUILD_ATTRIBUTE_RELRO): Define.
359 (GNU_BUILD_ATTRIBUTE_STACK_SIZE): Define.
360 (GNU_BUILD_ATTRIBUTE_TOOL): Define.
361 (GNU_BUILD_ATTRIBUTE_ABI): Define.
362 (GNU_BUILD_ATTRIBUTE_PIC): Define.
363 (NOTE_GNU_PROPERTY_SECTION_NAME): Define.
364 (GNU_BUILD_ATTRS_SECTION_NAME): Define.
365 (GNU_PROPERTY_STACK_SIZE): Define.
366 (GNU_PROPERTY_NO_COPY_ON_PROTECTED): Define.
367 (GNU_PROPERTY_X86_ISA_1_USED): Define.
368 (GNU_PROPERTY_X86_ISA_1_NEEDED): Define.
369 (GNU_PROPERTY_X86_ISA_1_486): Define.
370 (GNU_PROPERTY_X86_ISA_1_586): Define.
371 (GNU_PROPERTY_X86_ISA_1_686): Define.
372 (GNU_PROPERTY_X86_ISA_1_SSE): Define.
373 (GNU_PROPERTY_X86_ISA_1_SSE2): Define.
374 (GNU_PROPERTY_X86_ISA_1_SSE3): Define.
375 (GNU_PROPERTY_X86_ISA_1_SSSE3): Define.
376 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Define.
377 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Define.
378 (GNU_PROPERTY_X86_ISA_1_AVX): Define.
379 (GNU_PROPERTY_X86_ISA_1_AVX2): Define.
380 (GNU_PROPERTY_X86_ISA_1_AVX512F): Define.
381 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Define.
382 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Define.
383 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Define.
384 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Define.
385 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Define.
386 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Define.
388 2017-02-28 Peter Bergner <bergner@vnet.ibm.com>
390 * dis-asm.h (disasm_options_t): New typedef.
391 (parse_arm_disassembler_option): Remove prototype.
392 (set_arm_regname_option): Likewise.
393 (get_arm_regnames): Likewise.
394 (get_arm_regname_num_options): Likewise.
395 (disassemble_init_s390): New prototype.
396 (disassembler_options_powerpc): Likewise.
397 (disassembler_options_arm): Likewise.
398 (disassembler_options_s390): Likewise.
399 (remove_whitespace_and_extra_commas): Likewise.
400 (disassembler_options_cmp): Likewise.
401 (next_disassembler_option): New inline function.
402 (FOR_EACH_DISASSEMBLER_OPTION): New macro.
404 2017-02-28 Alan Modra <amodra@gmail.com>
406 * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment.
407 * elf/ppc.h (R_PPC_16DX_HA): Likewise.
409 2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
411 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16)
412 (AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2)
413 (AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX)
414 (AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds.
416 2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
418 * opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro.
419 (AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM.
421 2017-02-22 Andrew Waterman <andrew@sifive.com>
423 * opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
424 (CSR_MCOUNTEREN): Likewise.
425 (scounteren): Declare register.
426 (mcounteren): Likewise.
428 2017-02-14 Andrew Waterman <andrew@sifive.com>
430 * opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.
431 (MASK_SFENCE_VMA): Likewise.
432 (sfence_vma): Declare instruction.
434 2017-02-14 Alan Modra <amodra@gmail.com>
437 * opcode/ppc.h (PPC_OPERAND_*): Reassign values, regs first.
438 (PPC_OPERAND_SPR, PPC_OPERAND_GQR): Define.
440 2017-01-24 Dimitar Dimitrov <dimitar@dinux.eu>
442 * opcode/hppa.h: Clarify that file is part of GNU opcodes.
443 * opcode/i860.h: Ditto.
444 * opcode/nios2.h: Ditto.
445 * opcode/nios2r1.h: Ditto.
446 * opcode/nios2r2.h: Ditto.
447 * opcode/pru.h: Ditto.
449 2017-01-24 Alan Hayward <alan.hayward@arm.com>
451 * elf/common.h (NT_ARM_SVE): Define.
453 2017-01-04 Jiong Wang <jiong.wang@arm.com>
455 * dwarf2.def: Sync with mainline gcc sources.
457 2017-01-04 Richard Earnshaw <rearnsha@arm.com>
458 Jiong Wang <jiong.wang@arm.com>
460 * dwarf2.def (DW_OP_AARCH64_operation): Reserve the number 0xea.
461 (DW_CFA_GNU_window_save): Comments the multiplexing on AArch64.
463 2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
465 * opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
466 (AARCH64_ARCH_V8_3): Update.
468 2017-01-03 Kito Cheng <kito.cheng@gmail.com>
470 * opcode/riscv-opc.h: Add support for the "q" ISA extension.
472 2017-01-03 Nick Clifton <nickc@redhat.com>
474 * dwarf2.def: Sync with mainline gcc sources
475 * dwarf2.h: Likewise.
477 2016-12-21 Jakub Jelinek <jakub@redhat.com>
479 * dwarf2.def (DW_FORM_ref_sup): Renamed to ...
480 (DW_FORM_ref_sup4): ... this. New form.
481 (DW_FORM_ref_sup8): New form.
483 2016-10-17 Jakub Jelinek <jakub@redhat.com>
485 * dwarf2.h (enum dwarf_calling_convention): Add new DWARF5
486 calling convention codes.
487 (enum dwarf_line_number_content_type): New.
488 (enum dwarf_location_list_entry_type): Add DWARF5 DW_LLE_*
490 (enum dwarf_source_language): Add new DWARF5 DW_LANG_* codes.
491 (enum dwarf_macro_record_type): Add DWARF5 DW_MACRO_* codes.
492 (enum dwarf_name_index_attribute): New.
493 (enum dwarf_range_list_entry): New.
494 (enum dwarf_unit_type): New.
495 * dwarf2.def: Add new DWARF5 DW_TAG_*, DW_FORM_*, DW_AT_*,
496 DW_OP_* and DW_ATE_* entries.
498 2016-08-15 Jakub Jelinek <jakub@redhat.com>
500 * dwarf2.def (DW_AT_string_length_bit_size,
501 DW_AT_string_length_byte_size): New attributes.
503 2016-08-12 Alexandre Oliva <aoliva@redhat.com>
506 * dwarf2.def (DW_AT_deleted, DW_AT_defaulted): New.
507 * dwarf2.h (enum dwarf_defaulted_attribute): New.
509 2017-01-02 Alan Modra <amodra@gmail.com>
511 Update year range in copyright notice of all files.
513 For older changes see ChangeLog-2016
515 Copyright (C) 2017 Free Software Foundation, Inc.
517 Copying and distribution of this file, with or without modification,
518 are permitted in any medium without royalty provided the copyright
519 notice and this notice are preserved.
525 version-control: never