1 2016-11-07 Jason Merrill <jason@redhat.com>
3 * demangle.h (enum demangle_component_type): Add
4 DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
6 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
8 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
9 AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
10 (enum aarch64_op): Add OP_FCMLA_ELEM.
12 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
14 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
15 (enum aarch64_insn_class): Add ldst_imm10.
17 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
19 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
21 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
23 * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
24 (AARCH64_ARCH_V8_3): Define.
25 (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
27 2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
29 * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
30 (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
31 (ARM_ARCH_V8M_MAIN_DSP): Likewise.
33 2016-11-03 Graham Markall <graham.markall@embecosm.com>
35 * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
37 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
39 * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
41 (struct arc_long_opcode): Delete.
42 (struct arc_operand): Change types for insert and extract
45 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
47 * opcode/arc.h: Make macros 64-bit safe.
49 2016-11-03 Graham Markall <graham.markall@embecosm.com>
51 * opcode/arc.h (arc_opcode_len): Declare.
54 2016-11-01 Palmer Dabbelt <palmer@dabbelt.com>
55 Andrew Waterman <andrew@sifive.com>
57 Add support for RISC-V architecture.
58 * dis-asm.h: Add prototypes for print_insn_riscv and
59 print_riscv_disassembler_options.
60 * elf/riscv.h: New file.
61 * opcode/riscv-opc.h: New file.
62 * opcode/riscv.h: New file.
64 2016-10-17 Nick Clifton <nickc@redhat.com>
66 * elf/common.h (DT_SYMTAB_SHNDX): Define.
67 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
68 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
69 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
70 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
71 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
72 (ELFOSABI_OPENVOS): Define.
73 (GRP_MASKOS, GRP_MASKPROC): Define.
75 2016-10-14 Pedro Alves <palves@redhat.com>
77 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
78 OVERRIDE): Define as empty.
79 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
81 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
84 2016-10-14 Pedro Alves <palves@redhat.com>
86 * ansidecl.h (GCC_FINAL): Delete.
87 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
89 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
91 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
93 2016-09-29 Alan Modra <amodra@gmail.com>
95 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
97 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
99 * opcode/arc.h (insn_class_t): Add two new classes.
101 2016-09-26 Alan Modra <amodra@gmail.com>
103 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
105 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
107 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
109 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
111 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
112 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
113 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
114 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
116 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
118 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
119 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
120 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
121 aarch64_insn_classes.
123 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
125 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
126 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
127 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
129 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
131 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
132 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
133 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
135 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
137 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
138 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
139 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
140 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
141 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
142 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
143 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
144 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
145 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
146 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
147 (aarch64_sve_dupm_mov_immediate_p): Declare.
149 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
151 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
152 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
153 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
154 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
155 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
157 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
159 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
160 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
161 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
162 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
163 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
164 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
165 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
166 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
167 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
168 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
169 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
170 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
171 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
172 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
173 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
174 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
177 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
179 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
181 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
182 (aarch64_opnd_info): Make shifter.amount an int64_t and
183 rearrange the fields.
185 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
187 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
188 (AARCH64_OPND_SVE_PRFOP): Likewise.
189 (aarch64_sve_pattern_array): Declare.
190 (aarch64_sve_prfop_array): Likewise.
192 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
194 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
195 (AARCH64_OPND_QLF_P_M): Likewise.
197 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
199 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
200 aarch64_operand_class.
201 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
202 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
203 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
204 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
205 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
206 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
207 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
208 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
210 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
212 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
213 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
215 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
217 * opcode/aarch64.h (F_STRICT): New flag.
219 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
221 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
223 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
224 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
225 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
226 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
229 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
231 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
232 (ARM_SET_SYM_CMSE_SPCL): Likewise.
234 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
236 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
238 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
240 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
242 2016-07-27 Graham Markall <graham.markall@embecosm.com>
244 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
245 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
247 * opcode/arc.h: Add BMU to insn_class_t enum.
248 * opcode/arc.h: Add PMU to insn_class_t enum.
250 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
252 * dis-asm.h: Declare print_arc_disassembler_options.
254 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
256 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
257 out_implib_bfd fields.
259 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
261 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
263 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
265 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
266 (SHF_ARM_PURECODE): ... this.
268 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
270 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
271 (AARCH64_CPU_HAS_ANY_FEATURES): New.
272 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
273 (AARCH64_OPCODE_HAS_FEATURE): Remove.
275 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
277 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
278 of enabled FPU features.
280 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
282 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
283 SPARC_OPCODE_ARCH_MAX into the enum.
285 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
287 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
289 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
291 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
293 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
295 * elf/xtensa.h (xtensa_make_property_section): New prototype.
297 2016-06-24 John Baldwin <jhb@FreeBSD.org>
299 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
300 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
301 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
302 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
304 2016-06-23 Graham Markall <graham.markall@embecosm.com>
306 * opcode/arc.h: Make insn_class_t alphabetical again.
308 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
310 * elf/dlx.h: Wrap in extern C.
311 * elf/xtensa.h: Likewise.
312 * opcode/arc.h: Likewise.
314 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
316 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
319 2016-06-21 Graham Markall <graham.markall@embecosm.com>
321 * opcode/arc.h: Add nps400 extension and instruction
323 Remove ARC_OPCODE_NPS400
324 * elf/arc.h: Remove E_ARC_MACH_NPS400
326 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
328 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
329 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
330 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
331 SPARC_OPCODE_ARCH_V9M.
333 2016-06-14 John Baldwin <jhb@FreeBSD.org>
335 * opcode/msp430-decode.h (MSP430_Size): Remove.
336 (Msp430_Opcode_Decoded): Change type of size to int.
338 2016-06-11 Alan Modra <amodra@gmail.com>
340 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
342 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
344 * opcode/sparc.h: Add missing documentation for hyperprivileged
345 registers in rd (%) and rs1 ($).
347 2016-06-07 Alan Modra <amodra@gmail.com>
349 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
350 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
351 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
352 PPC_APUINFO_VLE: Define.
354 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
356 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
358 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
360 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
362 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
363 (struct arc_long_opcode): New structure.
364 (arc_long_opcodes): Declare.
365 (arc_num_long_opcodes): Declare.
367 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
369 * elf/mips.h: Add extern "C".
370 * elf/sh.h: Likewise.
371 * opcode/d10v.h: Likewise.
372 * opcode/d30v.h: Likewise.
373 * opcode/ia64.h: Likewise.
374 * opcode/mips.h: Likewise.
375 * opcode/ppc.h: Likewise.
376 * opcode/sparc.h: Likewise.
377 * opcode/tic6x.h: Likewise.
378 * opcode/v850.h: Likewise.
380 2016-05-28 Alan Modra <amodra@gmail.com>
382 * bfdlink.h (struct bfd_link_callbacks): Update comments.
383 Return void from multiple_definition, multiple_common,
384 add_to_set, constructor, warning, undefined_symbol,
385 reloc_overflow, reloc_dangerous and unattached_reloc.
387 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
389 * opcode/metag.h: wrap declarations in extern "C".
391 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
393 * opcode/arc.h (insn_subclass_t): Add COND.
394 (flag_class_t): Add F_CLASS_EXTEND.
396 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
398 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
400 (struct arc_flag_class): Renamed attribute class to flag_class.
402 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
404 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
407 2016-04-29 Tom Tromey <tom@tromey.com>
409 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
410 DW_LANG_Rust_old>: New constants.
412 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
414 * elf/mips.h (AFL_ASE_DSPR3): New macro.
415 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
416 * opcode/mips.h (ASE_DSPR3): New macro.
418 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
419 Nick Clifton <nickc@redhat.com>
421 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
423 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
424 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
425 (ARM_SYM_BRANCH_TYPE): Replace by ...
426 (ARM_GET_SYM_BRANCH_TYPE): This and ...
427 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
428 BFD_ASSERT is defined or not.
430 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
432 * elf/arm.h (Tag_DSP_extension): Define.
434 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
436 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
438 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
440 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
441 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
442 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
443 for the high core bits.
445 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
447 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
448 (ARC_SYNTAX_NOP): Likewsie.
449 (ARC_OP1_MUST_BE_IMM): Update defined value.
450 (ARC_OP1_IMM_IMPLIED): Likewise.
451 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
453 2016-04-28 Nick Clifton <nickc@redhat.com>
456 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
458 2016-04-27 Alan Modra <amodra@gmail.com>
460 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
463 2016-04-21 Nick Clifton <nickc@redhat.com>
465 * bfdlink.h: Add prototype for bfd_link_check_relocs.
467 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
469 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
471 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
473 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
475 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
477 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
479 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
481 * opcode/arc.h (insn_class_t): Add NET and ACL class.
483 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
485 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
486 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
488 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
490 * opcode/arc.h (flag_class_t): Update.
491 (ARC_OPCODE_NONE): Define.
492 (ARC_OPCODE_ARCALL): Likewise.
493 (ARC_OPCODE_ARCFPX): Likewise.
494 (ARC_REGISTER_READONLY): Likewise.
495 (ARC_REGISTER_WRITEONLY): Likewise.
496 (ARC_REGISTER_NOSHORT_CUT): Likewise.
497 (arc_aux_reg): Add cpu.
499 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
501 * opcode/arc.h (arc_num_opcodes): Remove.
502 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
503 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
504 (ARC_SUFFIX_FLAG): Define.
505 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
506 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
507 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
508 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
509 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
510 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
511 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
512 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
513 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
514 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
516 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
518 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
520 (arc_aux_reg): Add new field.
522 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
524 * opcode/arc-func.h (replace_bits24): Changed.
525 (replace_bits24_be): Created.
527 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
529 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
530 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
531 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
532 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
533 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
534 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
535 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
536 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
537 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
538 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
539 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
540 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
541 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
542 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
544 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
546 * opcode/i960.h: Add const qualifiers.
547 * opcode/tic4x.h (struct tic4x_inst): Likewise.
549 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
551 * opcodes/arc.h (insn_class_t): Add BITOP type.
553 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
555 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
558 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
560 * elf/arc.h (E_ARC_MACH_NPS400): Define.
561 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
563 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
565 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
567 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
569 * elf/arc.h (EF_ARC_MACH): Delete.
570 (EF_ARC_MACH_MSK): Remove out of date comment.
572 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
574 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
576 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
579 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
581 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
582 Andrew Burgess <andrew.burgess@embecosm.com>
584 * elf/arc-reloc.def: Add a call to ME within the formula for each
585 relocation that requires middle-endian correction.
587 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
589 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
590 * opcode/h8300.h (struct h8_opcode): Likewise.
591 * opcode/hppa.h (struct pa_opcode): Likewise.
592 * opcode/msp430.h: Likewise.
593 * opcode/spu.h (struct spu_opcode): Likewise.
594 * opcode/tic30.h (struct _register): Likewise.
595 * opcode/tic4x.h (struct tic4x_register): Likewise.
596 (struct tic4x_cond): Likewise.
597 (struct tic4x_indirect): Likewise.
598 (struct tic4x_inst): Likewise.
599 * opcode/visium.h (struct reg_entry): Likewise.
601 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
603 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
604 (ARM_CPU_HAS_FEATURE): Add comment.
606 2016-03-03 Than McIntosh <thanm@google.com>
608 * plugin-api.h: Add new hooks to the plugin transfer vector to
609 to support querying section alignment and section size.
610 (ld_plugin_get_input_section_alignment): New hook.
611 (ld_plugin_get_input_section_size): New hook.
612 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
613 and LDPT_GET_INPUT_SECTION_SIZE.
614 (ld_plugin_tv): Add tv_get_input_section_alignment and
615 tv_get_input_section_size.
617 2016-03-03 Evgenii Stepanov <eugenis@google.com>
619 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
621 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
624 * bfdlink.h (bfd_link_elf_stt_common): New enum.
625 (bfd_link_info): Add elf_stt_common.
627 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
632 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
634 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
635 Jiong Wang <jiong.wang@arm.com>
637 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
639 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
640 Janek van Oirschot <jvanoirs@synopsys.com>
642 * opcode/arc.h (arc_opcode arc_relax_opcodes)
643 (arc_num_relax_opcodes): Declare.
645 2016-02-09 Nick Clifton <nickc@redhat.com>
647 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
648 * opcode/nds32.h (nds32_r45map): Likewise.
649 (nds32_r54map): Likewise.
650 * opcode/visium.h (gen_reg_table): Likewise.
651 (fp_reg_table, cc_table, opcode_table): Likewise.
653 2016-02-09 Alan Modra <amodra@gmail.com>
656 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
658 2016-02-04 Nick Clifton <nickc@redhat.com>
661 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
662 (RRUX): Synthesise using case 2 rather than 7.
664 2016-01-19 John Baldwin <jhb@FreeBSD.org>
666 * elf/common.h (NT_FREEBSD_THRMISC): Define.
667 (NT_FREEBSD_PROCSTAT_PROC): Define.
668 (NT_FREEBSD_PROCSTAT_FILES): Define.
669 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
670 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
671 (NT_FREEBSD_PROCSTAT_UMASK): Define.
672 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
673 (NT_FREEBSD_PROCSTAT_OSREL): Define.
674 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
675 (NT_FREEBSD_PROCSTAT_AUXV): Define.
677 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
678 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
680 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
681 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
682 (ARC_TLS_LE_32): Fixed formula.
683 (ARC_TLS_GD_LD): Use new special function.
684 * opcode/arc-func.h: Changed all the replacement
685 functions to clear the patching bits before doing an or it with the value
688 2016-01-18 Nick Clifton <nickc@redhat.com>
691 * coff/internal.h (internal_syment): Use int to hold section
693 (N_UNDEF): Cast to int not short.
699 2016-01-11 Nick Clifton <nickc@redhat.com>
701 Import this change from GCC mainline:
703 2016-01-07 Mike Frysinger <vapier@gentoo.org>
705 * longlong.h: Change !__SHMEDIA__ to
706 (!defined (__SHMEDIA__) || !__SHMEDIA__).
707 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
709 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
711 * opcode/mips.h: Add a summary of MIPS16 operand codes.
713 2016-01-05 Mike Frysinger <vapier@gentoo.org>
715 * libiberty.h (dupargv): Change arg to char * const *.
716 (writeargv, countargv): Likewise.
718 2016-01-01 Alan Modra <amodra@gmail.com>
720 Update year range in copyright notice of all files.
722 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
723 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
724 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
725 som/ChangeLog-1015, and vms/ChangeLog-1015
727 Copyright (C) 2016 Free Software Foundation, Inc.
729 Copying and distribution of this file, with or without modification,
730 are permitted in any medium without royalty provided the copyright
731 notice and this notice are preserved.
737 version-control: never