include/io.h

   1 #ifndef __IO_H
   2 #define __IO_H
   3
   4 static inline uint8_t readb(unsigned long addr)
   5 {
   6         uint8_t val;
   7         __asm__ volatile("sync; lbzcix %0,0,%1" : "=r" (val) : "r" (addr) : "memory");
   8         return val;
   9 }
  10
  11 static inline uint16_t readw(unsigned long addr)
  12 {
  13         uint16_t val;
  14         __asm__ volatile("sync; lhzcix %0,0,%1" : "=r" (val) : "r" (addr) : "memory");
  15         return val;
  16 }
  17
  18 static inline uint32_t readl(unsigned long addr)
  19 {
  20         uint32_t val;
  21         __asm__ volatile("sync; lwzcix %0,0,%1" : "=r" (val) : "r" (addr) : "memory");
  22         return val;
  23 }
  24
  25 static inline uint64_t readq(unsigned long addr)
  26 {
  27         uint64_t val;
  28         __asm__ volatile("sync; ldcix %0,0,%1" : "=r" (val) : "r" (addr) : "memory");
  29         return val;
  30 }
  31
  32 static inline void writeb(uint8_t val, unsigned long addr)
  33 {
  34         __asm__ volatile("sync; stbcix %0,0,%1" : : "r" (val), "r" (addr) : "memory");
  35 }
  36
  37 static inline void writew(uint16_t val, unsigned long addr)
  38 {
  39         __asm__ volatile("sync; sthcix %0,0,%1" : : "r" (val), "r" (addr) : "memory");
  40 }
  41
  42 static inline void writel(uint32_t val, unsigned long addr)
  43 {
  44         __asm__ volatile("sync; stwcix %0,0,%1" : : "r" (val), "r" (addr) : "memory");
  45 }
  46
  47 static inline void writeq(uint64_t val, unsigned long addr)
  48 {
  49         __asm__ volatile("sync; stdcix %0,0,%1" : : "r" (val), "r" (addr) : "memory");
  50 }
  51
  52 #endif /* __IO_H */
  53