4 static inline uint8_t readb(unsigned long addr
)
7 __asm__
volatile("sync; lbzcix %0,0,%1" : "=r" (val
) : "r" (addr
) : "memory");
11 static inline uint16_t readw(unsigned long addr
)
14 __asm__
volatile("sync; lhzcix %0,0,%1" : "=r" (val
) : "r" (addr
) : "memory");
18 static inline uint32_t readl(unsigned long addr
)
21 __asm__
volatile("sync; lwzcix %0,0,%1" : "=r" (val
) : "r" (addr
) : "memory");
25 static inline uint64_t readq(unsigned long addr
)
28 __asm__
volatile("sync; ldcix %0,0,%1" : "=r" (val
) : "r" (addr
) : "memory");
32 static inline void writeb(uint8_t val
, unsigned long addr
)
34 __asm__
volatile("sync; stbcix %0,0,%1" : : "r" (val
), "r" (addr
) : "memory");
37 static inline void writew(uint16_t val
, unsigned long addr
)
39 __asm__
volatile("sync; sthcix %0,0,%1" : : "r" (val
), "r" (addr
) : "memory");
42 static inline void writel(uint32_t val
, unsigned long addr
)
44 __asm__
volatile("sync; stwcix %0,0,%1" : : "r" (val
), "r" (addr
) : "memory");
47 static inline void writeq(uint64_t val
, unsigned long addr
)
49 __asm__
volatile("sync; stdcix %0,0,%1" : : "r" (val
), "r" (addr
) : "memory");