include/opcode/ChangeLog

   1 2005-06-11  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
   2
   3         * hppa.h (pa_opcodes): Use cM and cX instead of cm and cx,
   4         respectively, in various floating-point load and store patterns.
   5
   6 2005-05-23  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
   7
   8         * hppa.h (FLAG_STRICT): Correct comment.
   9         (pa_opcodes): Update load and store entries to allow both PA 1.X and
  10         PA 2.0 mneumonics when equivalent.  Entries with cache control
  11         completers now require PA 1.1.  Adjust whitespace.
  12
  13 2005-05-19  Anton Blanchard  <anton@samba.org>
  14
  15         * ppc.h (PPC_OPCODE_POWER5): Define.
  16
  17 2005-05-10  Nick Clifton  <nickc@redhat.com>
  18
  19         * Update the address and phone number of the FSF organization in
  20         the GPL notices in the following files:
  21         a29k.h, alpha.h, arc.h, arm.h, avr.h, cgen.h, convex.h, cris.h,
  22         crx.h, d10v.h, d30v.h, dlx.h, h8300.h, hppa.h, i370.h, i386.h,
  23         i860.h, i960.h, m68hc11.h, m68k.h, m88k.h, maxq.h, mips.h, mmix.h,
  24         mn10200.h, mn10300.h, msp430.h, np1.h, ns32k.h, or32.h, pdp11.h,
  25         pj.h, pn.h, ppc.h, pyr.h, s390.h, sparc.h, tic30.h, tic4x.h,
  26         tic54x.h, tic80.h, v850.h, vax.h
  27
  28 2005-05-09  Jan Beulich  <jbeulich@novell.com>
  29
  30         * i386.h (i386_optab): Add ht and hnt.
  31
  32 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
  33
  34         * i386.h: Insert hyphens into selected VIA PadLock extensions.
  35         Add xcrypt-ctr.  Provide aliases without hyphens.
  36
  37 2005-04-13  H.J. Lu  <hongjiu.lu@intel.com>
  38
  39         Moved from ../ChangeLog
  40
  41         2005-04-12  Paul Brook  <paul@codesourcery.com>
  42         * m88k.h: Rename psr macros to avoid conflicts.
  43
  44         2005-03-12  Zack Weinberg  <zack@codesourcery.com>
  45         * arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
  46         Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
  47         and ARM_ARCH_V6ZKT2.
  48
  49         2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
  50         * crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4.
  51         Remove redundant instruction types.
  52         (struct argument): X_op - new field.
  53         (struct cst4_entry): Remove.
  54         (no_op_insn): Declare.
  55
  56         2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
  57         * crx.h (enum argtype): Rename types, remove unused types.
  58
  59         2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
  60         * crx.h (enum reg): Rearrange registers, remove 'ccfg' and `'pc'.
  61         (enum reg_type): Remove CRX_PC_REGTYPE, CRX_MTPR_REGTYPE.
  62         (enum operand_type): Rearrange operands, edit comments.
  63         replace us<N> with ui<N> for unsigned immediate.
  64         replace d<N> with disps<N>/dispu<N>/dispe<N> for signed/unsigned/escaped
  65         displacements (respectively).
  66         replace rbase_ridx_scl2_dispu<N> with rindex_disps<N> for register index.
  67         (instruction type): Add NO_TYPE_INS.
  68         (instruction flags): Add USER_REG, CST4MAP, NO_SP, NO_RPTR.
  69         (operand_entry): New field - 'flags'.
  70         (operand flags): New.
  71
  72         2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
  73         * crx.h (operand_type): Remove redundant types i3, i4,
  74         i5, i8, i12.
  75         Add new unsigned immediate types us3, us4, us5, us16.
  76
  77 2005-04-12  Mark Kettenis  <kettenis@gnu.org>
  78
  79         * i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
  80         adjust them accordingly.
  81
  82 2005-04-01  Jan Beulich  <jbeulich@novell.com>
  83
  84         * i386.h (i386_optab): Add rdtscp.
  85
  86 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
  87
  88         * i386.h (i386_optab): Don't allow the `l' suffix for moving
  89         between memory and segment register. Allow movq for moving between
  90         general-purpose register and segment register.
  91
  92 2005-02-09  Jan Beulich  <jbeulich@novell.com>
  93
  94         PR gas/707
  95         * i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and
  96         FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and
  97         fnstsw.
  98
  99 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 100
 101         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 102         * cgen.h (enum cgen_parse_operand_type): Add
 103         CGEN_PARSE_OPERAND_SYMBOLIC.
 104
 105 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 106
 107         * mips.h: Change INSN_ALIAS to INSN2_ALIAS.
 108         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 109         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 110
 111 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 112
 113         * mips.h (struct mips_opcode): Add new pinfo2 member.
 114         (INSN_ALIAS): New define for opcode table entries that are
 115         specific instances of another entry, such as 'move' for an 'or'
 116         with a zero operand.
 117         (INSN_READ_MDMX_ACC): Redefine from 0 to 0x2.
 118         (INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
 119
 120 2004-12-09  Ian Lance Taylor  <ian@wasabisystems.com>
 121
 122         * mips.h (CPU_RM9000): Define.
 123         (OPCODE_IS_MEMBER): Handle CPU_RM9000.
 124
 125 2004-11-25 Jan Beulich  <jbeulich@novell.com>
 126
 127         * i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
 128         to/from test registers are illegal in 64-bit mode. Add missing
 129         NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
 130         (previously one had to explicitly encode a rex64 prefix). Re-enable
 131         lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
 132         support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
 133
 134 2004-11-23 Jan Beulich  <jbeulich@novell.com>
 135
 136         * i386.h (i386_optab): paddq and psubq, even in their MMX form, are
 137         available only with SSE2. Change the MMX additions introduced by SSE
 138         and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
 139         instructions by their now designated identifier (since combining i686
 140         and 3DNow! does not really imply 3DNow!A).
 141
 142 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 143
 144         * msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes,
 145         struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c.
 146
 147 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 148             Vineet Sharma      <vineets@noida.hcltech.com>
 149
 150         * maxq.h: New file: Disassembly information for the maxq port.
 151
 152 2004-11-05  H.J. Lu  <hongjiu.lu@intel.com>
 153
 154         * i386.h (i386_optab): Put back "movzb".
 155
 156 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 157
 158         * cris.h (enum cris_insn_version_usage): Tweak formatting and
 159         comments.  Remove member cris_ver_sim.  Add members
 160         cris_ver_sim_v0_10, cris_ver_v0_10, cris_ver_v3_10,
 161         cris_ver_v8_10, cris_ver_v10, cris_ver_v10p.
 162         (struct cris_support_reg, struct cris_cond15): New types.
 163         (cris_conds15): Declare.
 164         (JUMP_PC_INCR_OPCODE_V32, BA_DWORD_OPCODE, NOP_OPCODE_COMMON)
 165         (NOP_OPCODE_ZBITS_COMMON, LAPC_DWORD_OPCODE, LAPC_DWORD_Z_BITS)
 166         (NOP_OPCODE_V32, NOP_Z_BITS_V32): New macros.
 167         (NOP_Z_BITS): Define in terms of NOP_OPCODE.
 168         (cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
 169         SIZE_FIELD_UNSIGNED.
 170
 171 2004-11-04 Jan Beulich  <jbeulich@novell.com>
 172
 173         * i386.h (sldx_Suf): Remove.
 174         (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
 175         (q_FP): Define, implying no REX64.
 176         (x_FP, sl_FP): Imply FloatMF.
 177         (i386_optab): Split reg and mem forms of moving from segment registers
 178         so that the memory forms can ignore the 16-/32-bit operand size
 179         distinction. Adjust a few others for Intel mode. Remove *FP uses from
 180         all non-floating-point instructions. Unite 32- and 64-bit forms of
 181         movsx, movzx, and movd. Adjust floating point operations for the above
 182         changes to the *FP macros. Add DefaultSize to floating point control
 183         insns operating on larger memory ranges. Remove left over comments
 184         hinting at certain insns being Intel-syntax ones where the ones
 185         actually meant are already gone.
 186
 187 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 188
 189         * crx.h: Add COPS_REG_INS - Coprocessor Special register
 190         instruction type.
 191
 192 2004-09-30  Paul Brook  <paul@codesourcery.com>
 193
 194         * arm.h (ARM_EXT_V6K, ARM_EXT_V6Z): Define.
 195         (ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6ZK): Define.
 196
 197 2004-09-11  Theodore A. Roth  <troth@openavr.org>
 198
 199         * avr.h: Add support for
 200         atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
 201
 202 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 203
 204         * ppc.h (PPC_OPERAND_OPTIONAL): Fix comment.
 205
 206 2004-08-24  Dmitry Diky  <diwil@spec.ru>
 207
 208         * msp430.h (msp430_opc): Add new instructions.
 209         (msp430_rcodes): Declare new instructions.
 210         (msp430_hcodes): Likewise..
 211
 212 2004-08-13  Nick Clifton  <nickc@redhat.com>
 213
 214         PR/301
 215         * h8300.h (O_JSR): Do not allow VECIND addressing for non-SX
 216         processors.
 217
 218 2004-08-30  Michal Ludvig  <mludvig@suse.cz>
 219
 220         * i386.h (i386_optab): Added montmul/xsha1/xsha256 insns.
 221
 222 2004-07-22  H.J. Lu  <hongjiu.lu@intel.com>
 223
 224         * i386.h (i386_optab): Allow cs/ds in 64bit for branch hints.
 225
 226 2004-07-21  Jan Beulich  <jbeulich@novell.com>
 227
 228         * i386.h: Adjust instruction descriptions to better match the
 229         specification.
 230
 231 2004-07-16  Richard Earnshaw  <rearnsha@arm.com>
 232
 233         * arm.h: Remove all old content.  Replace with architecture defines
 234         from gas/config/tc-arm.c.
 235
 236 2004-07-09  Andreas Schwab  <schwab@suse.de>
 237
 238         * m68k.h: Fix comment.
 239
 240 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 241
 242         * crx.h: New file.
 243
 244 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 245
 246         * i386.h (i386_optab): Remove fildd, fistpd and fisttpd.
 247
 248 2004-05-24  Peter Barada  <peter@the-baradas.com>
 249
 250         * m68k.h: Add 'size' to m68k_opcode.
 251
 252 2004-05-05  Peter Barada  <peter@the-baradas.com>
 253
 254         * m68k.h: Switch from ColdFire chip name to core variant.
 255
 256 2004-04-22  Peter Barada  <peter@the-baradas.com>
 257
 258         * m68k.h: Add mcfmac/mcfemac definitions.  Update operand
 259         descriptions for new EMAC cases.
 260         Remove ColdFire macmw/macml/msacmw/msacmw hacks and properly
 261         handle Motorola MAC syntax.
 262         Allow disassembly of ColdFire V4e object files.
 263
 264 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 265
 266         * ppc.h (PPC_OPERAND_GPR_0): Define.  Bump other operand defines.
 267
 268 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 269
 270         * i386.h (i386_optab): Remove CpuNo64 from sysenter and sysexit.
 271
 272 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 273
 274         * i386.h (i386_optab): Added xstore as an alias for xstorerng.
 275
 276 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 277
 278         * i386.h (i386_optab): Added xstore/xcrypt insns.
 279
 280 2004-02-09  Anil Paranjpe  <anilp1@KPITCummins.com>
 281
 282         * h8300.h (32bit ldc/stc): Add relaxing support.
 283
 284 2004-01-12  Anil Paranjpe  <anilp1@KPITCummins.com>
 285
 286         * h8300.h (BITOP): Pass MEMRELAX flag.
 287
 288 2004-01-09  Anil Paranjpe  <anilp1@KPITCummins.com>
 289
 290         * h8300.h (BITOP): Dissallow operations on @aa:16 and @aa:32
 291         except for the H8S.
 292
 293 For older changes see ChangeLog-9103
 294 \f
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 296 mode: change-log
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