* i386.h: Add intel mode cmpsd and movsd.
[binutils-gdb.git] / include / opcode / ChangeLog
1 2002-04-11 Alan Modra <amodra@bigpond.net.au>
2
3 * i386.h: Add intel mode cmpsd and movsd.
4
5 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
6
7 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
8 instructions.
9 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
10 may be passed along with the ISA bitmask.
11
12 2002-03-05 Paul Koning <pkoning@equallogic.com>
13
14 * pdp11.h: Add format codes for float instruction formats.
15
16 2002-02-25 Alan Modra <amodra@bigpond.net.au>
17
18 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
19
20 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
21
22 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
23
24 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
25
26 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
27 (xchg): Fix.
28 (in, out): Disable 64bit operands.
29 (call, jmp): Avoid REX prefixes.
30 (jcxz): Prohibit in 64bit mode
31 (jrcxz, loop): Add 64bit variants.
32 (movq): Fix patterns.
33 (movmskps, pextrw, pinstrw): Add 64bit variants.
34
35 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
36
37 * or32.h: New file.
38
39 2002-01-22 Graydon Hoare <graydon@redhat.com>
40
41 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
42 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
43
44 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
45
46 * h8300.h: Comment typo fix.
47
48 2002-01-03 matthew green <mrg@redhat.com>
49
50 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
51 (PPC_OPCODE_BOOKE64): Likewise.
52
53 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
54
55 * hppa.h (call, ret): Move to end of table.
56 (addb, addib): PA2.0 variants should have been PA2.0W.
57 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
58 happy.
59 (fldw, fldd, fstw, fstd, bb): Likewise.
60 (short loads/stores): Tweak format specifier slightly to keep
61 disassembler happy.
62 (indexed loads/stores): Likewise.
63 (absolute loads/stores): Likewise.
64
65 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
66
67 * d10v.h (OPERAND_NOSP): New macro.
68
69 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
70
71 * d10v.h (OPERAND_SP): New macro.
72
73 2001-11-15 Alan Modra <amodra@bigpond.net.au>
74
75 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
76
77 2001-11-11 Timothy Wall <twall@alum.mit.edu>
78
79 * tic54x.h: Revise opcode layout; don't really need a separate
80 structure for parallel opcodes.
81
82 2001-11-13 Zack Weinberg <zack@codesourcery.com>
83 Alan Modra <amodra@bigpond.net.au>
84
85 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
86 accept WordReg.
87
88 2001-11-04 Chris Demetriou <cgd@broadcom.com>
89
90 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
91
92 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
93
94 * mmix.h: New file.
95
96 2001-10-18 Chris Demetriou <cgd@broadcom.com>
97
98 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
99 of the expression, to make source code merging easier.
100
101 2001-10-17 Chris Demetriou <cgd@broadcom.com>
102
103 * mips.h: Sort coprocessor instruction argument characters
104 in comment, add a few more words of description for "H".
105
106 2001-10-17 Chris Demetriou <cgd@broadcom.com>
107
108 * mips.h (INSN_SB1): New cpu-specific instruction bit.
109 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
110 if cpu is CPU_SB1.
111
112 2001-10-17 matthew green <mrg@redhat.com>
113
114 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
115
116 2001-10-12 matthew green <mrg@redhat.com>
117
118 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
119 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
120 instructions, respectively.
121
122 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
123
124 * v850.h: Remove spurious comment.
125
126 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
127
128 * h8300.h: Fix compile time warning messages
129
130 2001-09-04 Richard Henderson <rth@redhat.com>
131
132 * alpha.h (struct alpha_operand): Pack elements into bitfields.
133
134 2001-08-31 Eric Christopher <echristo@redhat.com>
135
136 * mips.h: Remove CPU_MIPS32_4K.
137
138 2001-08-27 Torbjorn Granlund <tege@swox.com>
139
140 * ppc.h (PPC_OPERAND_DS): Define.
141
142 2001-08-25 Andreas Jaeger <aj@suse.de>
143
144 * d30v.h: Fix declaration of reg_name_cnt.
145
146 * d10v.h: Fix declaration of d10v_reg_name_cnt.
147
148 * arc.h: Add prototypes from opcodes/arc-opc.c.
149
150 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
151
152 * mips.h (INSN_10000): Define.
153 (OPCODE_IS_MEMBER): Check for INSN_10000.
154
155 2001-08-10 Alan Modra <amodra@one.net.au>
156
157 * ppc.h: Revert 2001-08-08.
158
159 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
160
161 * mips.h (INSN_GP32): Remove.
162 (OPCODE_IS_MEMBER): Remove gp32 parameter.
163 (M_MOVE): New macro identifier.
164
165 2001-08-08 Alan Modra <amodra@one.net.au>
166
167 1999-10-25 Torbjorn Granlund <tege@swox.com>
168 * ppc.h (struct powerpc_operand): New field `reloc'.
169
170 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
171
172 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
173
174 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
175
176 * cgen.h (CGEN_INSN): Add regex support.
177 (build_insn_regex): Declare.
178
179 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
180
181 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
182 (cgen_cpu_desc): Ditto.
183
184 2001-07-07 Ben Elliston <bje@redhat.com>
185
186 * m88k.h: Clean up and reformat. Remove unused code.
187
188 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
189
190 * cgen.h (cgen_keyword): Add nonalpha_chars field.
191
192 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
193
194 * mips.h (CPU_R12000): Define.
195
196 2001-05-23 John Healy <jhealy@redhat.com>
197
198 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
199
200 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
201
202 * mips.h (INSN_ISA_MASK): Define.
203
204 2001-05-12 Alan Modra <amodra@one.net.au>
205
206 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
207 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
208 and use InvMem as these insns must have register operands.
209
210 2001-05-04 Alan Modra <amodra@one.net.au>
211
212 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
213 and pextrw to swap reg/rm assignments.
214
215 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
216
217 * cris.h (enum cris_insn_version_usage): Correct comment for
218 cris_ver_v3p.
219
220 2001-03-24 Alan Modra <alan@linuxcare.com.au>
221
222 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
223 Add InvMem to first operand of "maskmovdqu".
224
225 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
226
227 * cris.h (ADD_PC_INCR_OPCODE): New macro.
228
229 2001-03-21 Kazu Hirata <kazu@hxi.com>
230
231 * h8300.h: Fix formatting.
232
233 2001-03-22 Alan Modra <alan@linuxcare.com.au>
234
235 * i386.h (i386_optab): Add paddq, psubq.
236
237 2001-03-19 Alan Modra <alan@linuxcare.com.au>
238
239 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
240
241 2001-02-28 Igor Shevlyakov <igor@windriver.com>
242
243 * m68k.h: new defines for Coldfire V4. Update mcf to know
244 about mcf5407.
245
246 2001-02-18 lars brinkhoff <lars@nocrew.org>
247
248 * pdp11.h: New file.
249
250 2001-02-12 Jan Hubicka <jh@suse.cz>
251
252 * i386.h (i386_optab): SSE integer converison instructions have
253 64bit versions on x86-64.
254
255 2001-02-10 Nick Clifton <nickc@redhat.com>
256
257 * mips.h: Remove extraneous whitespace. Formating change to allow
258 for future contribution.
259
260 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
261
262 * s390.h: New file.
263
264 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
265
266 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
267 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
268 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
269
270 2001-01-24 Karsten Keil <kkeil@suse.de>
271
272 * i386.h (i386_optab): Fix swapgs
273
274 2001-01-14 Alan Modra <alan@linuxcare.com.au>
275
276 * hppa.h: Describe new '<' and '>' operand types, and tidy
277 existing comments.
278 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
279 Remove duplicate "ldw j(s,b),x". Sort some entries.
280
281 2001-01-13 Jan Hubicka <jh@suse.cz>
282
283 * i386.h (i386_optab): Fix pusha and ret templates.
284
285 2001-01-11 Peter Targett <peter.targett@arccores.com>
286
287 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
288 definitions for masking cpu type.
289 (arc_ext_operand_value) New structure for storing extended
290 operands.
291 (ARC_OPERAND_*) Flags for operand values.
292
293 2001-01-10 Jan Hubicka <jh@suse.cz>
294
295 * i386.h (pinsrw): Add.
296 (pshufw): Remove.
297 (cvttpd2dq): Fix operands.
298 (cvttps2dq): Likewise.
299 (movq2q): Rename to movdq2q.
300
301 2001-01-10 Richard Schaal <richard.schaal@intel.com>
302
303 * i386.h: Correct movnti instruction.
304
305 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
306
307 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
308 of operands (unsigned char or unsigned short).
309 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
310 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
311
312 2001-01-05 Jan Hubicka <jh@suse.cz>
313
314 * i386.h (i386_optab): Make [sml]fence template to use immext field.
315
316 2001-01-03 Jan Hubicka <jh@suse.cz>
317
318 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
319 introduced by Pentium4
320
321 2000-12-30 Jan Hubicka <jh@suse.cz>
322
323 * i386.h (i386_optab): Add "rex*" instructions;
324 add swapgs; disable jmp/call far direct instructions for
325 64bit mode; add syscall and sysret; disable registers for 0xc6
326 template. Add 'q' suffixes to extendable instructions, disable
327 obsolete instructions, add new sign/zero extension ones.
328 (i386_regtab): Add extended registers.
329 (*Suf): Add No_qSuf.
330 (q_Suf, wlq_Suf, bwlq_Suf): New.
331
332 2000-12-20 Jan Hubicka <jh@suse.cz>
333
334 * i386.h (i386_optab): Replace "Imm" with "EncImm".
335 (i386_regtab): Add flags field.
336
337 2000-12-12 Nick Clifton <nickc@redhat.com>
338
339 * mips.h: Fix formatting.
340
341 2000-12-01 Chris Demetriou <cgd@sibyte.com>
342
343 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
344 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
345 OP_*_SYSCALL definitions.
346 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
347 19 bit wait codes.
348 (MIPS operand specifier comments): Remove 'm', add 'U' and
349 'J', and update the meaning of 'B' so that it's more general.
350
351 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
352 INSN_ISA5): Renumber, redefine to mean the ISA at which the
353 instruction was added.
354 (INSN_ISA32): New constant.
355 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
356 Renumber to avoid new and/or renumbered INSN_* constants.
357 (INSN_MIPS32): Delete.
358 (ISA_UNKNOWN): New constant to indicate unknown ISA.
359 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
360 ISA_MIPS32): New constants, defined to be the mask of INSN_*
361 constants available at that ISA level.
362 (CPU_UNKNOWN): New constant to indicate unknown CPU.
363 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
364 define it with a unique value.
365 (OPCODE_IS_MEMBER): Update for new ISA membership-related
366 constant meanings.
367
368 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
369 definitions.
370
371 * mips.h (CPU_SB1): New constant.
372
373 2000-10-20 Jakub Jelinek <jakub@redhat.com>
374
375 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
376 Note that '3' is used for siam operand.
377
378 2000-09-22 Jim Wilson <wilson@cygnus.com>
379
380 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
381
382 2000-09-13 Anders Norlander <anorland@acc.umu.se>
383
384 * mips.h: Use defines instead of hard-coded processor numbers.
385 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
386 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
387 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
388 CPU_4KC, CPU_4KM, CPU_4KP): Define..
389 (OPCODE_IS_MEMBER): Use new defines.
390 (OP_MASK_SEL, OP_SH_SEL): Define.
391 (OP_MASK_CODE20, OP_SH_CODE20): Define.
392 Add 'P' to used characters.
393 Use 'H' for coprocessor select field.
394 Use 'm' for 20 bit breakpoint code.
395 Document new arg characters and add to used characters.
396 (INSN_MIPS32): New define for MIPS32 extensions.
397 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
398
399 2000-09-05 Alan Modra <alan@linuxcare.com.au>
400
401 * hppa.h: Mention cz completer.
402
403 2000-08-16 Jim Wilson <wilson@cygnus.com>
404
405 * ia64.h (IA64_OPCODE_POSTINC): New.
406
407 2000-08-15 H.J. Lu <hjl@gnu.org>
408
409 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
410 IgnoreSize change.
411
412 2000-08-08 Jason Eckhardt <jle@cygnus.com>
413
414 * i860.h: Small formatting adjustments.
415
416 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
417
418 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
419 Move related opcodes closer to each other.
420 Minor changes in comments, list undefined opcodes.
421
422 2000-07-26 Dave Brolley <brolley@redhat.com>
423
424 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
425
426 2000-07-22 Jason Eckhardt <jle@cygnus.com>
427
428 * i860.h (btne, bte, bla): Changed these opcodes
429 to use sbroff ('r') instead of split16 ('s').
430 (J, K, L, M): New operand types for 16-bit aligned fields.
431 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
432 use I, J, K, L, M instead of just I.
433 (T, U): New operand types for split 16-bit aligned fields.
434 (st.x): Changed these opcodes to use S, T, U instead of just S.
435 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
436 exist on the i860.
437 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
438 (pfeq.ss, pfeq.dd): New opcodes.
439 (st.s): Fixed incorrect mask bits.
440 (fmlow): Fixed incorrect mask bits.
441 (fzchkl, pfzchkl): Fixed incorrect mask bits.
442 (faddz, pfaddz): Fixed incorrect mask bits.
443 (form, pform): Fixed incorrect mask bits.
444 (pfld.l): Fixed incorrect mask bits.
445 (fst.q): Fixed incorrect mask bits.
446 (all floating point opcodes): Fixed incorrect mask bits for
447 handling of dual bit.
448
449 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
450
451 cris.h: New file.
452
453 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
454
455 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
456 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
457 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
458 (AVR_ISA_M83): Define for ATmega83, ATmega85.
459 (espm): Remove, because ESPM removed in databook update.
460 (eicall, eijmp): Move to the end of opcode table.
461
462 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
463
464 * m68hc11.h: New file for support of Motorola 68hc11.
465
466 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
467
468 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
469
470 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
471
472 * avr.h: New file with AVR opcodes.
473
474 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
475
476 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
477
478 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
479
480 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
481
482 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
483
484 * i386.h: Use sl_FP, not sl_Suf for fild.
485
486 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
487
488 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
489 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
490 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
491 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
492
493 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
494
495 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
496
497 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
498 Alexander Sokolov <robocop@netlink.ru>
499
500 * i386.h (i386_optab): Add cpu_flags for all instructions.
501
502 2000-05-13 Alan Modra <alan@linuxcare.com.au>
503
504 From Gavin Romig-Koch <gavin@cygnus.com>
505 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
506
507 2000-05-04 Timothy Wall <twall@cygnus.com>
508
509 * tic54x.h: New.
510
511 2000-05-03 J.T. Conklin <jtc@redback.com>
512
513 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
514 (PPC_OPERAND_VR): New operand flag for vector registers.
515
516 2000-05-01 Kazu Hirata <kazu@hxi.com>
517
518 * h8300.h (EOP): Add missing initializer.
519
520 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
521
522 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
523 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
524 New operand types l,y,&,fe,fE,fx added to support above forms.
525 (pa_opcodes): Replaced usage of 'x' as source/target for
526 floating point double-word loads/stores with 'fx'.
527
528 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
529 David Mosberger <davidm@hpl.hp.com>
530 Timothy Wall <twall@cygnus.com>
531 Jim Wilson <wilson@cygnus.com>
532
533 * ia64.h: New file.
534
535 2000-03-27 Nick Clifton <nickc@cygnus.com>
536
537 * d30v.h (SHORT_A1): Fix value.
538 (SHORT_AR): Renumber so that it is at the end of the list of short
539 instructions, not the end of the list of long instructions.
540
541 2000-03-26 Alan Modra <alan@linuxcare.com>
542
543 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
544 problem isn't really specific to Unixware.
545 (OLDGCC_COMPAT): Define.
546 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
547 destination %st(0).
548 Fix lots of comments.
549
550 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
551
552 * d30v.h:
553 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
554 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
555 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
556 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
557 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
558 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
559 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
560
561 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
562
563 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
564 fistpd without suffix.
565
566 2000-02-24 Nick Clifton <nickc@cygnus.com>
567
568 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
569 'signed_overflow_ok_p'.
570 Delete prototypes for cgen_set_flags() and cgen_get_flags().
571
572 2000-02-24 Andrew Haley <aph@cygnus.com>
573
574 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
575 (CGEN_CPU_TABLE): flags: new field.
576 Add prototypes for new functions.
577
578 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
579
580 * i386.h: Add some more UNIXWARE_COMPAT comments.
581
582 2000-02-23 Linas Vepstas <linas@linas.org>
583
584 * i370.h: New file.
585
586 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
587
588 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
589 cannot be combined in parallel with ADD/SUBppp.
590
591 2000-02-22 Andrew Haley <aph@cygnus.com>
592
593 * mips.h: (OPCODE_IS_MEMBER): Add comment.
594
595 1999-12-30 Andrew Haley <aph@cygnus.com>
596
597 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
598 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
599 insns.
600
601 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
602
603 * i386.h: Qualify intel mode far call and jmp with x_Suf.
604
605 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
606
607 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
608 indirect jumps and calls. Add FF/3 call for intel mode.
609
610 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
611
612 * mn10300.h: Add new operand types. Add new instruction formats.
613
614 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
615
616 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
617 instruction.
618
619 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
620
621 * mips.h (INSN_ISA5): New.
622
623 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
624
625 * mips.h (OPCODE_IS_MEMBER): New.
626
627 1999-10-29 Nick Clifton <nickc@cygnus.com>
628
629 * d30v.h (SHORT_AR): Define.
630
631 1999-10-18 Michael Meissner <meissner@cygnus.com>
632
633 * alpha.h (alpha_num_opcodes): Convert to unsigned.
634 (alpha_num_operands): Ditto.
635
636 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
637
638 * hppa.h (pa_opcodes): Add load and store cache control to
639 instructions. Add ordered access load and store.
640
641 * hppa.h (pa_opcode): Add new entries for addb and addib.
642
643 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
644
645 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
646
647 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
648
649 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
650
651 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
652
653 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
654 and "be" using completer prefixes.
655
656 * hppa.h (pa_opcodes): Add initializers to silence compiler.
657
658 * hppa.h: Update comments about character usage.
659
660 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
661
662 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
663 up the new fstw & bve instructions.
664
665 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
666
667 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
668 instructions.
669
670 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
671
672 * hppa.h (pa_opcodes): Add long offset double word load/store
673 instructions.
674
675 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
676 stores.
677
678 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
679
680 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
681
682 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
683
684 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
685
686 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
687
688 * hppa.h (pa_opcodes): Add support for "b,l".
689
690 * hppa.h (pa_opcodes): Add support for "b,gate".
691
692 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
693
694 * hppa.h (pa_opcodes): Use 'fX' for first register operand
695 in xmpyu.
696
697 * hppa.h (pa_opcodes): Fix mask for probe and probei.
698
699 * hppa.h (pa_opcodes): Fix mask for depwi.
700
701 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
702
703 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
704 an explicit output argument.
705
706 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
707
708 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
709 Add a few PA2.0 loads and store variants.
710
711 1999-09-04 Steve Chamberlain <sac@pobox.com>
712
713 * pj.h: New file.
714
715 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
716
717 * i386.h (i386_regtab): Move %st to top of table, and split off
718 other fp reg entries.
719 (i386_float_regtab): To here.
720
721 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
722
723 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
724 by 'f'.
725
726 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
727 Add supporting args.
728
729 * hppa.h: Document new completers and args.
730 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
731 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
732 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
733 pmenb and pmdis.
734
735 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
736 hshr, hsub, mixh, mixw, permh.
737
738 * hppa.h (pa_opcodes): Change completers in instructions to
739 use 'c' prefix.
740
741 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
742 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
743
744 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
745 fnegabs to use 'I' instead of 'F'.
746
747 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
748
749 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
750 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
751 Alphabetically sort PIII insns.
752
753 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
754
755 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
756
757 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
758
759 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
760 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
761
762 * hppa.h: Document 64 bit condition completers.
763
764 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
765
766 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
767
768 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
769
770 * i386.h (i386_optab): Add DefaultSize modifier to all insns
771 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
772 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
773
774 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
775 Jeff Law <law@cygnus.com>
776
777 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
778
779 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
780
781 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
782 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
783
784 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
785
786 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
787
788 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
789
790 * hppa.h (struct pa_opcode): Add new field "flags".
791 (FLAGS_STRICT): Define.
792
793 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
794 Jeff Law <law@cygnus.com>
795
796 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
797
798 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
799
800 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
801
802 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
803 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
804 flag to fcomi and friends.
805
806 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
807
808 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
809 integer logical instructions.
810
811 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
812
813 * m68k.h: Document new formats `E', `G', `H' and new places `N',
814 `n', `o'.
815
816 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
817 and new places `m', `M', `h'.
818
819 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
820
821 * hppa.h (pa_opcodes): Add several processor specific system
822 instructions.
823
824 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
825
826 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
827 "addb", and "addib" to be used by the disassembler.
828
829 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
830
831 * i386.h (ReverseModrm): Remove all occurences.
832 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
833 movmskps, pextrw, pmovmskb, maskmovq.
834 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
835 ignore the data size prefix.
836
837 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
838 Mostly stolen from Doug Ledford <dledford@redhat.com>
839
840 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
841
842 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
843
844 1999-04-14 Doug Evans <devans@casey.cygnus.com>
845
846 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
847 (CGEN_ATTR_TYPE): Update.
848 (CGEN_ATTR_MASK): Number booleans starting at 0.
849 (CGEN_ATTR_VALUE): Update.
850 (CGEN_INSN_ATTR): Update.
851
852 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
853
854 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
855 instructions.
856
857 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
858
859 * hppa.h (bb, bvb): Tweak opcode/mask.
860
861
862 1999-03-22 Doug Evans <devans@casey.cygnus.com>
863
864 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
865 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
866 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
867 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
868 Delete member max_insn_size.
869 (enum cgen_cpu_open_arg): New enum.
870 (cpu_open): Update prototype.
871 (cpu_open_1): Declare.
872 (cgen_set_cpu): Delete.
873
874 1999-03-11 Doug Evans <devans@casey.cygnus.com>
875
876 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
877 (CGEN_OPERAND_NIL): New macro.
878 (CGEN_OPERAND): New member `type'.
879 (@arch@_cgen_operand_table): Delete decl.
880 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
881 (CGEN_OPERAND_TABLE): New struct.
882 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
883 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
884 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
885 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
886 {get,set}_{int,vma}_operand.
887 (@arch@_cgen_cpu_open): New arg `isa'.
888 (cgen_set_cpu): Ditto.
889
890 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
891
892 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
893
894 1999-02-25 Doug Evans <devans@casey.cygnus.com>
895
896 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
897 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
898 enum cgen_hw_type.
899 (CGEN_HW_TABLE): New struct.
900 (hw_table): Delete declaration.
901 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
902 to table entry to enum.
903 (CGEN_OPINST): Ditto.
904 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
905
906 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
907
908 * alpha.h (AXP_OPCODE_EV6): New.
909 (AXP_OPCODE_NOPAL): Include it.
910
911 1999-02-09 Doug Evans <devans@casey.cygnus.com>
912
913 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
914 All uses updated. New members int_insn_p, max_insn_size,
915 parse_operand,insert_operand,extract_operand,print_operand,
916 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
917 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
918 extract_handlers,print_handlers.
919 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
920 (CGEN_ATTR_BOOL_OFFSET): New macro.
921 (CGEN_ATTR_MASK): Subtract it to compute bit number.
922 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
923 (cgen_opcode_handler): Renamed from cgen_base.
924 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
925 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
926 all uses updated.
927 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
928 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
929 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
930 (CGEN_OPCODE,CGEN_IBASE): New types.
931 (CGEN_INSN): Rewrite.
932 (CGEN_{ASM,DIS}_HASH*): Delete.
933 (init_opcode_table,init_ibld_table): Declare.
934 (CGEN_INSN_ATTR): New type.
935
936 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
937
938 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
939 (x_FP, d_FP, dls_FP, sldx_FP): Define.
940 Change *Suf definitions to include x and d suffixes.
941 (movsx): Use w_Suf and b_Suf.
942 (movzx): Likewise.
943 (movs): Use bwld_Suf.
944 (fld): Change ordering. Use sld_FP.
945 (fild): Add Intel Syntax equivalent of fildq.
946 (fst): Use sld_FP.
947 (fist): Use sld_FP.
948 (fstp): Use sld_FP. Add x_FP version.
949 (fistp): LLongMem version for Intel Syntax.
950 (fcom, fcomp): Use sld_FP.
951 (fadd, fiadd, fsub): Use sld_FP.
952 (fsubr): Use sld_FP.
953 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
954
955 1999-01-27 Doug Evans <devans@casey.cygnus.com>
956
957 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
958 CGEN_MODE_UINT.
959
960 1999-01-16 Jeffrey A Law (law@cygnus.com)
961
962 * hppa.h (bv): Fix mask.
963
964 1999-01-05 Doug Evans <devans@casey.cygnus.com>
965
966 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
967 (CGEN_ATTR): Use it.
968 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
969 (CGEN_ATTR_TABLE): New member dfault.
970
971 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
972
973 * mips.h (MIPS16_INSN_BRANCH): New.
974
975 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
976
977 The following is part of a change made by Edith Epstein
978 <eepstein@sophia.cygnus.com> as part of a project to merge in
979 changes by HP; HP did not create ChangeLog entries.
980
981 * hppa.h (completer_chars): list of chars to not put a space
982 after.
983
984 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
985
986 * i386.h (i386_optab): Permit w suffix on processor control and
987 status word instructions.
988
989 1998-11-30 Doug Evans <devans@casey.cygnus.com>
990
991 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
992 (struct cgen_keyword_entry): Ditto.
993 (struct cgen_operand): Ditto.
994 (CGEN_IFLD): New typedef, with associated access macros.
995 (CGEN_IFMT): New typedef, with associated access macros.
996 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
997 (CGEN_IVALUE): New typedef.
998 (struct cgen_insn): Delete const on syntax,attrs members.
999 `format' now points to format data. Type of `value' is now
1000 CGEN_IVALUE.
1001 (struct cgen_opcode_table): New member ifld_table.
1002
1003 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1004
1005 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1006 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1007 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1008 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1009 (cgen_opcode_table): Update type of dis_hash fn.
1010 (extract_operand): Update type of `insn_value' arg.
1011
1012 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1013
1014 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1015
1016 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1017
1018 * mips.h (INSN_MULT): Added.
1019
1020 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1021
1022 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1023
1024 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1025
1026 * cgen.h (CGEN_INSN_INT): New typedef.
1027 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1028 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1029 (CGEN_INSN_BYTES_PTR): New typedef.
1030 (CGEN_EXTRACT_INFO): New typedef.
1031 (cgen_insert_fn,cgen_extract_fn): Update.
1032 (cgen_opcode_table): New member `insn_endian'.
1033 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1034 (insert_operand,extract_operand): Update.
1035 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1036
1037 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1038
1039 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1040 (struct CGEN_HW_ENTRY): New member `attrs'.
1041 (CGEN_HW_ATTR): New macro.
1042 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1043 (CGEN_INSN_INVALID_P): New macro.
1044
1045 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1046
1047 * hppa.h: Add "fid".
1048
1049 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1050
1051 From Robert Andrew Dale <rob@nb.net>
1052 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1053 (AMD_3DNOW_OPCODE): Define.
1054
1055 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1056
1057 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1058
1059 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1060
1061 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1062
1063 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1064
1065 Move all global state data into opcode table struct, and treat
1066 opcode table as something that is "opened/closed".
1067 * cgen.h (CGEN_OPCODE_DESC): New type.
1068 (all fns): New first arg of opcode table descriptor.
1069 (cgen_set_parse_operand_fn): Add prototype.
1070 (cgen_current_machine,cgen_current_endian): Delete.
1071 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1072 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1073 dis_hash_table,dis_hash_table_entries.
1074 (opcode_open,opcode_close): Add prototypes.
1075
1076 * cgen.h (cgen_insn): New element `cdx'.
1077
1078 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1079
1080 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1081
1082 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1083
1084 * mn10300.h: Add "no_match_operands" field for instructions.
1085 (MN10300_MAX_OPERANDS): Define.
1086
1087 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1088
1089 * cgen.h (cgen_macro_insn_count): Declare.
1090
1091 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1092
1093 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1094 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1095 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1096 set_{int,vma}_operand.
1097
1098 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1099
1100 * mn10300.h: Add "machine" field for instructions.
1101 (MN103, AM30): Define machine types.
1102
1103 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1104
1105 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1106
1107 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1108
1109 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1110
1111 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1112
1113 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1114 and ud2b.
1115 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1116 those that happen to be implemented on pentiums.
1117
1118 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1119
1120 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1121 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1122 with Size16|IgnoreSize or Size32|IgnoreSize.
1123
1124 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1125
1126 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1127 (REPE): Rename to REPE_PREFIX_OPCODE.
1128 (i386_regtab_end): Remove.
1129 (i386_prefixtab, i386_prefixtab_end): Remove.
1130 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1131 of md_begin.
1132 (MAX_OPCODE_SIZE): Define.
1133 (i386_optab_end): Remove.
1134 (sl_Suf): Define.
1135 (sl_FP): Use sl_Suf.
1136
1137 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1138 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1139 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1140 data32, dword, and adword prefixes.
1141 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1142 regs.
1143
1144 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1145
1146 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1147
1148 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1149 register operands, because this is a common idiom. Flag them with
1150 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1151 fdivrp because gcc erroneously generates them. Also flag with a
1152 warning.
1153
1154 * i386.h: Add suffix modifiers to most insns, and tighter operand
1155 checks in some cases. Fix a number of UnixWare compatibility
1156 issues with float insns. Merge some floating point opcodes, using
1157 new FloatMF modifier.
1158 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1159 consistency.
1160
1161 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1162 IgnoreDataSize where appropriate.
1163
1164 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1165
1166 * i386.h: (one_byte_segment_defaults): Remove.
1167 (two_byte_segment_defaults): Remove.
1168 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1169
1170 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1171
1172 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1173 (cgen_hw_lookup_by_num): Declare.
1174
1175 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1176
1177 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1178 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1179
1180 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1181
1182 * cgen.h (cgen_asm_init_parse): Delete.
1183 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1184 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1185
1186 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1187
1188 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1189 (cgen_asm_finish_insn): Update prototype.
1190 (cgen_insn): New members num, data.
1191 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1192 dis_hash, dis_hash_table_size moved to ...
1193 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1194 All uses updated. New members asm_hash_p, dis_hash_p.
1195 (CGEN_MINSN_EXPANSION): New struct.
1196 (cgen_expand_macro_insn): Declare.
1197 (cgen_macro_insn_count): Declare.
1198 (get_insn_operands): Update prototype.
1199 (lookup_get_insn_operands): Declare.
1200
1201 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1202
1203 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1204 regKludge. Add operands types for string instructions.
1205
1206 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1207
1208 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1209 table.
1210
1211 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1212
1213 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1214 for `gettext'.
1215
1216 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1217
1218 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1219 Add IsString flag to string instructions.
1220 (IS_STRING): Don't define.
1221 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1222 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1223 (SS_PREFIX_OPCODE): Define.
1224
1225 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1226
1227 * i386.h: Revert March 24 patch; no more LinearAddress.
1228
1229 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1230
1231 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1232 instructions, and instead add FWait opcode modifier. Add short
1233 form of fldenv and fstenv.
1234 (FWAIT_OPCODE): Define.
1235
1236 * i386.h (i386_optab): Change second operand constraint of `mov
1237 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1238 allow legal instructions such as `movl %gs,%esi'
1239
1240 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1241
1242 * h8300.h: Various changes to fully bracket initializers.
1243
1244 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1245
1246 * i386.h: Set LinearAddress for lidt and lgdt.
1247
1248 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1249
1250 * cgen.h (CGEN_BOOL_ATTR): New macro.
1251
1252 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1253
1254 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1255
1256 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1257
1258 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1259 (cgen_insn): Record syntax and format entries here, rather than
1260 separately.
1261
1262 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1263
1264 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1265
1266 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1267
1268 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1269 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1270 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1271
1272 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1273
1274 * cgen.h (lookup_insn): New argument alias_p.
1275
1276 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1277
1278 Fix rac to accept only a0:
1279 * d10v.h (OPERAND_ACC): Split into:
1280 (OPERAND_ACC0, OPERAND_ACC1) .
1281 (OPERAND_GPR): Define.
1282
1283 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1284
1285 * cgen.h (CGEN_FIELDS): Define here.
1286 (CGEN_HW_ENTRY): New member `type'.
1287 (hw_list): Delete decl.
1288 (enum cgen_mode): Declare.
1289 (CGEN_OPERAND): New member `hw'.
1290 (enum cgen_operand_instance_type): Declare.
1291 (CGEN_OPERAND_INSTANCE): New type.
1292 (CGEN_INSN): New member `operands'.
1293 (CGEN_OPCODE_DATA): Make hw_list const.
1294 (get_insn_operands,lookup_insn): Add prototypes for.
1295
1296 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1297
1298 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1299 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1300 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1301 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1302
1303 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1304
1305 * cgen.h: Correct typo in comment end marker.
1306
1307 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1308
1309 * tic30.h: New file.
1310
1311 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1312
1313 * cgen.h: Add prototypes for cgen_save_fixups(),
1314 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1315 of cgen_asm_finish_insn() to return a char *.
1316
1317 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1318
1319 * cgen.h: Formatting changes to improve readability.
1320
1321 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1322
1323 * cgen.h (*): Clean up pass over `struct foo' usage.
1324 (CGEN_ATTR): Make unsigned char.
1325 (CGEN_ATTR_TYPE): Update.
1326 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1327 (cgen_base): Move member `attrs' to cgen_insn.
1328 (CGEN_KEYWORD): New member `null_entry'.
1329 (CGEN_{SYNTAX,FORMAT}): New types.
1330 (cgen_insn): Format and syntax separated from each other.
1331
1332 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1333
1334 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1335 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1336 flags_{used,set} long.
1337 (d30v_operand): Make flags field long.
1338
1339 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1340
1341 * m68k.h: Fix comment describing operand types.
1342
1343 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1344
1345 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1346 everything else after down.
1347
1348 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1349
1350 * d10v.h (OPERAND_FLAG): Split into:
1351 (OPERAND_FFLAG, OPERAND_CFLAG) .
1352
1353 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1354
1355 * mips.h (struct mips_opcode): Changed comments to reflect new
1356 field usage.
1357
1358 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1359
1360 * mips.h: Added to comments a quick-ref list of all assigned
1361 operand type characters.
1362 (OP_{MASK,SH}_PERFREG): New macros.
1363
1364 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1365
1366 * sparc.h: Add '_' and '/' for v9a asr's.
1367 Patch from David Miller <davem@vger.rutgers.edu>
1368
1369 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1370
1371 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1372 area are not available in the base model (H8/300).
1373
1374 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1375
1376 * m68k.h: Remove documentation of ` operand specifier.
1377
1378 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1379
1380 * m68k.h: Document q and v operand specifiers.
1381
1382 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1383
1384 * v850.h (struct v850_opcode): Add processors field.
1385 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1386 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1387 (PROCESSOR_V850EA): New bit constants.
1388
1389 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1390
1391 Merge changes from Martin Hunt:
1392
1393 * d30v.h: Allow up to 64 control registers. Add
1394 SHORT_A5S format.
1395
1396 * d30v.h (LONG_Db): New form for delayed branches.
1397
1398 * d30v.h: (LONG_Db): New form for repeati.
1399
1400 * d30v.h (SHORT_D2B): New form.
1401
1402 * d30v.h (SHORT_A2): New form.
1403
1404 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1405 registers are used. Needed for VLIW optimization.
1406
1407 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1408
1409 * cgen.h: Move assembler interface section
1410 up so cgen_parse_operand_result is defined for cgen_parse_address.
1411 (cgen_parse_address): Update prototype.
1412
1413 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1414
1415 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1416
1417 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1418
1419 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1420 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1421 <paubert@iram.es>.
1422
1423 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1424 <paubert@iram.es>.
1425
1426 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1427 <paubert@iram.es>.
1428
1429 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1430 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1431
1432 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1433
1434 * v850.h (V850_NOT_R0): New flag.
1435
1436 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1437
1438 * v850.h (struct v850_opcode): Remove flags field.
1439
1440 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1441
1442 * v850.h (struct v850_opcode): Add flags field.
1443 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1444 fields.
1445 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1446 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1447
1448 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1449
1450 * arc.h: New file.
1451
1452 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1453
1454 * sparc.h (sparc_opcodes): Declare as const.
1455
1456 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1457
1458 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1459 uses single or double precision floating point resources.
1460 (INSN_NO_ISA, INSN_ISA1): Define.
1461 (cpu specific INSN macros): Tweak into bitmasks outside the range
1462 of INSN_ISA field.
1463
1464 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1465
1466 * i386.h: Fix pand opcode.
1467
1468 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1469
1470 * mips.h: Widen INSN_ISA and move it to a more convenient
1471 bit position. Add INSN_3900.
1472
1473 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1474
1475 * mips.h (struct mips_opcode): added new field membership.
1476
1477 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1478
1479 * i386.h (movd): only Reg32 is allowed.
1480
1481 * i386.h: add fcomp and ud2. From Wayne Scott
1482 <wscott@ichips.intel.com>.
1483
1484 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1485
1486 * i386.h: Add MMX instructions.
1487
1488 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1489
1490 * i386.h: Remove W modifier from conditional move instructions.
1491
1492 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1493
1494 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1495 with no arguments to match that generated by the UnixWare
1496 assembler.
1497
1498 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1499
1500 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1501 (cgen_parse_operand_fn): Declare.
1502 (cgen_init_parse_operand): Declare.
1503 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1504 new argument `want'.
1505 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1506 (enum cgen_parse_operand_type): New enum.
1507
1508 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1509
1510 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1511
1512 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1513
1514 * cgen.h: New file.
1515
1516 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1517
1518 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1519 fdivrp.
1520
1521 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1522
1523 * v850.h (extract): Make unsigned.
1524
1525 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1526
1527 * i386.h: Add iclr.
1528
1529 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1530
1531 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1532 take a direction bit.
1533
1534 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1535
1536 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1537
1538 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1539
1540 * sparc.h: Include <ansidecl.h>. Update function declarations to
1541 use prototypes, and to use const when appropriate.
1542
1543 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1544
1545 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1546
1547 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1548
1549 * d10v.h: Change pre_defined_registers to
1550 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1551
1552 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1553
1554 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1555 Change mips_opcodes from const array to a pointer,
1556 and change bfd_mips_num_opcodes from const int to int,
1557 so that we can increase the size of the mips opcodes table
1558 dynamically.
1559
1560 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1561
1562 * d30v.h (FLAG_X): Remove unused flag.
1563
1564 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1565
1566 * d30v.h: New file.
1567
1568 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1569
1570 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1571 (PDS_VALUE): Macro to access value field of predefined symbols.
1572 (tic80_next_predefined_symbol): Add prototype.
1573
1574 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1575
1576 * tic80.h (tic80_symbol_to_value): Change prototype to match
1577 change in function, added class parameter.
1578
1579 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1580
1581 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1582 endmask fields, which are somewhat weird in that 0 and 32 are
1583 treated exactly the same.
1584
1585 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1586
1587 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1588 rather than a constant that is 2**X. Reorder them to put bits for
1589 operands that have symbolic names in the upper bits, so they can
1590 be packed into an int where the lower bits contain the value that
1591 corresponds to that symbolic name.
1592 (predefined_symbo): Add struct.
1593 (tic80_predefined_symbols): Declare array of translations.
1594 (tic80_num_predefined_symbols): Declare size of that array.
1595 (tic80_value_to_symbol): Declare function.
1596 (tic80_symbol_to_value): Declare function.
1597
1598 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1599
1600 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1601
1602 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1603
1604 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1605 be the destination register.
1606
1607 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1608
1609 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1610 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1611 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1612 that the opcode can have two vector instructions in a single
1613 32 bit word and we have to encode/decode both.
1614
1615 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1616
1617 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1618 TIC80_OPERAND_RELATIVE for PC relative.
1619 (TIC80_OPERAND_BASEREL): New flag bit for register
1620 base relative.
1621
1622 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1623
1624 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1625
1626 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1627
1628 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1629 ":s" modifier for scaling.
1630
1631 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1632
1633 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1634 (TIC80_OPERAND_M_LI): Ditto
1635
1636 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1637
1638 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1639 (TIC80_OPERAND_CC): New define for condition code operand.
1640 (TIC80_OPERAND_CR): New define for control register operand.
1641
1642 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1643
1644 * tic80.h (struct tic80_opcode): Name changed.
1645 (struct tic80_opcode): Remove format field.
1646 (struct tic80_operand): Add insertion and extraction functions.
1647 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1648 correct ones.
1649 (FMT_*): Ditto.
1650
1651 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1652
1653 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1654 type IV instruction offsets.
1655
1656 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1657
1658 * tic80.h: New file.
1659
1660 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1661
1662 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1663
1664 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1665
1666 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1667 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1668 * v850.h: Fix comment, v850_operand not powerpc_operand.
1669
1670 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1671
1672 * mn10200.h: Flesh out structures and definitions needed by
1673 the mn10200 assembler & disassembler.
1674
1675 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1676
1677 * mips.h: Add mips16 definitions.
1678
1679 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1680
1681 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1682
1683 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1684
1685 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1686 (MN10300_OPERAND_MEMADDR): Define.
1687
1688 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1689
1690 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1691
1692 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1693
1694 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1695
1696 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1697
1698 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1699
1700 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1701
1702 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1703
1704 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1705
1706 * alpha.h: Don't include "bfd.h"; private relocation types are now
1707 negative to minimize problems with shared libraries. Organize
1708 instruction subsets by AMASK extensions and PALcode
1709 implementation.
1710 (struct alpha_operand): Move flags slot for better packing.
1711
1712 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1713
1714 * v850.h (V850_OPERAND_RELAX): New operand flag.
1715
1716 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1717
1718 * mn10300.h (FMT_*): Move operand format definitions
1719 here.
1720
1721 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1722
1723 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1724
1725 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1726
1727 * mn10300.h (mn10300_opcode): Add "format" field.
1728 (MN10300_OPERAND_*): Define.
1729
1730 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1731
1732 * mn10x00.h: Delete.
1733 * mn10200.h, mn10300.h: New files.
1734
1735 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1736
1737 * mn10x00.h: New file.
1738
1739 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1740
1741 * v850.h: Add new flag to indicate this instruction uses a PC
1742 displacement.
1743
1744 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1745
1746 * h8300.h (stmac): Add missing instruction.
1747
1748 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1749
1750 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1751 field.
1752
1753 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1754
1755 * v850.h (V850_OPERAND_EP): Define.
1756
1757 * v850.h (v850_opcode): Add size field.
1758
1759 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1760
1761 * v850.h (v850_operands): Add insert and extract fields, pointers
1762 to functions used to handle unusual operand encoding.
1763 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1764 V850_OPERAND_SIGNED): Defined.
1765
1766 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1767
1768 * v850.h (v850_operands): Add flags field.
1769 (OPERAND_REG, OPERAND_NUM): Defined.
1770
1771 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1772
1773 * v850.h: New file.
1774
1775 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1776
1777 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1778 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1779 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1780 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1781 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1782 Defined.
1783
1784 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1785
1786 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1787 a 3 bit space id instead of a 2 bit space id.
1788
1789 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1790
1791 * d10v.h: Add some additional defines to support the
1792 assembler in determining which operations can be done in parallel.
1793
1794 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1795
1796 * h8300.h (SN): Define.
1797 (eepmov.b): Renamed from "eepmov"
1798 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1799 with them.
1800
1801 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1802
1803 * d10v.h (OPERAND_SHIFT): New operand flag.
1804
1805 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1806
1807 * d10v.h: Changes for divs, parallel-only instructions, and
1808 signed numbers.
1809
1810 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1811
1812 * d10v.h (pd_reg): Define. Putting the definition here allows
1813 the assembler and disassembler to share the same struct.
1814
1815 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1816
1817 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1818 Williams <steve@icarus.com>.
1819
1820 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1821
1822 * d10v.h: New file.
1823
1824 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1825
1826 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1827
1828 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1829
1830 * m68k.h (mcf5200): New macro.
1831 Document names of coldfire control registers.
1832
1833 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1834
1835 * h8300.h (SRC_IN_DST): Define.
1836
1837 * h8300.h (UNOP3): Mark the register operand in this insn
1838 as a source operand, not a destination operand.
1839 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1840 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1841 register operand with SRC_IN_DST.
1842
1843 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1844
1845 * alpha.h: New file.
1846
1847 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1848
1849 * rs6k.h: Remove obsolete file.
1850
1851 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1852
1853 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1854 fdivp, and fdivrp. Add ffreep.
1855
1856 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1857
1858 * h8300.h: Reorder various #defines for readability.
1859 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1860 (BITOP): Accept additional (unused) argument. All callers changed.
1861 (EBITOP): Likewise.
1862 (O_LAST): Bump.
1863 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1864
1865 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1866 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1867 (BITOP, EBITOP): Handle new H8/S addressing modes for
1868 bit insns.
1869 (UNOP3): Handle new shift/rotate insns on the H8/S.
1870 (insns using exr): New instructions.
1871 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1872
1873 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1874
1875 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1876 was incorrect.
1877
1878 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1879
1880 * h8300.h (START): Remove.
1881 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1882 and mov.l insns that can be relaxed.
1883
1884 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1885
1886 * i386.h: Remove Abs32 from lcall.
1887
1888 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1889
1890 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1891 (SLCPOP): New macro.
1892 Mark X,Y opcode letters as in use.
1893
1894 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1895
1896 * sparc.h (F_FLOAT, F_FBR): Define.
1897
1898 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1899
1900 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1901 from all insns.
1902 (ABS8SRC,ABS8DST): Add ABS8MEM.
1903 (add.l): Fix reg+reg variant.
1904 (eepmov.w): Renamed from eepmovw.
1905 (ldc,stc): Fix many cases.
1906
1907 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1908
1909 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1910
1911 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1912
1913 * sparc.h (O): Mark operand letter as in use.
1914
1915 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1916
1917 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1918 Mark operand letters uU as in use.
1919
1920 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1921
1922 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1923 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1924 (SPARC_OPCODE_SUPPORTED): New macro.
1925 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1926 (F_NOTV9): Delete.
1927
1928 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1929
1930 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1931 declaration consistent with return type in definition.
1932
1933 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1934
1935 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1936
1937 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1938
1939 * i386.h (i386_regtab): Add 80486 test registers.
1940
1941 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1942
1943 * i960.h (I_HX): Define.
1944 (i960_opcodes): Add HX instruction.
1945
1946 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1947
1948 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1949 and fclex.
1950
1951 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1952
1953 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1954 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1955 (bfd_* defines): Delete.
1956 (sparc_opcode_archs): Replaces architecture_pname.
1957 (sparc_opcode_lookup_arch): Declare.
1958 (NUMOPCODES): Delete.
1959
1960 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1961
1962 * sparc.h (enum sparc_architecture): Add v9a.
1963 (ARCHITECTURES_CONFLICT_P): Update.
1964
1965 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1966
1967 * i386.h: Added Pentium Pro instructions.
1968
1969 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1970
1971 * m68k.h: Document new 'W' operand place.
1972
1973 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1974
1975 * hppa.h: Add lci and syncdma instructions.
1976
1977 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1978
1979 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1980 instructions.
1981
1982 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1983
1984 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1985 assembler's -mcom and -many switches.
1986
1987 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1988
1989 * i386.h: Fix cmpxchg8b extension opcode description.
1990
1991 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1992
1993 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1994 and register cr4.
1995
1996 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1997
1998 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1999
2000 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2001
2002 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2003
2004 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2005
2006 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2007
2008 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2009
2010 * m68kmri.h: Remove.
2011
2012 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2013 declarations. Remove F_ALIAS and flag field of struct
2014 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2015 int. Make name and args fields of struct m68k_opcode const.
2016
2017 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2018
2019 * sparc.h (F_NOTV9): Define.
2020
2021 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2022
2023 * mips.h (INSN_4010): Define.
2024
2025 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2026
2027 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2028
2029 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2030 * m68k.h: Fix argument descriptions of coprocessor
2031 instructions to allow only alterable operands where appropriate.
2032 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2033 (m68k_opcode_aliases): Add more aliases.
2034
2035 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2036
2037 * m68k.h: Added explcitly short-sized conditional branches, and a
2038 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2039 svr4-based configurations.
2040
2041 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2042
2043 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2044 * i386.h: added missing Data16/Data32 flags to a few instructions.
2045
2046 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2047
2048 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2049 (OP_MASK_BCC, OP_SH_BCC): Define.
2050 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2051 (OP_MASK_CCC, OP_SH_CCC): Define.
2052 (INSN_READ_FPR_R): Define.
2053 (INSN_RFE): Delete.
2054
2055 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2056
2057 * m68k.h (enum m68k_architecture): Deleted.
2058 (struct m68k_opcode_alias): New type.
2059 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2060 matching constraints, values and flags. As a side effect of this,
2061 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2062 as I know were never used, now may need re-examining.
2063 (numopcodes): Now const.
2064 (m68k_opcode_aliases, numaliases): New variables.
2065 (endop): Deleted.
2066 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2067 m68k_opcode_aliases; update declaration of m68k_opcodes.
2068
2069 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2070
2071 * hppa.h (delay_type): Delete unused enumeration.
2072 (pa_opcode): Replace unused delayed field with an architecture
2073 field.
2074 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2075
2076 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2077
2078 * mips.h (INSN_ISA4): Define.
2079
2080 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2081
2082 * mips.h (M_DLA_AB, M_DLI): Define.
2083
2084 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2085
2086 * hppa.h (fstwx): Fix single-bit error.
2087
2088 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2089
2090 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2091
2092 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2093
2094 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2095 debug registers. From Charles Hannum (mycroft@netbsd.org).
2096
2097 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2098
2099 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2100 i386 support:
2101 * i386.h (MOV_AX_DISP32): New macro.
2102 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2103 of several call/return instructions.
2104 (ADDR_PREFIX_OPCODE): New macro.
2105
2106 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2107
2108 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2109
2110 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2111 char.
2112 (struct vot, field `name'): ditto.
2113
2114 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2115
2116 * vax.h: Supply and properly group all values in end sentinel.
2117
2118 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2119
2120 * mips.h (INSN_ISA, INSN_4650): Define.
2121
2122 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2123
2124 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2125 systems with a separate instruction and data cache, such as the
2126 29040, these instructions take an optional argument.
2127
2128 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2129
2130 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2131 INSN_TRAP.
2132
2133 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2134
2135 * mips.h (INSN_STORE_MEMORY): Define.
2136
2137 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2138
2139 * sparc.h: Document new operand type 'x'.
2140
2141 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2142
2143 * i960.h (I_CX2): New instruction category. It includes
2144 instructions available on Cx and Jx processors.
2145 (I_JX): New instruction category, for JX-only instructions.
2146 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2147 Jx-only instructions, in I_JX category.
2148
2149 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2150
2151 * ns32k.h (endop): Made pointer const too.
2152
2153 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2154
2155 * ns32k.h: Drop Q operand type as there is no correct use
2156 for it. Add I and Z operand types which allow better checking.
2157
2158 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2159
2160 * h8300.h (xor.l) :fix bit pattern.
2161 (L_2): New size of operand.
2162 (trapa): Use it.
2163
2164 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2165
2166 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2167
2168 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2169
2170 * sparc.h: Include v9 definitions.
2171
2172 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2173
2174 * m68k.h (m68060): Defined.
2175 (m68040up, mfloat, mmmu): Include it.
2176 (struct m68k_opcode): Widen `arch' field.
2177 (m68k_opcodes): Updated for M68060. Removed comments that were
2178 instructions commented out by "JF" years ago.
2179
2180 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2181
2182 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2183 add a one-bit `flags' field.
2184 (F_ALIAS): New macro.
2185
2186 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2187
2188 * h8300.h (dec, inc): Get encoding right.
2189
2190 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2191
2192 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2193 a flag instead.
2194 (PPC_OPERAND_SIGNED): Define.
2195 (PPC_OPERAND_SIGNOPT): Define.
2196
2197 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2198
2199 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2200 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2201
2202 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2203
2204 * i386.h: Reverse last change. It'll be handled in gas instead.
2205
2206 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2207
2208 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2209 slower on the 486 and used the implicit shift count despite the
2210 explicit operand. The one-operand form is still available to get
2211 the shorter form with the implicit shift count.
2212
2213 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2214
2215 * hppa.h: Fix typo in fstws arg string.
2216
2217 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2218
2219 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2220
2221 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2222
2223 * ppc.h (PPC_OPCODE_601): Define.
2224
2225 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2226
2227 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2228 (so we can determine valid completers for both addb and addb[tf].)
2229
2230 * hppa.h (xmpyu): No floating point format specifier for the
2231 xmpyu instruction.
2232
2233 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2234
2235 * ppc.h (PPC_OPERAND_NEXT): Define.
2236 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2237 (struct powerpc_macro): Define.
2238 (powerpc_macros, powerpc_num_macros): Declare.
2239
2240 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2241
2242 * ppc.h: New file. Header file for PowerPC opcode table.
2243
2244 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2245
2246 * hppa.h: More minor template fixes for sfu and copr (to allow
2247 for easier disassembly).
2248
2249 * hppa.h: Fix templates for all the sfu and copr instructions.
2250
2251 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2252
2253 * i386.h (push): Permit Imm16 operand too.
2254
2255 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2256
2257 * h8300.h (andc): Exists in base arch.
2258
2259 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2260
2261 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2262 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2263
2264 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2265
2266 * hppa.h: Add FP quadword store instructions.
2267
2268 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2269
2270 * mips.h: (M_J_A): Added.
2271 (M_LA): Removed.
2272
2273 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2274
2275 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2276 <mellon@pepper.ncd.com>.
2277
2278 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2279
2280 * hppa.h: Immediate field in probei instructions is unsigned,
2281 not low-sign extended.
2282
2283 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2284
2285 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2286
2287 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2288
2289 * i386.h: Add "fxch" without operand.
2290
2291 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2292
2293 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2294
2295 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2296
2297 * hppa.h: Add gfw and gfr to the opcode table.
2298
2299 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2300
2301 * m88k.h: extended to handle m88110.
2302
2303 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2304
2305 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2306 addresses.
2307
2308 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2309
2310 * i960.h (i960_opcodes): Properly bracket initializers.
2311
2312 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2313
2314 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2315
2316 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2317
2318 * m68k.h (two): Protect second argument with parentheses.
2319
2320 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2321
2322 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2323 Deleted old in/out instructions in "#if 0" section.
2324
2325 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2326
2327 * i386.h (i386_optab): Properly bracket initializers.
2328
2329 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2330
2331 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2332 Jeff Law, law@cs.utah.edu).
2333
2334 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2335
2336 * i386.h (lcall): Accept Imm32 operand also.
2337
2338 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2339
2340 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2341 (M_DABS): Added.
2342
2343 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2344
2345 * mips.h (INSN_*): Changed values. Removed unused definitions.
2346 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2347 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2348 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2349 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2350 (M_*): Added new values for r6000 and r4000 macros.
2351 (ANY_DELAY): Removed.
2352
2353 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2354
2355 * mips.h: Added M_LI_S and M_LI_SS.
2356
2357 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2358
2359 * h8300.h: Get some rare mov.bs correct.
2360
2361 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2362
2363 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2364 been included.
2365
2366 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2367
2368 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2369 jump instructions, for use in disassemblers.
2370
2371 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2372
2373 * m88k.h: Make bitfields just unsigned, not unsigned long or
2374 unsigned short.
2375
2376 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2377
2378 * hppa.h: New argument type 'y'. Use in various float instructions.
2379
2380 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2381
2382 * hppa.h (break): First immediate field is unsigned.
2383
2384 * hppa.h: Add rfir instruction.
2385
2386 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2387
2388 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2389
2390 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2391
2392 * mips.h: Reworked the hazard information somewhat, and fixed some
2393 bugs in the instruction hazard descriptions.
2394
2395 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2396
2397 * m88k.h: Corrected a couple of opcodes.
2398
2399 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2400
2401 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2402 new version includes instruction hazard information, but is
2403 otherwise reasonably similar.
2404
2405 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2406
2407 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2408
2409 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2410
2411 Patches from Jeff Law, law@cs.utah.edu:
2412 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2413 Make the tables be the same for the following instructions:
2414 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2415 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2416 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2417 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2418 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2419 "fcmp", and "ftest".
2420
2421 * hppa.h: Make new and old tables the same for "break", "mtctl",
2422 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2423 Fix typo in last patch. Collapse several #ifdefs into a
2424 single #ifdef.
2425
2426 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2427 of the comments up-to-date.
2428
2429 * hppa.h: Update "free list" of letters and update
2430 comments describing each letter's function.
2431
2432 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2433
2434 * h8300.h: Lots of little fixes for the h8/300h.
2435
2436 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2437
2438 Support for H8/300-H
2439 * h8300.h: Lots of new opcodes.
2440
2441 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2442
2443 * h8300.h: checkpoint, includes H8/300-H opcodes.
2444
2445 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2446
2447 * Patches from Jeffrey Law <law@cs.utah.edu>.
2448 * hppa.h: Rework single precision FP
2449 instructions so that they correctly disassemble code
2450 PA1.1 code.
2451
2452 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2453
2454 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2455 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2456
2457 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2458
2459 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2460 gdb will define it for now.
2461
2462 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2463
2464 * sparc.h: Don't end enumerator list with comma.
2465
2466 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2467
2468 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2469 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2470 ("bc2t"): Correct typo.
2471 ("[ls]wc[023]"): Use T rather than t.
2472 ("c[0123]"): Define general coprocessor instructions.
2473
2474 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2475
2476 * m68k.h: Move split point for gcc compilation more towards
2477 middle.
2478
2479 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2480
2481 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2482 simply wrong, ics, rfi, & rfsvc were missing).
2483 Add "a" to opr_ext for "bb". Doc fix.
2484
2485 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2486
2487 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2488 * mips.h: Add casts, to suppress warnings about shifting too much.
2489 * m68k.h: Document the placement code '9'.
2490
2491 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2492
2493 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2494 allows callers to break up the large initialized struct full of
2495 opcodes into two half-sized ones. This permits GCC to compile
2496 this module, since it takes exponential space for initializers.
2497 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2498
2499 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2500
2501 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2502 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2503 initialized structs in it.
2504
2505 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2506
2507 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2508 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2509 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2510
2511 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2512
2513 * mips.h: document "i" and "j" operands correctly.
2514
2515 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2516
2517 * mips.h: Removed endianness dependency.
2518
2519 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2520
2521 * h8300.h: include info on number of cycles per instruction.
2522
2523 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2524
2525 * hppa.h: Move handy aliases to the front. Fix masks for extract
2526 and deposit instructions.
2527
2528 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2529
2530 * i386.h: accept shld and shrd both with and without the shift
2531 count argument, which is always %cl.
2532
2533 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2534
2535 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2536 (one_byte_segment_defaults, two_byte_segment_defaults,
2537 i386_prefixtab_end): Ditto.
2538
2539 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2540
2541 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2542 for operand 2; from John Carr, jfc@dsg.dec.com.
2543
2544 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2545
2546 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2547 always use 16-bit offsets. Makes calculated-size jump tables
2548 feasible.
2549
2550 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2551
2552 * i386.h: Fix one-operand forms of in* and out* patterns.
2553
2554 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2555
2556 * m68k.h: Added CPU32 support.
2557
2558 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2559
2560 * mips.h (break): Disassemble the argument. Patch from
2561 jonathan@cs.stanford.edu (Jonathan Stone).
2562
2563 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2564
2565 * m68k.h: merged Motorola and MIT syntax.
2566
2567 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2568
2569 * m68k.h (pmove): make the tests less strict, the 68k book is
2570 wrong.
2571
2572 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2573
2574 * m68k.h (m68ec030): Defined as alias for 68030.
2575 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2576 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2577 them. Tightened description of "fmovex" to distinguish it from
2578 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2579 up descriptions that claimed versions were available for chips not
2580 supporting them. Added "pmovefd".
2581
2582 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2583
2584 * m68k.h: fix where the . goes in divull
2585
2586 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2587
2588 * m68k.h: the cas2 instruction is supposed to be written with
2589 indirection on the last two operands, which can be either data or
2590 address registers. Added a new operand type 'r' which accepts
2591 either register type. Added new cases for cas2l and cas2w which
2592 use them. Corrected masks for cas2 which failed to recognize use
2593 of address register.
2594
2595 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2596
2597 * m68k.h: Merged in patches (mostly m68040-specific) from
2598 Colin Smith <colin@wrs.com>.
2599
2600 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2601 base). Also cleaned up duplicates, re-ordered instructions for
2602 the sake of dis-assembling (so aliases come after standard names).
2603 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2604
2605 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2606
2607 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2608 all missing .s
2609
2610 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2611
2612 * sparc.h: Moved tables to BFD library.
2613
2614 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2615
2616 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2617
2618 * h8300.h: Finish filling in all the holes in the opcode table,
2619 so that the Lucid C compiler can digest this as well...
2620
2621 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2622
2623 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2624 Fix opcodes on various sizes of fild/fist instructions
2625 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2626 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2627
2628 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2629
2630 * h8300.h: Fill in all the holes in the opcode table so that the
2631 losing HPUX C compiler can digest this...
2632
2633 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2634
2635 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2636 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2637
2638 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2639
2640 * sparc.h: Add new architecture variant sparclite; add its scan
2641 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2642
2643 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2644
2645 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2646 fy@lucid.com).
2647
2648 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2649
2650 * rs6k.h: New version from IBM (Metin).
2651
2652 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2653
2654 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2655 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2656
2657 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2658
2659 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2660
2661 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2662
2663 * m68k.h (one, two): Cast macro args to unsigned to suppress
2664 complaints from compiler and lint about integer overflow during
2665 shift.
2666
2667 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2668
2669 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2670
2671 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2672
2673 * mips.h: Make bitfield layout depend on the HOST compiler,
2674 not on the TARGET system.
2675
2676 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2677
2678 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2679 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2680 <TRANLE@INTELLICORP.COM>.
2681
2682 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2683
2684 * h8300.h: turned op_type enum into #define list
2685
2686 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2687
2688 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2689 similar instructions -- they've been renamed to "fitoq", etc.
2690 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2691 number of arguments.
2692 * h8300.h: Remove extra ; which produces compiler warning.
2693
2694 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2695
2696 * sparc.h: fix opcode for tsubcctv.
2697
2698 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2699
2700 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2701
2702 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2703
2704 * sparc.h (nop): Made the 'lose' field be even tighter,
2705 so only a standard 'nop' is disassembled as a nop.
2706
2707 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2708
2709 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2710 disassembled as a nop.
2711
2712 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2713
2714 * m68k.h, sparc.h: ANSIfy enums.
2715
2716 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2717
2718 * sparc.h: fix a typo.
2719
2720 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2721
2722 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2723 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2724 vax.h: Renamed from ../<foo>-opcode.h.
2725
2726 \f
2727 Local Variables:
2728 version-control: never
2729 End: