1 /* C-SKY assembler/disassembler support.
2 Copyright (C) 2004-2020 Free Software Foundation, Inc.
3 Contributed by C-SKY Microsystems and Mentor Graphics.
5 This file is part of GDB and GAS.
7 GDB and GAS are free software; you can redistribute it and/or
8 modify it under the terms of the GNU General Public License as
9 published by the Free Software Foundation; either version 3, or (at
10 your option) any later version.
12 GDB and GAS are distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GDB or GAS; see the file COPYING3. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
24 /* The following bitmasks control instruction set architecture. */
25 #define CSKYV1_ISA_E1 (1 << 0)
26 #define CSKYV2_ISA_E1 (1 << 1)
27 #define CSKYV2_ISA_1E2 (1 << 2)
28 #define CSKYV2_ISA_2E3 (1 << 3)
29 #define CSKYV2_ISA_3E7 (1 << 4)
30 #define CSKYV2_ISA_7E10 (1 << 5)
31 #define CSKYV2_ISA_3E3R1 (1 << 6)
33 #define CSKY_ISA_TRUST (1 << 11)
34 #define CSKY_ISA_CACHE (1 << 12)
35 #define CSKY_ISA_NVIC (1 << 13)
36 #define CSKY_ISA_CP (1 << 14)
37 #define CSKY_ISA_MP (1 << 15)
38 #define CSKY_ISA_MP_1E2 (1 << 16)
39 #define CSKY_ISA_JAVA (1 << 17)
40 #define CSKY_ISA_MAC (1 << 18)
41 #define CSKY_ISA_MAC_DSP (1 << 19)
43 /* Base ISA for csky v1 and v2. */
44 #define CSKY_ISA_DSP (1 << 20)
45 #define CSKY_ISA_DSP_1E2 (1 << 21)
46 #define CSKY_ISA_DSP_ENHANCE (1 << 22)
48 /* Base float instruction (803f & 810f). */
49 #define CSKY_ISA_FLOAT_E1 (1 << 25)
50 /* M_FLOAT support (810f). */
51 #define CSKY_ISA_FLOAT_1E2 (1 << 26)
52 /* 803 support (803f). */
53 #define CSKY_ISA_FLOAT_1E3 (1 << 27)
54 /* 807 support (803f & 807f). */
55 #define CSKY_ISA_FLOAT_3E4 (1 << 28)
56 /* Vector DSP support. */
57 #define CSKY_ISA_VDSP (1 << 29)
59 /* The following bitmasks control cpu architecture for CSKY. */
60 #define CSKY_ABI_V1 (1 << 28)
61 #define CSKY_ABI_V2 (2 << 28)
62 #define CSKY_ARCH_MASK 0x0000001F
63 #define CSKY_ABI_MASK 0xF0000000
65 #define CSKY_ARCH_510 0x1
66 #define CSKY_ARCH_610 0x2
67 #define CSKY_ARCH_801 0xa
68 #define CSKY_ARCH_802 0x10
69 #define CSKY_ARCH_803 0x9
70 #define CSKY_ARCH_807 0x6
71 #define CSKY_ARCH_810 0x8
73 #define CSKY_ARCH_MAC (1 << 15)
74 #define CSKY_ARCH_DSP (1 << 14)
75 #define CSKY_ARCH_FLOAT (1 << 13)
76 #define CSKY_ARCH_SIMD (1 << 12)
77 #define CSKY_ARCH_CP (1 << 11)
78 #define CSKY_ARCH_MP (1 << 10)
79 #define CSKY_ARCH_CACHE (1 << 9)
80 #define CSKY_ARCH_JAVA (1 << 8)
81 #define CSKY_ARCH_APS (1 << 7)
83 #define IS_CSKY_V1(a) \
84 (((a) & CSKY_ABI_MASK) == CSKY_ABI_V1)
85 #define IS_CSKY_V2(a) \
86 (((a) & CSKY_ABI_MASK) == CSKY_ABI_V2)
87 #define IS_CSKY_ARCH_V1(a) \
88 (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510 \
89 || ((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610)
90 #define IS_CSKY_ARCH_V2(a) \
91 (!(IS_CSKY_ARCH_V1 (a)))
93 #define IS_CSKY_ARCH_510(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510)
94 #define IS_CSKY_ARCH_610(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610)
95 #define IS_CSKY_ARCH_801(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_801)
96 #define IS_CSKY_ARCH_802(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_802)
97 #define IS_CSKY_ARCH_803(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_803)
98 #define IS_CSKY_ARCH_807(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_807)
99 #define IS_CSKY_ARCH_810(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_810)
101 #define CPU_ARCH_MASK \
102 (CSKY_ARCH_JAVA | CSKY_ARCH_FLOAT | CSKY_ARCH_DSP | CSKY_ARCH_MASK)
107 extern int print_insn_csky (bfd_vma memaddr
, struct disassemble_info
*info
);