include/opcode/d10v.h

   1 /* d10v.h -- Header file for D10V opcode table
   2    Copyright 1996 Free Software Foundation, Inc.
   3    Written by Martin Hunt (hunt@cygnus.com), Cygnus Support
   4
   5 This file is part of GDB, GAS, and the GNU binutils.
   6
   7 GDB, GAS, and the GNU binutils are free software; you can redistribute
   8 them and/or modify them under the terms of the GNU General Public
   9 License as published by the Free Software Foundation; either version
  10 1, or (at your option) any later version.
  11
  12 GDB, GAS, and the GNU binutils are distributed in the hope that they
  13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
  14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  15 the GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this file; see the file COPYING.  If not, write to the Free
  19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #ifndef D10V_H
  22 #define D10V_H
  23
  24 /* Format Specifier */
  25 #define FM00    0
  26 #define FM01    0x40000000
  27 #define FM10    0x80000000
  28 #define FM11    0xC0000000
  29
  30 #define NOP 0x5e00
  31
  32 /* The opcode table is an array of struct d10v_opcode.  */
  33
  34 struct d10v_opcode
  35 {
  36   /* The opcode name.  */
  37   const char *name;
  38
  39   /* the opcode format */
  40   int format;
  41
  42   /* opcode types.  these numbers were picked so we can do
  43      if( i & SHORT_OPCODE) */
  44
  45 #define SHORT_OPCODE 1
  46 #define LONG_OPCODE  8
  47 #define SHORT_2      1          /* short with 2 operands */
  48 #define SHORT_B      3          /* short with 8-bit branch */
  49 #define LONG_B       8          /* long with 16-bit branch */
  50 #define LONG_L       10         /* long with 3 operands */
  51 #define LONG_R       12         /* reserved */
  52
  53   /* the number of cycles */
  54   int cycles;
  55
  56   /* the execution unit(s) used */
  57   int unit;
  58 #define EITHER  0
  59 #define IU      1
  60 #define MU      2
  61 #define BOTH    3
  62
  63   /* execution type; parallel or sequential */
  64   int exec_type;
  65 #define PAR     1
  66 #define SEQ     2
  67 #define BRANCH_LINK 3
  68
  69   /* the opcode */
  70   long opcode;
  71
  72   /* mask.  if( (i & mask) == opcode ) then match */
  73   long mask;
  74
  75   /* An array of operand codes.  Each code is an index into the
  76      operand table.  They appear in the order which the operands must
  77      appear in assembly code, and are terminated by a zero.  */
  78   unsigned char operands[6];
  79 };
  80
  81 /* The table itself is sorted by major opcode number, and is otherwise
  82    in the order in which the disassembler should consider
  83    instructions.  */
  84 extern const struct d10v_opcode d10v_opcodes[];
  85 extern const int d10v_num_opcodes;
  86
  87 /* The operands table is an array of struct d10v_operand.  */
  88 struct d10v_operand
  89 {
  90   /* The number of bits in the operand.  */
  91   int bits;
  92
  93   /* How far the operand is left shifted in the instruction.  */
  94   int shift;
  95
  96   /* One bit syntax flags.  */
  97   int flags;
  98 };
  99
 100 /* Elements in the table are retrieved by indexing with values from
 101    the operands field of the d10v_opcodes table.  */
 102
 103 extern const struct d10v_operand d10v_operands[];
 104
 105 /* Values defined for the flags field of a struct d10v_operand.  */
 106
 107 /* the operand must be an even number */
 108 #define OPERAND_EVEN    (1)
 109
 110 /* the operand must be an odd number */
 111 #define OPERAND_ODD     (2)
 112
 113 /* this is the destination register; it will be modified */
 114 /* this is used by the optimizer */
 115 #define OPERAND_DEST    (4)
 116
 117 /* number or symbol */
 118 #define OPERAND_NUM     (8)
 119
 120 /* address or label */
 121 #define OPERAND_ADDR    (0x10)
 122
 123 /* register */
 124 #define OPERAND_REG     (0x20)
 125
 126 /* postincrement +  */
 127 #define OPERAND_PLUS    (0x40)
 128
 129 /* postdecrement -  */
 130 #define OPERAND_MINUS   (0x80)
 131
 132 /* @  */
 133 #define OPERAND_ATSIGN  (0x100)
 134
 135 /* @(  */
 136 #define OPERAND_ATPAR   (0x200)
 137
 138 /* accumulator */
 139 #define OPERAND_ACC     (0x400)
 140
 141 /* flag register */
 142 #define OPERAND_FLAG    (0x800)
 143
 144 /* control register  */
 145 #define OPERAND_CONTROL (0x1000)
 146
 147 /* predecrement mode '@-sp'  */
 148 #define OPERAND_ATMINUS (0x2000)
 149
 150 #endif /* D10V_H */