include/opcode/hppa.h

   1 /* Table of opcodes for the PA-RISC.
   2    Copyright (C) 1990, 1991, 1993, 1995, 1999 Free Software Foundation, Inc.
   3
   4    Contributed by the Center for Software Science at the
   5    University of Utah (pa-gdb-bugs@cs.utah.edu).
   6
   7 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
   8
   9 GAS/GDB is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 1, or (at your option)
  12 any later version.
  13
  14 GAS/GDB is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GAS or GDB; see the file COPYING.  If not, write to
  21 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  22
  23 #if !defined(__STDC__) && !defined(const)
  24 #define const
  25 #endif
  26
  27 /*
  28  * Structure of an opcode table entry.
  29  */
  30
  31 /* There are two kinds of delay slot nullification: normal which is
  32  * controled by the nullification bit, and conditional, which depends
  33  * on the direction of the branch and its success or failure.
  34  *
  35  * NONE is unfortunately #defined in the hiux system include files.
  36  * #undef it away.
  37  */
  38 #undef NONE
  39 struct pa_opcode
  40 {
  41     const char *name;
  42     unsigned long int match;    /* Bits that must be set...  */
  43     unsigned long int mask;     /* ... in these bits. */
  44     char *args;
  45     enum pa_arch arch;
  46     char flags;
  47 };
  48
  49 /* Enable/disable strict syntax checking.  Not currently used, but will
  50    be necessary for PA2.0 support in the future.  */
  51 #define FLAG_STRICT 0x1
  52
  53 /*
  54    All hppa opcodes are 32 bits.
  55
  56    The match component is a mask saying which bits must match a
  57    particular opcode in order for an instruction to be an instance
  58    of that opcode.
  59
  60    The args component is a string containing one character for each operand of
  61    the instruction.  Characters used as a prefix allow any second character to
  62    be used without conflicting with the main operand characters.
  63
  64    Bit positions in this description follow HP usage of lsb = 31,
  65    "at" is lsb of field.
  66
  67    In the args field, the following characters must match exactly:
  68
  69         '+,() '
  70
  71    In the args field, the following characters are unused:
  72
  73         '  "   &     -  /   34 6789:;< > @'
  74         ' BC         M             [\]  '
  75         '    e g    l            y   } '
  76
  77    Here are all the characters:
  78
  79         ' !"#$%&'()*+-,./0123456789:;<=>?@'
  80         'ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
  81         'abcdefghijklmnopqrstuvwxyz{|}~'
  82
  83 Kinds of operands:
  84    x    integer register field at 15.
  85    b    integer register field at 10.
  86    t    integer register field at 31.
  87    a    integer register field at 10 and 15 (for PERMH)
  88    5    5 bit immediate at 15.
  89    s    2 bit space specifier at 17.
  90    S    3 bit space specifier at 18.
  91    V    5 bit immediate value at 31
  92    i    11 bit immediate value at 31
  93    j    14 bit immediate value at 31
  94    k    21 bit immediate value at 31
  95    n    nullification for branch instructions
  96    N    nullification for spop and copr instructions
  97    w    12 bit branch displacement
  98    W    17 bit branch displacement (PC relative)
  99    X    22 bit branch displacement (PC relative)
 100    z    17 bit branch displacement (just a number, not an address)
 101
 102 Also these:
 103
 104    .    2 bit shift amount at 25
 105    *    4 bit shift amount at 25
 106    p    5 bit shift count at 26 (to support the SHD instruction) encoded as
 107         31-p
 108    ~    6 bit shift count at 20,22:26 encoded as 63-~.
 109    P    5 bit bit position at 26
 110    q    6 bit bit position at 20,22:26
 111    T    5 bit field length at 31 (encoded as 32-T)
 112    %    6 bit field length at 23,27:31 (variable extract/deposit)
 113    |    6 bit field length at 19,27:31 (fixed extract/deposit)
 114    A    13 bit immediate at 18 (to support the BREAK instruction)
 115    ^    like b, but describes a control register
 116    !    sar (cr11) register
 117    D    26 bit immediate at 31 (to support the DIAG instruction)
 118    $    9 bit immediate at 28 (to support POPBTS)
 119
 120    v    3 bit Special Function Unit identifier at 25
 121    O    20 bit Special Function Unit operation split between 15 bits at 20
 122         and 5 bits at 31
 123    o    15 bit Special Function Unit operation at 20
 124    2    22 bit Special Function Unit operation split between 17 bits at 20
 125         and 5 bits at 31
 126    1    15 bit Special Function Unit operation split between 10 bits at 20
 127         and 5 bits at 31
 128    0    10 bit Special Function Unit operation split between 5 bits at 20
 129         and 5 bits at 31
 130    u    3 bit coprocessor unit identifier at 25
 131    F    Source Floating Point Operand Format Completer encoded 2 bits at 20
 132    I    Source Floating Point Operand Format Completer encoded 1 bits at 20
 133         (for 0xe format FP instructions)
 134    G    Destination Floating Point Operand Format Completer encoded 2 bits at 18
 135    H    Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
 136         (very similar to 'F')
 137
 138    r    5 bit immediate value at 31 (for the break instruction)
 139         (very similar to V above, except the value is unsigned instead of
 140         low_sign_ext)
 141    R    5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
 142         (same as r above, except the value is in a different location)
 143    U    10 bit immediate value at 15 (for SSM, RSM on pa2.0)
 144    Q    5 bit immediate value at 10 (a bit position specified in
 145         the bb instruction. It's the same as r above, except the
 146         value is in a different location)
 147    Z    %r1 -- implicit target of addil instruction.
 148    L    ,%r2 completer for new syntax branch
 149    {    Source format completer for fcnv
 150    _    Destination format completer for fcnv
 151    h    cbit for fcmp
 152    =    gfx tests for ftest
 153    d    14bit offset for single precision FP long load/store.
 154    #    14bit offset for double precision FP load long/store.
 155    J    Yet another 14bit offset with an unusual encoding.
 156    K    Yet another 14bit offset with an unusual encoding.
 157    Y    %sr0,%r31 -- implicit target of be,l instruction.
 158
 159 Completer operands all have 'c' as the prefix:
 160
 161    cx   indexed load completer.
 162    cm   short load and store completer.
 163    cq   short load and store completer (like cm, but inserted into a
 164         different location in the target instruction).
 165    cs   store bytes short completer.
 166    cc   Another load/store completer with a different encoding than the
 167         others
 168
 169    cp   branch link and push completer
 170    cP   branch pop completer
 171    cl   branch link completer
 172    cg   branch gate completer
 173
 174    cw   read/write completer for PROBE
 175    cW   wide completer for MFCTL
 176    cL   local processor completer for cache control
 177    cZ   System Control Completer (to support LPA, LHA, etc.)
 178
 179    ci   correction completer for DCOR
 180    ca   add completer
 181    cy   32 bit add carry completer
 182    cY   64 bit add carry completer
 183    cv   signed overflow trap completer
 184    ct   trap on condition completer for ADDI, SUB
 185    cT   trap on condition completer for UADDCM
 186    cb   32 bit borrow completer for SUB
 187    cB   64 bit borrow completer for SUB
 188
 189    ch   left/right half completer
 190    cH   signed/unsigned saturation completer
 191    cS   signed/unsigned completer at 21
 192    c*   permutation completer
 193
 194 Condition operands all have '?' as the prefix:
 195
 196    ?f   Floating point compare conditions (encoded as 5 bits at 31)
 197
 198    ?a   add conditions
 199    ?A   64 bit add conditions
 200    ?@   add branch conditions followed by nullify
 201    ?d   non-negated add branch conditions
 202    ?D   negated add branch conditions
 203    ?w   wide mode non-negated add branch conditions
 204    ?W   wide mode negated add branch conditions
 205
 206    ?s   compare/subtract conditions
 207    ?S   64 bit compare/subtract conditions
 208    ?t   non-negated compare conditions
 209    ?T   negated compare conditions
 210    ?r   64 bit non-negated compare conditions
 211    ?R   64 bit negated compare conditions
 212    ?Q   64 bit compare conditions for CMPIB instruction
 213    ?n   compare conditions followed by nullify
 214
 215    ?l   logical conditions
 216    ?L   64 bit logical conditions
 217
 218    ?b   branch on bit conditions
 219    ?B   64 bit branch on bit conditions
 220
 221    ?x   shift/extract/deposit conditions
 222    ?X   64 bit shift/extract/deposit conditions
 223    ?y   shift/extract/deposit conditions followed by nullify for conditional
 224         branches
 225
 226    ?u   unit conditions
 227    ?U   64 bit unit conditions
 228
 229 Floating point registers all have 'f' as a prefix:
 230
 231    ft   target register at 31
 232    fT   target register with L/R halves at 31
 233    fa   operand 1 register at 10
 234    fA   operand 1 register with L/R halves at 10
 235    fX   Same as fA, except prints a space before register during disasm
 236    fb   operand 2 register at 15
 237    fB   operand 2 register with L/R halves at 15
 238    fC   operand 3 register with L/R halves at 16:18,21:23
 239    fe   Like fT, but encoding is different.
 240
 241 Float registers for fmpyadd and fmpysub:
 242
 243    fi   mult operand 1 register at 10
 244    fj   mult operand 2 register at 15
 245    fk   mult target register at 20
 246    fl   add/sub operand register at 25
 247    fm   add/sub target register at 31
 248
 249 */
 250
 251
 252 /* List of characters not to put a space after.  Note that
 253    "," is included, as the "spopN" operations use literal
 254    commas in their completer sections. */
 255 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
 256
 257 /* The order of the opcodes in this table is significant:
 258
 259    * The assembler requires that all instances of the same mnemonic must be
 260    consecutive.  If they aren't, the assembler will bomb at runtime.
 261
 262    * The disassembler should not care about the order of the opcodes.  */
 263
 264 static const struct pa_opcode pa_opcodes[] =
 265 {
 266
 267 /* pseudo-instructions */
 268
 269 { "ldi",        0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */
 270
 271 { "call",       0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
 272 { "call",       0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT},
 273 { "ret",        0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT},
 274
 275 { "comib",      0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
 276 /* This entry is for the disassembler only.  It will never be used by
 277    assembler.  */
 278 { "comib",      0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
 279 { "comb",       0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
 280 /* This entry is for the disassembler only.  It will never be used by
 281    assembler.  */
 282 { "comb",       0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
 283 { "addb",       0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */
 284 /* This entry is for the disassembler only.  It will never be used by
 285    assembler.  */
 286 { "addb",       0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0},
 287 { "addib",      0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
 288 /* This entry is for the disassembler only.  It will never be used by
 289    assembler.  */
 290 { "addib",      0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
 291 { "nop",        0x08000240, 0xffffffff, "", pa10, 0},      /* or 0,0,0 */
 292 { "copy",       0x08000240, 0xffe0ffe0, "x,t", pa10, 0},   /* or r,0,t */
 293 { "mtsar",      0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */
 294
 295 /* Loads and Stores for integer registers.  */
 296 { "ldd",        0x0c0000c0, 0xfc001fc0, "cxx(s,b),t", pa20, FLAG_STRICT},
 297 { "ldd",        0x0c0000c0, 0xfc001fc0, "cxx(b),t", pa20, FLAG_STRICT},
 298 { "ldd",        0x0c0010c0, 0xfc001fc0, "cm5(s,b),t", pa20, FLAG_STRICT},
 299 { "ldd",        0x0c0010c0, 0xfc001fc0, "cm5(b),t", pa20, FLAG_STRICT},
 300 { "ldd",        0x50000000, 0xfc000002, "cq#(s,b),x", pa20, FLAG_STRICT},
 301 { "ldd",        0x50000000, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT},
 302 { "ldw",        0x0c000080, 0xfc001fc0, "cxx(s,b),t", pa10, FLAG_STRICT},
 303 { "ldw",        0x0c000080, 0xfc001fc0, "cxx(b),t", pa10, FLAG_STRICT},
 304 { "ldw",        0x0c001080, 0xfc001fc0, "cm5(s,b),t", pa10, FLAG_STRICT},
 305 { "ldw",        0x0c001080, 0xfc001fc0, "cm5(b),t", pa10, FLAG_STRICT},
 306 { "ldw",        0x4c000000, 0xfc000000, "ccJ(s,b),x", pa10, FLAG_STRICT},
 307 { "ldw",        0x4c000000, 0xfc000000, "ccJ(b),x", pa10, FLAG_STRICT},
 308 { "ldw",        0x5c000004, 0xfc000006, "ccK(s,b),x", pa20, FLAG_STRICT},
 309 { "ldw",        0x5c000004, 0xfc000006, "ccK(b),x", pa20, FLAG_STRICT},
 310 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
 311 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
 312 { "ldw",        0x48000000, 0xfc000000, "j(b),x", pa10, 0},
 313 { "ldh",        0x0c000040, 0xfc001fc0, "cxx(s,b),t", pa10, FLAG_STRICT},
 314 { "ldh",        0x0c000040, 0xfc001fc0, "cxx(b),t", pa10, FLAG_STRICT},
 315 { "ldh",        0x0c001040, 0xfc001fc0, "cm5(s,b),t", pa10, FLAG_STRICT},
 316 { "ldh",        0x0c001040, 0xfc001fc0, "cm5(b),t", pa10, FLAG_STRICT},
 317 { "ldh",        0x44000000, 0xfc000000, "j(s,b),x", pa10, 0},
 318 { "ldh",        0x44000000, 0xfc000000, "j(b),x", pa10, 0},
 319 { "ldb",        0x0c000000, 0xfc001fc0, "cxx(s,b),t", pa10, FLAG_STRICT},
 320 { "ldb",        0x0c000000, 0xfc001fc0, "cxx(b),t", pa10, FLAG_STRICT},
 321 { "ldb",        0x0c001000, 0xfc001fc0, "cm5(s,b),t", pa10, FLAG_STRICT},
 322 { "ldb",        0x0c001000, 0xfc001fc0, "cm5(b),t", pa10, FLAG_STRICT},
 323 { "ldb",        0x40000000, 0xfc000000, "j(s,b),x", pa10, 0},
 324 { "ldb",        0x40000000, 0xfc000000, "j(b),x", pa10, 0},
 325 { "std",        0x0c0012c0, 0xfc001fc0, "cmx,V(s,b)", pa20, FLAG_STRICT},
 326 { "std",        0x0c0012c0, 0xfc001fc0, "cmx,V(b)", pa20, FLAG_STRICT},
 327 { "std",        0x70000000, 0xfc000002, "cqx,#(s,b)", pa20, FLAG_STRICT},
 328 { "std",        0x70000000, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT},
 329 { "stw",        0x0c001280, 0xfc001fc0, "cmx,V(s,b)", pa10, FLAG_STRICT},
 330 { "stw",        0x0c001280, 0xfc001fc0, "cmx,V(b)", pa10, FLAG_STRICT},
 331 { "stw",        0x6c000000, 0xfc000000, "ccx,J(s,b)", pa10, FLAG_STRICT},
 332 { "stw",        0x6c000000, 0xfc000000, "ccx,J(b)", pa10, FLAG_STRICT},
 333 { "stw",        0x7c000004, 0xfc000006, "ccx,K(s,b)", pa20, FLAG_STRICT},
 334 { "stw",        0x7c000004, 0xfc000006, "ccx,K(b)", pa20, FLAG_STRICT},
 335 { "stw",        0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 336 { "stw",        0x68000000, 0xfc000000, "x,j(b)", pa10, 0},
 337 { "sth",        0x0c001240, 0xfc001fc0, "cmx,V(s,b)", pa10, FLAG_STRICT},
 338 { "sth",        0x0c001240, 0xfc001fc0, "cmx,V(b)", pa10, FLAG_STRICT},
 339 { "sth",        0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 340 { "sth",        0x64000000, 0xfc000000, "x,j(b)", pa10, 0},
 341 { "stb",        0x0c001200, 0xfc001fc0, "cmx,V(s,b)", pa10, FLAG_STRICT},
 342 { "stb",        0x0c001200, 0xfc001fc0, "cmx,V(b)", pa10, FLAG_STRICT},
 343 { "stb",        0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 344 { "stb",        0x60000000, 0xfc000000, "x,j(b)", pa10, 0},
 345 { "ldwm",       0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0},
 346 { "ldwm",       0x4c000000, 0xfc000000, "j(b),x", pa10, 0},
 347 { "stwm",       0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 348 { "stwm",       0x6c000000, 0xfc000000, "x,j(b)", pa10, 0},
 349 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 350 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(b),t", pa10, 0},
 351 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 352 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(b),t", pa10, 0},
 353 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 354 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(b),t", pa10, 0},
 355 { "ldwa",       0x0c000180, 0xfc00dfc0, "cxx(b),t", pa10, FLAG_STRICT},
 356 { "ldwa",       0x0c001180, 0xfc00dfc0, "cm5(b),t", pa10, FLAG_STRICT},
 357 { "ldcw",       0x0c0001c0, 0xfc001fc0, "cxx(s,b),t", pa10, FLAG_STRICT},
 358 { "ldcw",       0x0c0001c0, 0xfc001fc0, "cxx(b),t", pa10, FLAG_STRICT},
 359 { "ldcw",       0x0c0011c0, 0xfc001fc0, "cm5(s,b),t", pa10, FLAG_STRICT},
 360 { "ldcw",       0x0c0011c0, 0xfc001fc0, "cm5(b),t", pa10, FLAG_STRICT},
 361 { "stwa",       0x0c001380, 0xfc00dfc0, "cmx,V(b)", pa10, FLAG_STRICT},
 362 { "stby",       0x0c001300, 0xfc001fc0, "csx,V(s,b)", pa10, FLAG_STRICT},
 363 { "stby",       0x0c001300, 0xfc001fc0, "csx,V(b)", pa10, FLAG_STRICT},
 364 { "ldda",       0x0c000100, 0xfc00dfc0, "cxx(b),t", pa20, FLAG_STRICT},
 365 { "ldda",       0x0c001100, 0xfc00dfc0, "cm5(b),t", pa20, FLAG_STRICT},
 366 { "ldcd",       0x0c000140, 0xfc001fc0, "cxx(s,b),t", pa20, FLAG_STRICT},
 367 { "ldcd",       0x0c000140, 0xfc001fc0, "cxx(b),t", pa20, FLAG_STRICT},
 368 { "ldcd",       0x0c001140, 0xfc001fc0, "cm5(s,b),t", pa20, FLAG_STRICT},
 369 { "ldcd",       0x0c001140, 0xfc001fc0, "cm5(b),t", pa20, FLAG_STRICT},
 370 { "stda",       0x0c0013c0, 0xfc001fc0, "cmx,V(s,b)", pa20, FLAG_STRICT},
 371 { "stda",       0x0c0013c0, 0xfc001fc0, "cmx,V(b)", pa20, FLAG_STRICT},
 372 { "ldwax",      0x0c000180, 0xfc00dfc0, "cxx(b),t", pa10, 0},
 373 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 374 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(b),t", pa10, 0},
 375 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 376 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(b),t", pa10, 0},
 377 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 378 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(b),t", pa10, 0},
 379 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 380 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(b),t", pa10, 0},
 381 { "ldwas",      0x0c001180, 0xfc00dfc0, "cm5(b),t", pa10, 0},
 382 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 383 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(b),t", pa10, 0},
 384 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
 385 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(b)", pa10, 0},
 386 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
 387 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(b)", pa10, 0},
 388 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
 389 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(b)", pa10, 0},
 390 { "stwas",      0x0c001380, 0xfc00dfc0, "cmx,V(b)", pa10, 0},
 391 { "stdby",      0x0c001340, 0xfc001fc0, "csx,V(s,b)", pa20, FLAG_STRICT},
 392 { "stdby",      0x0c001340, 0xfc001fc0, "csx,V(b)", pa20, FLAG_STRICT},
 393 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(s,b)", pa10, 0},
 394 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(b)", pa10, 0},
 395
 396 /* Immediate instructions.  */
 397 { "ldo",        0x34000000, 0xfc00c000, "j(b),x", pa10, 0},
 398 { "ldil",       0x20000000, 0xfc000000, "k,b", pa10, 0},
 399 { "addil",      0x28000000, 0xfc000000, "k,b,Z", pa10, 0},
 400 { "addil",      0x28000000, 0xfc000000, "k,b", pa10, 0},
 401
 402 /* Branching instructions. */
 403 { "b",          0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT},
 404 { "b",          0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT},
 405 { "b",          0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT},
 406 { "b",          0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT},
 407 { "b",          0xe8000000, 0xffe0e000, "nW", pa10, 0},  /* b,l foo,r0 */
 408 { "bl",         0xe8000000, 0xfc00e000, "nW,b", pa10, 0},
 409 { "gate",       0xe8002000, 0xfc00e000, "nW,b", pa10, 0},
 410 { "blr",        0xe8004000, 0xfc00e001, "nx,b", pa10, 0},
 411 { "bv",         0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0},
 412 { "bv",         0xe800c000, 0xfc00fffd, "n(b)", pa10, 0},
 413 { "bve",        0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT},
 414 { "bve",        0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT},
 415 { "bve",        0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT},
 416 { "bve",        0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
 417 { "be",         0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT},
 418 { "be",         0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT},
 419 { "be",         0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0},
 420 { "be",         0xe0000000, 0xfc000000, "nz(b)", pa10, 0},
 421 { "ble",        0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0},
 422 { "movb",       0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0},
 423 { "movib",      0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0},
 424 { "combt",      0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0},
 425 { "combf",      0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0},
 426 { "comibt",     0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0},
 427 { "comibf",     0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0},
 428 { "addbt",      0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0},
 429 { "addbf",      0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
 430 { "addibt",     0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
 431 { "addibf",     0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
 432 { "bb",         0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
 433 { "bb",         0xc4006000, 0xfc006000, "?Bnx,Q,w", pa20, FLAG_STRICT},
 434 { "bb",         0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
 435 { "bb",         0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0},
 436 { "bvb",        0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
 437 { "clrbts",     0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
 438 { "popbts",     0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
 439 { "pushnom",    0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
 440 { "pushbts",    0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 441
 442 /* Computation Instructions */
 443
 444 { "cmpclr",     0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
 445 { "cmpclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
 446 { "comclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0},
 447 { "or",         0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 448 { "or",         0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0},
 449 { "xor",        0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 450 { "xor",        0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0},
 451 { "and",        0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 452 { "and",        0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0},
 453 { "andcm",      0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 454 { "andcm",      0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0},
 455 { "uxor",       0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
 456 { "uxor",       0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0},
 457 { "uaddcm",     0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT},
 458 { "uaddcm",     0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT},
 459 { "uaddcm",     0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0},
 460 { "uaddcmt",    0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0},
 461 { "dcor",       0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT},
 462 { "dcor",       0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT},
 463 { "dcor",       0x08000b80, 0xfc1f0fe0, "?ub,t",   pa10, 0},
 464 { "idcor",      0x08000bc0, 0xfc1f0fe0, "?ub,t",   pa10, 0},
 465 { "addi",       0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT},
 466 { "addi",       0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT},
 467 { "addi",       0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0},
 468 { "addio",      0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0},
 469 { "addit",      0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0},
 470 { "addito",     0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0},
 471 { "add",        0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
 472 { "add",        0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
 473 { "add",        0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
 474 { "add",        0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
 475 { "add",        0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0},
 476 { "addl",       0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 477 { "addo",       0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 478 { "addc",       0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0},
 479 { "addco",      0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 480 { "sub",        0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
 481 { "sub",        0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
 482 { "sub",        0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
 483 { "sub",        0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
 484 { "sub",        0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
 485 { "sub",        0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
 486 { "sub",        0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0},
 487 { "subo",       0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0},
 488 { "subb",       0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0},
 489 { "subbo",      0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0},
 490 { "subt",       0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0},
 491 { "subto",      0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0},
 492 { "ds",         0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0},
 493 { "subi",       0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT},
 494 { "subi",       0x94000000, 0xfc000800, "?si,b,x", pa10, 0},
 495 { "subio",      0x94000800, 0xfc000800, "?si,b,x", pa10, 0},
 496 { "cmpiclr",    0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
 497 { "cmpiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
 498 { "comiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, 0},
 499 { "shladd",     0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT},
 500 { "shladd",     0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT},
 501 { "sh1add",     0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0},
 502 { "sh1addl",    0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0},
 503 { "sh1addo",    0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0},
 504 { "sh2add",     0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0},
 505 { "sh2addl",    0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0},
 506 { "sh2addo",    0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0},
 507 { "sh3add",     0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 508 { "sh3addl",    0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 509 { "sh3addo",    0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 510
 511 /* Subword Operation Instructions */
 512
 513 { "hadd",       0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 514 { "havg",       0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
 515 { "hshl",       0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
 516 { "hshladd",    0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 517 { "hshr",       0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT},
 518 { "hshradd",    0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 519 { "hsub",       0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 520 { "mixh",       0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 521 { "mixw",       0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 522 { "permh",      0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
 523
 524
 525 /* Extract and Deposit Instructions */
 526
 527 { "shrpd",      0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
 528 { "shrpd",      0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
 529 { "shrpw",      0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
 530 { "shrpw",      0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
 531 { "vshd",       0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0},
 532 { "shd",        0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0},
 533 { "extrd",      0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT},
 534 { "extrd",      0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT},
 535 { "extrw",      0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT},
 536 { "extrw",      0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT},
 537 { "vextru",     0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0},
 538 { "vextrs",     0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0},
 539 { "extru",      0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0},
 540 { "extrs",      0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0},
 541 { "depd",       0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT},
 542 { "depd",       0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT},
 543 { "depdi",      0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT},
 544 { "depdi",      0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT},
 545 { "depw",       0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT},
 546 { "depw",       0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT},
 547 { "depwi",      0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT},
 548 { "depwi",      0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT},
 549 { "zvdep",      0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0},
 550 { "vdep",       0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0},
 551 { "zdep",       0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0},
 552 { "dep",        0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0},
 553 { "zvdepi",     0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0},
 554 { "vdepi",      0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0},
 555 { "zdepi",      0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0},
 556 { "depi",       0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0},
 557
 558 /* System Control Instructions */
 559
 560 { "break",      0x00000000, 0xfc001fe0, "r,A", pa10, 0},
 561 { "rfi",        0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT},
 562 { "rfi",        0x00000c00, 0xffffffff, "", pa10, 0},
 563 { "rfir",       0x00000ca0, 0xffffffff, "", pa11, 0},
 564 { "ssm",        0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 565 { "ssm",        0x00000d60, 0xffe0ffe0, "R,t", pa10, 0},
 566 { "rsm",        0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 567 { "rsm",        0x00000e60, 0xffe0ffe0, "R,t", pa10, 0},
 568 { "mtsm",       0x00001860, 0xffe0ffff, "x", pa10, 0},
 569 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0},
 570 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(b),t", pa10, 0},
 571 { "mtsp",       0x00001820, 0xffe01fff, "x,S", pa10, 0},
 572 { "mtctl",      0x00001840, 0xfc00ffff, "x,^", pa10, 0},
 573 { "mtsarcm",    0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 574 { "mfia",       0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
 575 { "mfsp",       0x000004a0, 0xffff1fe0, "S,t", pa10, 0},
 576 { "mfctl",      0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT},
 577 { "mfctl",      0x000008a0, 0xfc1fffe0, "^,t", pa10, 0},
 578 { "sync",       0x00000400, 0xffffffff, "", pa10, 0},
 579 { "syncdma",    0x00100400, 0xffffffff, "", pa10, 0},
 580 { "probe",      0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT},
 581 { "probe",      0x04001180, 0xfc003fa0, "cw(b),x,t", pa10, FLAG_STRICT},
 582 { "probei",     0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT},
 583 { "probei",     0x04003180, 0xfc003fa0, "cw(b),R,t", pa10, FLAG_STRICT},
 584 { "prober",     0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0},
 585 { "prober",     0x04001180, 0xfc003fe0, "(b),x,t", pa10, 0},
 586 { "proberi",    0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0},
 587 { "proberi",    0x04003180, 0xfc003fe0, "(b),R,t", pa10, 0},
 588 { "probew",     0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0},
 589 { "probew",     0x040011c0, 0xfc003fe0, "(b),x,t", pa10, 0},
 590 { "probewi",    0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0},
 591 { "probewi",    0x040031c0, 0xfc003fe0, "(b),R,t", pa10, 0},
 592 { "lpa",        0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
 593 { "lpa",        0x04001340, 0xfc003fc0, "cZx(b),t", pa10, 0},
 594 { "lha",        0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
 595 { "lha",        0x04001300, 0xfc003fc0, "cZx(b),t", pa10, 0},
 596 { "lci",        0x04001300, 0xfc003fe0, "x(s,b),t", pa10, 0},
 597 { "lci",        0x04001300, 0xfc003fe0, "x(b),t", pa10, 0},
 598 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT},
 599 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 600 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 601 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(b)", pa10, 0},
 602 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT},
 603 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 604 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 605 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(b)", pa10, 0},
 606 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 607 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(b)", pa10, 0},
 608 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 609 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(b)", pa10, 0},
 610 { "idtlba",     0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0},
 611 { "idtlba",     0x04001040, 0xfc003fff, "x,(b)", pa10, 0},
 612 { "iitlba",     0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0},
 613 { "iitlba",     0x04000040, 0xfc001fff, "x,(b)", pa10, 0},
 614 { "idtlbp",     0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0},
 615 { "idtlbp",     0x04001000, 0xfc003fff, "x,(b)", pa10, 0},
 616 { "iitlbp",     0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0},
 617 { "iitlbp",     0x04000000, 0xfc001fff, "x,(b)", pa10, 0},
 618 { "pdc",        0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 619 { "pdc",        0x04001380, 0xfc003fdf, "cZx(b)", pa10, 0},
 620 { "fdc",        0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 621 { "fdc",        0x04001280, 0xfc003fdf, "cZx(b)", pa10, 0},
 622 { "fic",        0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 623 { "fic",        0x04000280, 0xfc001fdf, "cZx(b)", pa10, 0},
 624 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 625 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(b)", pa10, 0},
 626 { "fice",       0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 627 { "fice",       0x040002c0, 0xfc001fdf, "cZx(b)", pa10, 0},
 628 { "diag",       0x14000000, 0xfc000000, "D", pa10, 0},
 629 { "idtlbt",     0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
 630 { "iitlbt",     0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
 631
 632 /* These may be specific to certain versions of the PA.  Joel claimed
 633    they were 72000 (7200?) specific.  However, I'm almost certain the
 634    mtcpu/mfcpu were undocumented, but available in the older 700 machines.  */
 635 { "mtcpu",      0x14001600, 0xfc00ffff, "x,^", pa10, 0},
 636 { "mfcpu",      0x14001A00, 0xfc00ffff, "^,x", pa10, 0},
 637 { "tocen",      0x14403600, 0xffffffff, "", pa10, 0},
 638 { "tocdis",     0x14401620, 0xffffffff, "", pa10, 0},
 639 { "shdwgr",     0x14402600, 0xffffffff, "", pa10, 0},
 640 { "grshdw",     0x14400620, 0xffffffff, "", pa10, 0},
 641
 642 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
 643    the Timex FPU or the Mustang ERS (not sure which) manual.  */
 644 { "gfw",        0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0},
 645 { "gfw",        0x04001680, 0xfc003fdf, "cZx(b)", pa11, 0},
 646 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0},
 647 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(b)", pa11, 0},
 648
 649 /* Floating Point Coprocessor Instructions */
 650
 651 { "fldw",       0x24000000, 0xfc001f80, "cxx(s,b),fT", pa10, FLAG_STRICT},
 652 { "fldw",       0x24000000, 0xfc001f80, "cxx(b),fT", pa10, FLAG_STRICT},
 653 { "fldw",       0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, FLAG_STRICT},
 654 { "fldw",       0x24001000, 0xfc001f80, "cm5(b),fT", pa10, FLAG_STRICT},
 655 { "fldw",       0x5c000000, 0xfc000004, "d(s,b),fe", pa20, FLAG_STRICT},
 656 { "fldw",       0x5c000000, 0xfc000004, "d(b),fe", pa20, FLAG_STRICT},
 657 { "fldw",       0x58000000, 0xfc000004, "cJd(s,b),fe", pa20, FLAG_STRICT},
 658 { "fldw",       0x58000000, 0xfc000004, "cJd(b),fe", pa20, FLAG_STRICT},
 659 { "fldd",       0x2c000000, 0xfc001fc0, "cxx(s,b),ft", pa10, FLAG_STRICT},
 660 { "fldd",       0x2c000000, 0xfc001fc0, "cxx(b),ft", pa10, FLAG_STRICT},
 661 { "fldd",       0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, FLAG_STRICT},
 662 { "fldd",       0x2c001000, 0xfc001fc0, "cm5(b),ft", pa10, FLAG_STRICT},
 663 { "fldd",       0x50000002, 0xfc000002, "cq#(s,b),x", pa20, FLAG_STRICT},
 664 { "fldd",       0x50000002, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT},
 665 { "fstw",       0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, FLAG_STRICT},
 666 { "fstw",       0x24000200, 0xfc001f80, "cxfT,x(b)", pa10, FLAG_STRICT},
 667 { "fstw",       0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, FLAG_STRICT},
 668 { "fstw",       0x24001200, 0xfc001f80, "cmfT,5(b)", pa10, FLAG_STRICT},
 669 { "fstw",       0x7c000000, 0xfc000004, "fe,d(s,b)", pa20, FLAG_STRICT},
 670 { "fstw",       0x7c000000, 0xfc000004, "fe,d(b)", pa20, FLAG_STRICT},
 671 { "fstw",       0x78000000, 0xfc000004, "cJfe,d(s,b)", pa20, FLAG_STRICT},
 672 { "fstw",       0x78000000, 0xfc000004, "cJfe,d(b)", pa20, FLAG_STRICT},
 673 { "fstd",       0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, FLAG_STRICT},
 674 { "fstd",       0x2c000200, 0xfc001fc0, "cxft,x(b)", pa10, FLAG_STRICT},
 675 { "fstd",       0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, FLAG_STRICT},
 676 { "fstd",       0x2c001200, 0xfc001fc0, "cmft,5(b)", pa10, FLAG_STRICT},
 677 { "fstd",       0x70000002, 0xfc000002, "cqx,#(s,b)", pa20, FLAG_STRICT},
 678 { "fstd",       0x70000002, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT},
 679 { "fldwx",      0x24000000, 0xfc001f80, "cxx(s,b),fT", pa10, 0},
 680 { "fldwx",      0x24000000, 0xfc001f80, "cxx(b),fT", pa10, 0},
 681 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(s,b),ft", pa10, 0},
 682 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(b),ft", pa10, 0},
 683 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0},
 684 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(b)", pa10, 0},
 685 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
 686 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
 687 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
 688 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
 689 { "fldws",      0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0},
 690 { "fldws",      0x24001000, 0xfc001f80, "cm5(b),fT", pa10, 0},
 691 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0},
 692 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(b),ft", pa10, 0},
 693 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0},
 694 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(b)", pa10, 0},
 695 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
 696 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
 697 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
 698 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
 699 { "fadd",       0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 700 { "fadd",       0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 701 { "fsub",       0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 702 { "fsub",       0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 703 { "fmpy",       0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 704 { "fmpy",       0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 705 { "fdiv",       0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 706 { "fdiv",       0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 707 { "fsqrt",      0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 708 { "fsqrt",      0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0},
 709 { "fabs",       0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 710 { "fabs",       0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0},
 711 { "frem",       0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 712 { "frem",       0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0},
 713 { "frnd",       0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 714 { "frnd",       0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0},
 715 { "fcpy",       0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 716 { "fcpy",       0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0},
 717 { "fcnvff",     0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 718 { "fcnvff",     0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 719 { "fcnvxf",     0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 720 { "fcnvxf",     0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 721 { "fcnvfx",     0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 722 { "fcnvfx",     0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 723 { "fcnvfxt",    0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 724 { "fcnvfxt",    0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 725 { "fmpyfadd",   0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
 726 { "fmpynfadd",  0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
 727 { "fneg",       0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
 728 { "fneg",       0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
 729 { "fnegabs",    0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
 730 { "fnegabs",    0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
 731 { "fcnv",       0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT},
 732 { "fcnv",       0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT},
 733 { "fcmp",       0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT},
 734 { "fcmp",       0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT},
 735 { "fcmp",       0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0},
 736 { "fcmp",       0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0},
 737 { "xmpyu",      0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0},
 738 { "fmpyadd",    0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
 739 { "fmpysub",    0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
 740 { "ftest",      0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT},
 741 { "ftest",      0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT},
 742 { "ftest",      0x30002420, 0xffffffff, "", pa10, 0},
 743 { "fid",        0x30000000, 0xffffffff, "", pa11, 0},
 744
 745 /* Performance Monitor Instructions */
 746
 747 { "pmdis",      0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT},
 748 { "pmenb",      0x30000680, 0xffffffff, "", pa20, FLAG_STRICT},
 749
 750 /* Assist Instructions */
 751
 752 { "spop0",      0x10000000, 0xfc000600, "v,ON", pa10, 0},
 753 { "spop1",      0x10000200, 0xfc000600, "v,oNt", pa10, 0},
 754 { "spop2",      0x10000400, 0xfc000600, "v,1Nb", pa10, 0},
 755 { "spop3",      0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0},
 756 { "copr",       0x30000000, 0xfc000000, "u,2N", pa10, 0},
 757 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
 758 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
 759 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
 760 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
 761 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
 762 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
 763 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
 764 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
 765 { "cldws",      0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
 766 { "cldws",      0x24001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
 767 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
 768 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
 769 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
 770 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
 771 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
 772 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
 773 { "cldw",       0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
 774 { "cldw",       0x24000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
 775 { "cldw",       0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
 776 { "cldw",       0x24001000, 0xfc001e00, "ucm5(b),t", pa10, FLAG_STRICT},
 777 { "cldd",       0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
 778 { "cldd",       0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
 779 { "cldd",       0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
 780 { "cldd",       0x2c001000, 0xfc001e00, "ucm5(b),t", pa20, FLAG_STRICT},
 781 { "cstw",       0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
 782 { "cstw",       0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
 783 { "cstw",       0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
 784 { "cstw",       0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
 785 { "cstd",       0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
 786 { "cstd",       0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
 787 { "cstd",       0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
 788 { "cstd",       0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
 789 };
 790
 791 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
 792
 793 /* SKV 12/18/92. Added some denotations for various operands. */
 794
 795 #define PA_IMM11_AT_31 'i'
 796 #define PA_IMM14_AT_31 'j'
 797 #define PA_IMM21_AT_31 'k'
 798 #define PA_DISP12 'w'
 799 #define PA_DISP17 'W'
 800
 801 #define N_HPPA_OPERAND_FORMATS 5