include/opcode/hppa.h

   1 /* Table of opcodes for the PA-RISC.
   2    Copyright (C) 1990, 1991, 1993, 1995, 1999, 2000
   3    Free Software Foundation, Inc.
   4
   5    Contributed by the Center for Software Science at the
   6    University of Utah (pa-gdb-bugs@cs.utah.edu).
   7
   8 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
   9
  10 GAS/GDB is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 1, or (at your option)
  13 any later version.
  14
  15 GAS/GDB is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with GAS or GDB; see the file COPYING.  If not, write to
  22 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  23
  24 #if !defined(__STDC__) && !defined(const)
  25 #define const
  26 #endif
  27
  28 /*
  29  * Structure of an opcode table entry.
  30  */
  31
  32 /* There are two kinds of delay slot nullification: normal which is
  33  * controled by the nullification bit, and conditional, which depends
  34  * on the direction of the branch and its success or failure.
  35  *
  36  * NONE is unfortunately #defined in the hiux system include files.
  37  * #undef it away.
  38  */
  39 #undef NONE
  40 struct pa_opcode
  41 {
  42     const char *name;
  43     unsigned long int match;    /* Bits that must be set...  */
  44     unsigned long int mask;     /* ... in these bits. */
  45     char *args;
  46     enum pa_arch arch;
  47     char flags;
  48 };
  49
  50 /* Enable/disable strict syntax checking.  Not currently used, but will
  51    be necessary for PA2.0 support in the future.  */
  52 #define FLAG_STRICT 0x1
  53
  54 /*
  55    All hppa opcodes are 32 bits.
  56
  57    The match component is a mask saying which bits must match a
  58    particular opcode in order for an instruction to be an instance
  59    of that opcode.
  60
  61    The args component is a string containing one character for each operand of
  62    the instruction.  Characters used as a prefix allow any second character to
  63    be used without conflicting with the main operand characters.
  64
  65    Bit positions in this description follow HP usage of lsb = 31,
  66    "at" is lsb of field.
  67
  68    In the args field, the following characters must match exactly:
  69
  70         '+,() '
  71
  72    In the args field, the following characters are unused:
  73
  74         '  "         -  /   34 6789:;< > @'
  75         '  C         M             [\]  '
  76         '    e g                     } '
  77
  78    Here are all the characters:
  79
  80         ' !"#$%&'()*+-,./0123456789:;<=>?@'
  81         'ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
  82         'abcdefghijklmnopqrstuvwxyz{|}~'
  83
  84 Kinds of operands:
  85    x    integer register field at 15.
  86    b    integer register field at 10.
  87    t    integer register field at 31.
  88    a    integer register field at 10 and 15 (for PERMH)
  89    5    5 bit immediate at 15.
  90    s    2 bit space specifier at 17.
  91    S    3 bit space specifier at 18.
  92    V    5 bit immediate value at 31
  93    i    11 bit immediate value at 31
  94    j    14 bit immediate value at 31
  95    k    21 bit immediate value at 31
  96    l    16 bit immediate value at 31 (wide mode only, unusual encoding).
  97    n    nullification for branch instructions
  98    N    nullification for spop and copr instructions
  99    w    12 bit branch displacement
 100    W    17 bit branch displacement (PC relative)
 101    X    22 bit branch displacement (PC relative)
 102    z    17 bit branch displacement (just a number, not an address)
 103
 104 Also these:
 105
 106    .    2 bit shift amount at 25
 107    *    4 bit shift amount at 25
 108    p    5 bit shift count at 26 (to support the SHD instruction) encoded as
 109         31-p
 110    ~    6 bit shift count at 20,22:26 encoded as 63-~.
 111    P    5 bit bit position at 26
 112    q    6 bit bit position at 20,22:26
 113    T    5 bit field length at 31 (encoded as 32-T)
 114    %    6 bit field length at 23,27:31 (variable extract/deposit)
 115    |    6 bit field length at 19,27:31 (fixed extract/deposit)
 116    A    13 bit immediate at 18 (to support the BREAK instruction)
 117    ^    like b, but describes a control register
 118    !    sar (cr11) register
 119    D    26 bit immediate at 31 (to support the DIAG instruction)
 120    $    9 bit immediate at 28 (to support POPBTS)
 121
 122    v    3 bit Special Function Unit identifier at 25
 123    O    20 bit Special Function Unit operation split between 15 bits at 20
 124         and 5 bits at 31
 125    o    15 bit Special Function Unit operation at 20
 126    2    22 bit Special Function Unit operation split between 17 bits at 20
 127         and 5 bits at 31
 128    1    15 bit Special Function Unit operation split between 10 bits at 20
 129         and 5 bits at 31
 130    0    10 bit Special Function Unit operation split between 5 bits at 20
 131         and 5 bits at 31
 132    u    3 bit coprocessor unit identifier at 25
 133    F    Source Floating Point Operand Format Completer encoded 2 bits at 20
 134    I    Source Floating Point Operand Format Completer encoded 1 bits at 20
 135         (for 0xe format FP instructions)
 136    G    Destination Floating Point Operand Format Completer encoded 2 bits at 18
 137    H    Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
 138         (very similar to 'F')
 139
 140    r    5 bit immediate value at 31 (for the break instruction)
 141         (very similar to V above, except the value is unsigned instead of
 142         low_sign_ext)
 143    R    5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
 144         (same as r above, except the value is in a different location)
 145    U    10 bit immediate value at 15 (for SSM, RSM on pa2.0)
 146    Q    5 bit immediate value at 10 (a bit position specified in
 147         the bb instruction. It's the same as r above, except the
 148         value is in a different location)
 149    B    5 bit immediate value at 10 (a bit position specified in
 150         the bb instruction. Similar to Q, but 64bit handling is
 151         different.
 152    Z    %r1 -- implicit target of addil instruction.
 153    L    ,%r2 completer for new syntax branch
 154    {    Source format completer for fcnv
 155    _    Destination format completer for fcnv
 156    h    cbit for fcmp
 157    =    gfx tests for ftest
 158    d    14bit offset for single precision FP long load/store.
 159    #    14bit offset for double precision FP load long/store.
 160    J    Yet another 14bit offset with an unusual encoding.
 161    K    Yet another 14bit offset with an unusual encoding.
 162    y    16bit offset for single precision FP long load/store (PA2.0 wide).
 163    &    16bit offset for double precision FP long load/store (PA2.0 wide).
 164    Y    %sr0,%r31 -- implicit target of be,l instruction.
 165    @    implicit immediate value of 0
 166
 167 Completer operands all have 'c' as the prefix:
 168
 169    cx   indexed load completer.
 170    cm   short load and store completer.
 171    cq   long load and store completer (like cm, but inserted into a
 172         different location in the target instruction).
 173    cs   store bytes short completer.
 174    ce   long load/store completer for LDW/STW with a different encoding than the
 175         others
 176    cc   load cache control hint
 177    cd   load and clear cache control hint
 178    cC   store cache control hint
 179    co   ordered access
 180
 181    cp   branch link and push completer
 182    cP   branch pop completer
 183    cl   branch link completer
 184    cg   branch gate completer
 185
 186    cw   read/write completer for PROBE
 187    cW   wide completer for MFCTL
 188    cL   local processor completer for cache control
 189    cZ   System Control Completer (to support LPA, LHA, etc.)
 190
 191    ci   correction completer for DCOR
 192    ca   add completer
 193    cy   32 bit add carry completer
 194    cY   64 bit add carry completer
 195    cv   signed overflow trap completer
 196    ct   trap on condition completer for ADDI, SUB
 197    cT   trap on condition completer for UADDCM
 198    cb   32 bit borrow completer for SUB
 199    cB   64 bit borrow completer for SUB
 200
 201    ch   left/right half completer
 202    cH   signed/unsigned saturation completer
 203    cS   signed/unsigned completer at 21
 204    cz   zero/sign extension completer.
 205    c*   permutation completer
 206
 207 Condition operands all have '?' as the prefix:
 208
 209    ?f   Floating point compare conditions (encoded as 5 bits at 31)
 210
 211    ?a   add conditions
 212    ?A   64 bit add conditions
 213    ?@   add branch conditions followed by nullify
 214    ?d   non-negated add branch conditions
 215    ?D   negated add branch conditions
 216    ?w   wide mode non-negated add branch conditions
 217    ?W   wide mode negated add branch conditions
 218
 219    ?s   compare/subtract conditions
 220    ?S   64 bit compare/subtract conditions
 221    ?t   non-negated compare and branch conditions
 222    ?n   32 bit compare and branch conditions followed by nullify
 223    ?N   64 bit compare and branch conditions followed by nullify
 224    ?Q   64 bit compare and branch conditions for CMPIB instruction
 225
 226    ?l   logical conditions
 227    ?L   64 bit logical conditions
 228
 229    ?b   branch on bit conditions
 230    ?B   64 bit branch on bit conditions
 231
 232    ?x   shift/extract/deposit conditions
 233    ?X   64 bit shift/extract/deposit conditions
 234    ?y   shift/extract/deposit conditions followed by nullify for conditional
 235         branches
 236
 237    ?u   unit conditions
 238    ?U   64 bit unit conditions
 239
 240 Floating point registers all have 'f' as a prefix:
 241
 242    ft   target register at 31
 243    fT   target register with L/R halves at 31
 244    fa   operand 1 register at 10
 245    fA   operand 1 register with L/R halves at 10
 246    fX   Same as fA, except prints a space before register during disasm
 247    fb   operand 2 register at 15
 248    fB   operand 2 register with L/R halves at 15
 249    fC   operand 3 register with L/R halves at 16:18,21:23
 250    fe   Like fT, but encoding is different.
 251    fE   Same as fe, except prints a space before register during disasm.
 252    fx   target register at 15 (only for PA 2.0 long format FLDD/FSTD).
 253
 254 Float registers for fmpyadd and fmpysub:
 255
 256    fi   mult operand 1 register at 10
 257    fj   mult operand 2 register at 15
 258    fk   mult target register at 20
 259    fl   add/sub operand register at 25
 260    fm   add/sub target register at 31
 261
 262 */
 263
 264
 265 /* List of characters not to put a space after.  Note that
 266    "," is included, as the "spopN" operations use literal
 267    commas in their completer sections.  */
 268 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
 269
 270 /* The order of the opcodes in this table is significant:
 271
 272    * The assembler requires that all instances of the same mnemonic must be
 273    consecutive.  If they aren't, the assembler will bomb at runtime.
 274
 275    * The disassembler should not care about the order of the opcodes.  */
 276
 277 static const struct pa_opcode pa_opcodes[] =
 278 {
 279
 280 /* Pseudo-instructions.  */
 281
 282 { "ldi",        0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */
 283
 284 { "call",       0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
 285 { "call",       0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT},
 286 { "ret",        0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT},
 287
 288 { "cmpib",      0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT},
 289 { "cmpib",      0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT},
 290 { "comib",      0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
 291 /* This entry is for the disassembler only.  It will never be used by
 292    assembler.  */
 293 { "comib",      0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
 294 { "cmpb",       0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT},
 295 { "cmpb",       0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT},
 296 { "comb",       0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
 297 /* This entry is for the disassembler only.  It will never be used by
 298    assembler.  */
 299 { "comb",       0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
 300 { "addb",       0xa0000000, 0xf4000000, "?Wnx,b,w", pa20, FLAG_STRICT},
 301 { "addb",       0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */
 302 /* This entry is for the disassembler only.  It will never be used by
 303    assembler.  */
 304 { "addb",       0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0},
 305 { "addib",      0xa4000000, 0xf4000000, "?Wn5,b,w", pa20, FLAG_STRICT},
 306 { "addib",      0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
 307 /* This entry is for the disassembler only.  It will never be used by
 308    assembler.  */
 309 { "addib",      0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
 310 { "nop",        0x08000240, 0xffffffff, "", pa10, 0},      /* or 0,0,0 */
 311 { "copy",       0x08000240, 0xffe0ffe0, "x,t", pa10, 0},   /* or r,0,t */
 312 { "mtsar",      0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */
 313
 314 /* Loads and Stores for integer registers.  */
 315
 316 { "ldd",        0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 317 { "ldd",        0x0c0010e0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 318 { "ldd",        0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT},
 319 { "ldd",        0x0c0000c0, 0xfc0013c0, "cxccx(b),t", pa20, FLAG_STRICT},
 320 { "ldd",        0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT},
 321 { "ldd",        0x0c0010c0, 0xfc0013c0, "cmcc5(b),t", pa20, FLAG_STRICT},
 322 { "ldd",        0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT},
 323 { "ldd",        0x50000000, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT},
 324 { "ldw",        0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 325 { "ldw",        0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
 326 { "ldw",        0x0c000080, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
 327 { "ldw",        0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 328 { "ldw",        0x0c0010a0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 329 { "ldw",        0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
 330 { "ldw",        0x0c001080, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 331 { "ldw",        0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT},
 332 { "ldw",        0x4c000000, 0xfc000000, "ceJ(b),x", pa10, FLAG_STRICT},
 333 { "ldw",        0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT},
 334 { "ldw",        0x5c000004, 0xfc000006, "ceK(b),x", pa20, FLAG_STRICT},
 335 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
 336 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
 337 { "ldw",        0x48000000, 0xfc000000, "j(b),x", pa10, 0},
 338 { "ldh",        0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 339 { "ldh",        0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
 340 { "ldh",        0x0c000040, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
 341 { "ldh",        0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 342 { "ldh",        0x0c001060, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 343 { "ldh",        0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
 344 { "ldh",        0x0c001040, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 345 { "ldh",        0x44000000, 0xfc000000, "j(s,b),x", pa10, 0},
 346 { "ldh",        0x44000000, 0xfc000000, "j(b),x", pa10, 0},
 347 { "ldb",        0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 348 { "ldb",        0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
 349 { "ldb",        0x0c000000, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
 350 { "ldb",        0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 351 { "ldb",        0x0c001020, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 352 { "ldb",        0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
 353 { "ldb",        0x0c001000, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 354 { "ldb",        0x40000000, 0xfc000000, "j(s,b),x", pa10, 0},
 355 { "ldb",        0x40000000, 0xfc000000, "j(b),x", pa10, 0},
 356 { "std",        0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 357 { "std",        0x0c0012e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 358 { "std",        0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
 359 { "std",        0x0c0012c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
 360 { "std",        0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT},
 361 { "std",        0x70000000, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT},
 362 { "stw",        0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 363 { "stw",        0x0c0012a0, 0xfc0013ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 364 { "stw",        0x0c0012a0, 0xfc0013ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 365 { "stw",        0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
 366 { "stw",        0x0c001280, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 367 { "stw",        0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT},
 368 { "stw",        0x6c000000, 0xfc000000, "cex,J(b)", pa10, FLAG_STRICT},
 369 { "stw",        0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT},
 370 { "stw",        0x7c000004, 0xfc000006, "cex,K(b)", pa20, FLAG_STRICT},
 371 { "stw",        0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 372 { "stw",        0x68000000, 0xfc000000, "x,j(b)", pa10, 0},
 373 { "sth",        0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 374 { "sth",        0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 375 { "sth",        0x0c001260, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 376 { "sth",        0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
 377 { "sth",        0x0c001240, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 378 { "sth",        0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 379 { "sth",        0x64000000, 0xfc000000, "x,j(b)", pa10, 0},
 380 { "stb",        0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 381 { "stb",        0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 382 { "stb",        0x0c001220, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 383 { "stb",        0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
 384 { "stb",        0x0c001200, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 385 { "stb",        0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 386 { "stb",        0x60000000, 0xfc000000, "x,j(b)", pa10, 0},
 387 { "ldwm",       0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0},
 388 { "ldwm",       0x4c000000, 0xfc000000, "j(b),x", pa10, 0},
 389 { "stwm",       0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 390 { "stwm",       0x6c000000, 0xfc000000, "x,j(b)", pa10, 0},
 391 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 392 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(b),t", pa10, 0},
 393 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 394 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(b),t", pa10, 0},
 395 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 396 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(b),t", pa10, 0},
 397 { "ldwa",       0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa10, FLAG_STRICT},
 398 { "ldwa",       0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 399 { "ldcw",       0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa10, FLAG_STRICT},
 400 { "ldcw",       0x0c0001c0, 0xfc0013c0, "cxcdx(b),t", pa10, FLAG_STRICT},
 401 { "ldcw",       0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa10, FLAG_STRICT},
 402 { "ldcw",       0x0c0011c0, 0xfc0013c0, "cmcd5(b),t", pa10, FLAG_STRICT},
 403 { "stwa",       0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 404 { "stwa",       0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 405 { "stby",       0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa10, FLAG_STRICT},
 406 { "stby",       0x0c001300, 0xfc0013c0, "cscCx,V(b)", pa10, FLAG_STRICT},
 407 { "ldda",       0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT},
 408 { "ldda",       0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT},
 409 { "ldcd",       0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT},
 410 { "ldcd",       0x0c000140, 0xfc0013c0, "cxcdx(b),t", pa20, FLAG_STRICT},
 411 { "ldcd",       0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT},
 412 { "ldcd",       0x0c001140, 0xfc0013c0, "cmcd5(b),t", pa20, FLAG_STRICT},
 413 { "stda",       0x0c0013e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 414 { "stda",       0x0c0013e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 415 { "stda",       0x0c0013c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
 416 { "stda",       0x0c0013c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
 417 { "ldwax",      0x0c000180, 0xfc00dfc0, "cxx(b),t", pa10, 0},
 418 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 419 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(b),t", pa10, 0},
 420 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 421 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(b),t", pa10, 0},
 422 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 423 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(b),t", pa10, 0},
 424 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 425 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(b),t", pa10, 0},
 426 { "ldwas",      0x0c001180, 0xfc00dfc0, "cm5(b),t", pa10, 0},
 427 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 428 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(b),t", pa10, 0},
 429 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
 430 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(b)", pa10, 0},
 431 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
 432 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(b)", pa10, 0},
 433 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
 434 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(b)", pa10, 0},
 435 { "stwas",      0x0c001380, 0xfc00dfc0, "cmx,V(b)", pa10, 0},
 436 { "stdby",      0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT},
 437 { "stdby",      0x0c001340, 0xfc0013c0, "cscCx,V(b)", pa20, FLAG_STRICT},
 438 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(s,b)", pa10, 0},
 439 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(b)", pa10, 0},
 440
 441 /* Immediate instructions.  */
 442 { "ldo",        0x34000000, 0xfc00c000, "j(b),x", pa10, 0},
 443 { "ldil",       0x20000000, 0xfc000000, "k,b", pa10, 0},
 444 { "addil",      0x28000000, 0xfc000000, "k,b,Z", pa10, 0},
 445 { "addil",      0x28000000, 0xfc000000, "k,b", pa10, 0},
 446
 447 /* Branching instructions.  */
 448 { "b",          0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT},
 449 { "b",          0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT},
 450 { "b",          0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT},
 451 { "b",          0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT},
 452 { "b",          0xe8000000, 0xffe0e000, "nW", pa10, 0},  /* b,l foo,r0 */
 453 { "bl",         0xe8000000, 0xfc00e000, "nW,b", pa10, 0},
 454 { "gate",       0xe8002000, 0xfc00e000, "nW,b", pa10, 0},
 455 { "blr",        0xe8004000, 0xfc00e001, "nx,b", pa10, 0},
 456 { "bv",         0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0},
 457 { "bv",         0xe800c000, 0xfc00fffd, "n(b)", pa10, 0},
 458 { "bve",        0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT},
 459 { "bve",        0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT},
 460 { "bve",        0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT},
 461 { "bve",        0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
 462 { "be",         0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT},
 463 { "be",         0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT},
 464 { "be",         0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0},
 465 { "be",         0xe0000000, 0xfc000000, "nz(b)", pa10, 0},
 466 { "ble",        0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0},
 467 { "movb",       0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0},
 468 { "movib",      0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0},
 469 { "combt",      0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0},
 470 { "combf",      0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0},
 471 { "comibt",     0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0},
 472 { "comibf",     0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0},
 473 { "addbt",      0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0},
 474 { "addbf",      0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
 475 { "addibt",     0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
 476 { "addibf",     0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
 477 { "bb",         0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
 478 { "bb",         0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT},
 479 { "bb",         0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
 480 { "bb",         0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0},
 481 { "bvb",        0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
 482 { "clrbts",     0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
 483 { "popbts",     0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
 484 { "pushnom",    0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
 485 { "pushbts",    0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 486
 487 /* Computation Instructions.  */
 488
 489 { "cmpclr",     0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
 490 { "cmpclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
 491 { "comclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0},
 492 { "or",         0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 493 { "or",         0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0},
 494 { "xor",        0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 495 { "xor",        0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0},
 496 { "and",        0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 497 { "and",        0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0},
 498 { "andcm",      0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 499 { "andcm",      0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0},
 500 { "uxor",       0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
 501 { "uxor",       0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0},
 502 { "uaddcm",     0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT},
 503 { "uaddcm",     0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT},
 504 { "uaddcm",     0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0},
 505 { "uaddcmt",    0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0},
 506 { "dcor",       0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT},
 507 { "dcor",       0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT},
 508 { "dcor",       0x08000b80, 0xfc1f0fe0, "?ub,t",   pa10, 0},
 509 { "idcor",      0x08000bc0, 0xfc1f0fe0, "?ub,t",   pa10, 0},
 510 { "addi",       0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT},
 511 { "addi",       0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT},
 512 { "addi",       0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0},
 513 { "addio",      0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0},
 514 { "addit",      0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0},
 515 { "addito",     0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0},
 516 { "add",        0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
 517 { "add",        0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
 518 { "add",        0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
 519 { "add",        0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
 520 { "add",        0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0},
 521 { "addl",       0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 522 { "addo",       0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 523 { "addc",       0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0},
 524 { "addco",      0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 525 { "sub",        0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
 526 { "sub",        0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
 527 { "sub",        0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
 528 { "sub",        0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
 529 { "sub",        0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
 530 { "sub",        0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
 531 { "sub",        0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0},
 532 { "subo",       0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0},
 533 { "subb",       0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0},
 534 { "subbo",      0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0},
 535 { "subt",       0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0},
 536 { "subto",      0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0},
 537 { "ds",         0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0},
 538 { "subi",       0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT},
 539 { "subi",       0x94000000, 0xfc000800, "?si,b,x", pa10, 0},
 540 { "subio",      0x94000800, 0xfc000800, "?si,b,x", pa10, 0},
 541 { "cmpiclr",    0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
 542 { "cmpiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
 543 { "comiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, 0},
 544 { "shladd",     0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT},
 545 { "shladd",     0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT},
 546 { "sh1add",     0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0},
 547 { "sh1addl",    0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0},
 548 { "sh1addo",    0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0},
 549 { "sh2add",     0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0},
 550 { "sh2addl",    0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0},
 551 { "sh2addo",    0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0},
 552 { "sh3add",     0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 553 { "sh3addl",    0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 554 { "sh3addo",    0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 555
 556 /* Subword Operation Instructions.  */
 557
 558 { "hadd",       0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 559 { "havg",       0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
 560 { "hshl",       0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
 561 { "hshladd",    0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 562 { "hshr",       0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT},
 563 { "hshradd",    0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 564 { "hsub",       0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 565 { "mixh",       0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 566 { "mixw",       0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 567 { "permh",      0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
 568
 569
 570 /* Extract and Deposit Instructions.  */
 571
 572 { "shrpd",      0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
 573 { "shrpd",      0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
 574 { "shrpw",      0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
 575 { "shrpw",      0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
 576 { "vshd",       0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0},
 577 { "shd",        0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0},
 578 { "extrd",      0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT},
 579 { "extrd",      0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT},
 580 { "extrw",      0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT},
 581 { "extrw",      0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT},
 582 { "vextru",     0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0},
 583 { "vextrs",     0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0},
 584 { "extru",      0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0},
 585 { "extrs",      0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0},
 586 { "depd",       0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT},
 587 { "depd",       0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT},
 588 { "depdi",      0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT},
 589 { "depdi",      0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT},
 590 { "depw",       0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT},
 591 { "depw",       0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT},
 592 { "depwi",      0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT},
 593 { "depwi",      0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT},
 594 { "zvdep",      0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0},
 595 { "vdep",       0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0},
 596 { "zdep",       0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0},
 597 { "dep",        0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0},
 598 { "zvdepi",     0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0},
 599 { "vdepi",      0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0},
 600 { "zdepi",      0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0},
 601 { "depi",       0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0},
 602
 603 /* System Control Instructions.  */
 604
 605 { "break",      0x00000000, 0xfc001fe0, "r,A", pa10, 0},
 606 { "rfi",        0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT},
 607 { "rfi",        0x00000c00, 0xffffffff, "", pa10, 0},
 608 { "rfir",       0x00000ca0, 0xffffffff, "", pa11, 0},
 609 { "ssm",        0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 610 { "ssm",        0x00000d60, 0xffe0ffe0, "R,t", pa10, 0},
 611 { "rsm",        0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 612 { "rsm",        0x00000e60, 0xffe0ffe0, "R,t", pa10, 0},
 613 { "mtsm",       0x00001860, 0xffe0ffff, "x", pa10, 0},
 614 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0},
 615 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(b),t", pa10, 0},
 616 { "mtsp",       0x00001820, 0xffe01fff, "x,S", pa10, 0},
 617 { "mtctl",      0x00001840, 0xfc00ffff, "x,^", pa10, 0},
 618 { "mtsarcm",    0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 619 { "mfia",       0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
 620 { "mfsp",       0x000004a0, 0xffff1fe0, "S,t", pa10, 0},
 621 { "mfctl",      0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT},
 622 { "mfctl",      0x000008a0, 0xfc1fffe0, "^,t", pa10, 0},
 623 { "sync",       0x00000400, 0xffffffff, "", pa10, 0},
 624 { "syncdma",    0x00100400, 0xffffffff, "", pa10, 0},
 625 { "probe",      0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT},
 626 { "probe",      0x04001180, 0xfc003fa0, "cw(b),x,t", pa10, FLAG_STRICT},
 627 { "probei",     0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT},
 628 { "probei",     0x04003180, 0xfc003fa0, "cw(b),R,t", pa10, FLAG_STRICT},
 629 { "prober",     0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0},
 630 { "prober",     0x04001180, 0xfc003fe0, "(b),x,t", pa10, 0},
 631 { "proberi",    0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0},
 632 { "proberi",    0x04003180, 0xfc003fe0, "(b),R,t", pa10, 0},
 633 { "probew",     0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0},
 634 { "probew",     0x040011c0, 0xfc003fe0, "(b),x,t", pa10, 0},
 635 { "probewi",    0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0},
 636 { "probewi",    0x040031c0, 0xfc003fe0, "(b),R,t", pa10, 0},
 637 { "lpa",        0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
 638 { "lpa",        0x04001340, 0xfc003fc0, "cZx(b),t", pa10, 0},
 639 { "lha",        0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
 640 { "lha",        0x04001300, 0xfc003fc0, "cZx(b),t", pa10, 0},
 641 { "lci",        0x04001300, 0xfc003fe0, "x(s,b),t", pa10, 0},
 642 { "lci",        0x04001300, 0xfc003fe0, "x(b),t", pa10, 0},
 643 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT},
 644 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 645 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 646 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(b)", pa10, 0},
 647 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT},
 648 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 649 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 650 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(b)", pa10, 0},
 651 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 652 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(b)", pa10, 0},
 653 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 654 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(b)", pa10, 0},
 655 { "idtlba",     0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0},
 656 { "idtlba",     0x04001040, 0xfc003fff, "x,(b)", pa10, 0},
 657 { "iitlba",     0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0},
 658 { "iitlba",     0x04000040, 0xfc001fff, "x,(b)", pa10, 0},
 659 { "idtlbp",     0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0},
 660 { "idtlbp",     0x04001000, 0xfc003fff, "x,(b)", pa10, 0},
 661 { "iitlbp",     0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0},
 662 { "iitlbp",     0x04000000, 0xfc001fff, "x,(b)", pa10, 0},
 663 { "pdc",        0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 664 { "pdc",        0x04001380, 0xfc003fdf, "cZx(b)", pa10, 0},
 665 { "fdc",        0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 666 { "fdc",        0x04001280, 0xfc003fdf, "cZx(b)", pa10, 0},
 667 { "fic",        0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 668 { "fic",        0x04000280, 0xfc001fdf, "cZx(b)", pa10, 0},
 669 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 670 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(b)", pa10, 0},
 671 { "fice",       0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 672 { "fice",       0x040002c0, 0xfc001fdf, "cZx(b)", pa10, 0},
 673 { "diag",       0x14000000, 0xfc000000, "D", pa10, 0},
 674 { "idtlbt",     0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
 675 { "iitlbt",     0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
 676
 677 /* These may be specific to certain versions of the PA.  Joel claimed
 678    they were 72000 (7200?) specific.  However, I'm almost certain the
 679    mtcpu/mfcpu were undocumented, but available in the older 700 machines.  */
 680 { "mtcpu",      0x14001600, 0xfc00ffff, "x,^", pa10, 0},
 681 { "mfcpu",      0x14001A00, 0xfc00ffff, "^,x", pa10, 0},
 682 { "tocen",      0x14403600, 0xffffffff, "", pa10, 0},
 683 { "tocdis",     0x14401620, 0xffffffff, "", pa10, 0},
 684 { "shdwgr",     0x14402600, 0xffffffff, "", pa10, 0},
 685 { "grshdw",     0x14400620, 0xffffffff, "", pa10, 0},
 686
 687 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
 688    the Timex FPU or the Mustang ERS (not sure which) manual.  */
 689 { "gfw",        0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0},
 690 { "gfw",        0x04001680, 0xfc003fdf, "cZx(b)", pa11, 0},
 691 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0},
 692 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(b)", pa11, 0},
 693
 694 /* Floating Point Coprocessor Instructions.  */
 695
 696 { "fldw",       0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT},
 697 { "fldw",       0x24001020, 0xfc1f33a0, "cocc@(b),fT", pa20, FLAG_STRICT},
 698 { "fldw",       0x24000000, 0xfc001380, "cxccx(s,b),fT", pa10, FLAG_STRICT},
 699 { "fldw",       0x24000000, 0xfc001380, "cxccx(b),fT", pa10, FLAG_STRICT},
 700 { "fldw",       0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa10, FLAG_STRICT},
 701 { "fldw",       0x24001000, 0xfc001380, "cmcc5(b),fT", pa10, FLAG_STRICT},
 702 { "fldw",       0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT},
 703 { "fldw",       0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT},
 704 { "fldw",       0x5c000000, 0xfc000004, "d(b),fe", pa20, FLAG_STRICT},
 705 { "fldw",       0x58000000, 0xfc000000, "cJd(b),fe", pa20, FLAG_STRICT},
 706 { "fldd",       0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT},
 707 { "fldd",       0x2c001020, 0xfc1f33e0, "cocc@(b),ft", pa20, FLAG_STRICT},
 708 { "fldd",       0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa10, FLAG_STRICT},
 709 { "fldd",       0x2c000000, 0xfc0013c0, "cxccx(b),ft", pa10, FLAG_STRICT},
 710 { "fldd",       0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa10, FLAG_STRICT},
 711 { "fldd",       0x2c001000, 0xfc0013c0, "cmcc5(b),ft", pa10, FLAG_STRICT},
 712 { "fldd",       0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT},
 713 { "fldd",       0x50000002, 0xfc000002, "cq#(b),fx", pa20, FLAG_STRICT},
 714 { "fstw",       0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa10, FLAG_STRICT},
 715 { "fstw",       0x24001220, 0xfc1f33a0, "cocCfT,@(b)", pa10, FLAG_STRICT},
 716 { "fstw",       0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa10, FLAG_STRICT},
 717 { "fstw",       0x24000200, 0xfc001380, "cxcCfT,x(b)", pa10, FLAG_STRICT},
 718 { "fstw",       0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa10, FLAG_STRICT},
 719 { "fstw",       0x24001200, 0xfc001380, "cmcCfT,5(b)", pa10, FLAG_STRICT},
 720 { "fstw",       0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT},
 721 { "fstw",       0x78000000, 0xfc000000, "cJfe,y(b)", pa20w, FLAG_STRICT},
 722 { "fstw",       0x7c000000, 0xfc000004, "fe,d(b)", pa20, FLAG_STRICT},
 723 { "fstw",       0x78000000, 0xfc000000, "cJfe,d(b)", pa20, FLAG_STRICT},
 724 { "fstd",       0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa10, FLAG_STRICT},
 725 { "fstd",       0x2c001220, 0xfc1f33e0, "cocCft,@(b)", pa10, FLAG_STRICT},
 726 { "fstd",       0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa10, FLAG_STRICT},
 727 { "fstd",       0x2c000200, 0xfc0013c0, "cxcCft,x(b)", pa10, FLAG_STRICT},
 728 { "fstd",       0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa10, FLAG_STRICT},
 729 { "fstd",       0x2c001200, 0xfc0013c0, "cmcCft,5(b)", pa10, FLAG_STRICT},
 730 { "fstd",       0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT},
 731 { "fstd",       0x70000002, 0xfc000002, "cqfx,#(b)", pa20, FLAG_STRICT},
 732 { "fldwx",      0x24000000, 0xfc001f80, "cxx(s,b),fT", pa10, 0},
 733 { "fldwx",      0x24000000, 0xfc001f80, "cxx(b),fT", pa10, 0},
 734 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(s,b),ft", pa10, 0},
 735 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(b),ft", pa10, 0},
 736 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0},
 737 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(b)", pa10, 0},
 738 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
 739 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
 740 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
 741 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
 742 { "fldws",      0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0},
 743 { "fldws",      0x24001000, 0xfc001f80, "cm5(b),fT", pa10, 0},
 744 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0},
 745 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(b),ft", pa10, 0},
 746 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0},
 747 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(b)", pa10, 0},
 748 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
 749 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
 750 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
 751 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
 752 { "fadd",       0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 753 { "fadd",       0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 754 { "fsub",       0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 755 { "fsub",       0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 756 { "fmpy",       0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 757 { "fmpy",       0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 758 { "fdiv",       0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 759 { "fdiv",       0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 760 { "fsqrt",      0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 761 { "fsqrt",      0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0},
 762 { "fabs",       0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 763 { "fabs",       0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0},
 764 { "frem",       0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 765 { "frem",       0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0},
 766 { "frnd",       0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 767 { "frnd",       0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0},
 768 { "fcpy",       0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 769 { "fcpy",       0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0},
 770 { "fcnvff",     0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 771 { "fcnvff",     0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 772 { "fcnvxf",     0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 773 { "fcnvxf",     0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 774 { "fcnvfx",     0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 775 { "fcnvfx",     0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 776 { "fcnvfxt",    0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 777 { "fcnvfxt",    0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 778 { "fmpyfadd",   0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
 779 { "fmpynfadd",  0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
 780 { "fneg",       0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
 781 { "fneg",       0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
 782 { "fnegabs",    0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
 783 { "fnegabs",    0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
 784 { "fcnv",       0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT},
 785 { "fcnv",       0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT},
 786 { "fcmp",       0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT},
 787 { "fcmp",       0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT},
 788 { "fcmp",       0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0},
 789 { "fcmp",       0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0},
 790 { "xmpyu",      0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0},
 791 { "fmpyadd",    0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
 792 { "fmpysub",    0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
 793 { "ftest",      0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT},
 794 { "ftest",      0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT},
 795 { "ftest",      0x30002420, 0xffffffff, "", pa10, 0},
 796 { "fid",        0x30000000, 0xffffffff, "", pa11, 0},
 797
 798 /* Performance Monitor Instructions.  */
 799
 800 { "pmdis",      0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT},
 801 { "pmenb",      0x30000680, 0xffffffff, "", pa20, FLAG_STRICT},
 802
 803 /* Assist Instructions.  */
 804
 805 { "spop0",      0x10000000, 0xfc000600, "v,ON", pa10, 0},
 806 { "spop1",      0x10000200, 0xfc000600, "v,oNt", pa10, 0},
 807 { "spop2",      0x10000400, 0xfc000600, "v,1Nb", pa10, 0},
 808 { "spop3",      0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0},
 809 { "copr",       0x30000000, 0xfc000000, "u,2N", pa10, 0},
 810 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
 811 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
 812 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
 813 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
 814 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
 815 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
 816 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
 817 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
 818 { "cldws",      0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
 819 { "cldws",      0x24001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
 820 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
 821 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
 822 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
 823 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
 824 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
 825 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
 826 { "cldw",       0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
 827 { "cldw",       0x24000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
 828 { "cldw",       0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
 829 { "cldw",       0x24001000, 0xfc001e00, "ucm5(b),t", pa10, FLAG_STRICT},
 830 { "cldd",       0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
 831 { "cldd",       0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
 832 { "cldd",       0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
 833 { "cldd",       0x2c001000, 0xfc001e00, "ucm5(b),t", pa20, FLAG_STRICT},
 834 { "cstw",       0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
 835 { "cstw",       0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
 836 { "cstw",       0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
 837 { "cstw",       0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
 838 { "cstd",       0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
 839 { "cstd",       0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
 840 { "cstd",       0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
 841 { "cstd",       0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
 842 };
 843
 844 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
 845
 846 /* SKV 12/18/92. Added some denotations for various operands.  */
 847
 848 #define PA_IMM11_AT_31 'i'
 849 #define PA_IMM14_AT_31 'j'
 850 #define PA_IMM21_AT_31 'k'
 851 #define PA_DISP12 'w'
 852 #define PA_DISP17 'W'
 853
 854 #define N_HPPA_OPERAND_FORMATS 5