include/opcode/hppa.h

   1 /* Table of opcodes for the PA-RISC.
   2    Copyright (C) 1990, 1991, 1993, 1995, 1999 Free Software Foundation, Inc.
   3
   4    Contributed by the Center for Software Science at the
   5    University of Utah (pa-gdb-bugs@cs.utah.edu).
   6
   7 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
   8
   9 GAS/GDB is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 1, or (at your option)
  12 any later version.
  13
  14 GAS/GDB is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GAS or GDB; see the file COPYING.  If not, write to
  21 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  22
  23 #if !defined(__STDC__) && !defined(const)
  24 #define const
  25 #endif
  26
  27 /*
  28  * Structure of an opcode table entry.
  29  */
  30
  31 /* There are two kinds of delay slot nullification: normal which is
  32  * controled by the nullification bit, and conditional, which depends
  33  * on the direction of the branch and its success or failure.
  34  *
  35  * NONE is unfortunately #defined in the hiux system include files.
  36  * #undef it away.
  37  */
  38 #undef NONE
  39 struct pa_opcode
  40 {
  41     const char *name;
  42     unsigned long int match;    /* Bits that must be set...  */
  43     unsigned long int mask;     /* ... in these bits. */
  44     char *args;
  45     enum pa_arch arch;
  46     char flags;
  47 };
  48
  49 /* Enable/disable strict syntax checking.  Not currently used, but will
  50    be necessary for PA2.0 support in the future.  */
  51 #define FLAG_STRICT 0x1
  52
  53 /*
  54    All hppa opcodes are 32 bits.
  55
  56    The match component is a mask saying which bits must match a
  57    particular opcode in order for an instruction to be an instance
  58    of that opcode.
  59
  60    The args component is a string containing one character for each operand of
  61    the instruction.  Characters used as a prefix allow any second character to
  62    be used without conflicting with the main operand characters.
  63
  64    Bit positions in this description follow HP usage of lsb = 31,
  65    "at" is lsb of field.
  66
  67    In the args field, the following characters must match exactly:
  68
  69         '+,() '
  70
  71    In the args field, the following characters are unused:
  72
  73         '  "# %&    +-  /          :;< > @'
  74         '  C        LM       U   YZ[\]  '
  75         '   d       l              {|} '
  76
  77    Here are all the characters:
  78
  79         ' !"#$%&'()*+-,./0123456789:;<=>?@'
  80         'ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
  81         'abcdefghijklmnopqrstuvwxyz{|}~'
  82
  83 Kinds of operands:
  84    x    integer register field at 15.
  85    b    integer register field at 10.
  86    t    integer register field at 31.
  87    a    integer register field at 10 and 15 (for PERMH)
  88    y    floating point register field at 31
  89    5    5 bit immediate at 15.
  90    s    2 bit space specifier at 17.
  91    S    3 bit space specifier at 18.
  92    V    5 bit immediate value at 31
  93    i    11 bit immediate value at 31
  94    j    14 bit immediate value at 31
  95    k    21 bit immediate value at 31
  96    n    nullification for branch instructions
  97    N    nullification for spop and copr instructions
  98    w    12 bit branch displacement
  99    W    17 bit branch displacement (PC relative)
 100    z    17 bit branch displacement (just a number, not an address)
 101
 102 Completer operands all have 'c' as the prefix:
 103
 104    cx   indexed load completer.
 105    cm   short load and store completer.
 106    cs   store bytes short completer.
 107    cZ   System Control Completer (to support LPA, LHA, etc.)
 108    ch   left/right half completer
 109    cH   signed/unsigned saturation completer
 110    cS   signed/unsigned completer at 21
 111    c*   permutation completer
 112
 113 Condition operands all have '?' as the prefix:
 114
 115    ?f   Floating point compare conditions (encoded as 5 bits at 31)
 116
 117    ?a   add conditions
 118    ?A   64 bit add conditions
 119    ?@   add branch conditions followed by nullify
 120    ?d   non-negated add branch conditions
 121    ?D   negated add branch conditions
 122    ?w   wide mode non-negated add branch conditions
 123    ?W   wide mode negated add branch conditions
 124
 125    ?s   compare/subtract conditions
 126    ?S   64 bit compare/subtract conditions
 127    ?t   non-negated compare conditions
 128    ?T   negated compare conditions
 129    ?r   64 bit non-negated compare conditions
 130    ?R   64 bit negated compare conditions
 131    ?Q   64 bit compare conditions for CMPIB instruction
 132    ?n   compare conditions followed by nullify
 133
 134    ?l   logical conditions
 135    ?L   64 bit logical conditions
 136
 137    ?b   branch on bit conditions
 138    ?B   64 bit branch on bit conditions
 139
 140    ?x   shift/extract/deposit conditions
 141    ?X   64 bit shift/extract/deposit conditions
 142    ?y   shift/extract/deposit conditions followed by nullify for conditional
 143         branches
 144
 145    ?u   unit conditions
 146    ?U   64 bit unit conditions
 147
 148 Also these:
 149
 150    .    2 bit shift amount at 25
 151    *    4 bit shift amount at 25
 152    p    5 bit shift count at 26 (to support the SHD instruction) encoded as
 153         31-p
 154    ~    6 bit shift count at 20,22:26 encoded as 63-~.
 155    P    5 bit bit position at 26
 156    T    5 bit field length at 31 (encoded as 32-T)
 157    A    13 bit immediate at 18 (to support the BREAK instruction)
 158    ^    like b, but describes a control register
 159    !    sar (cr11) register
 160    D    26 bit immediate at 31 (to support the DIAG instruction)
 161    $    9 bit immediate at 28 (to support POPBTS)
 162
 163    f    3 bit Special Function Unit identifier at 25
 164    O    20 bit Special Function Unit operation split between 15 bits at 20
 165         and 5 bits at 31
 166    o    15 bit Special Function Unit operation at 20
 167    2    22 bit Special Function Unit operation split between 17 bits at 20
 168         and 5 bits at 31
 169    1    15 bit Special Function Unit operation split between 10 bits at 20
 170         and 5 bits at 31
 171    0    10 bit Special Function Unit operation split between 5 bits at 20
 172         and 5 bits at 31
 173    u    3 bit coprocessor unit identifier at 25
 174    F    Source Floating Point Operand Format Completer encoded 2 bits at 20
 175    I    Source Floating Point Operand Format Completer encoded 1 bits at 20
 176         (for 0xe format FP instructions)
 177    G    Destination Floating Point Operand Format Completer encoded 2 bits at 18
 178
 179    r    5 bit immediate value at 31 (for the break instruction)
 180         (very similar to V above, except the value is unsigned instead of
 181         low_sign_ext)
 182    R    5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
 183         (same as r above, except the value is in a different location)
 184    Q    5 bit immediate value at 10 (a bit position specified in
 185         the bb instruction. It's the same as r above, except the
 186         value is in a different location)
 187
 188 And these (PJH) for PA-89 F.P. registers and instructions:
 189
 190    v    a 't' operand type extended to handle L/R register halves.
 191    E    a 'b' operand type extended to handle L/R register halves.
 192    X    an 'x' operand type extended to handle L/R register halves.
 193    J    a 'b' operand type further extended to handle extra 1.1 registers
 194    K    a 'x' operand type further extended to handle extra 1.1 registers
 195    4    a variation of the 'b' operand type for 'fmpyadd' and 'fmpysub'
 196    6    a variation of the 'x' operand type for 'fmpyadd' and 'fmpysub'
 197    7    a variation of the 't' operand type for 'fmpyadd' and 'fmpysub'
 198    8    5 bit register field at 20 (used in 'fmpyadd' and 'fmpysub')
 199    9    5 bit register field at 25 (used in 'fmpyadd' and 'fmpysub')
 200    H    Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
 201         (very similar to 'F')
 202 */
 203
 204
 205 /* List of characters not to put a space after.  Note that
 206    "," is included, as the "spopN" operations use literal
 207    commas in their completer sections. */
 208 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
 209
 210 /* The order of the opcodes in this table is significant:
 211
 212    * The assembler requires that all instances of the same mnemonic must be
 213    consecutive.  If they aren't, the assembler will bomb at runtime.
 214
 215    * The disassembler should not care about the order of the opcodes.  */
 216
 217 static const struct pa_opcode pa_opcodes[] =
 218 {
 219
 220
 221 /* pseudo-instructions */
 222
 223 { "b",          0xe8000000, 0xffe0e000, "nW", pa10}, /* bl foo,r0 */
 224 { "ldi",        0x34000000, 0xffe0c000, "j,x", pa10},   /* ldo val(r0),r */
 225 { "comib",      0x84000000, 0xfc000000, "?nn5,b,w", pa10}, /* comib{tf}*/
 226 /* This entry is for the disassembler only.  It will never be used by
 227    assembler.  */
 228 { "comib",      0x8c000000, 0xfc000000, "?nn5,b,w", pa10}, /* comib{tf}*/
 229 { "comb",       0x80000000, 0xfc000000, "?nnx,b,w", pa10}, /* comb{tf} */
 230 /* This entry is for the disassembler only.  It will never be used by
 231    assembler.  */
 232 { "comb",       0x88000000, 0xfc000000, "?nnx,b,w", pa10}, /* comb{tf} */
 233 { "addb",       0xa0000000, 0xfc000000, "?@nx,b,w", pa10}, /* addb{tf} */
 234 /* This entry is for the disassembler only.  It will never be used by
 235    assembler.  */
 236 { "addb",       0xa8000000, 0xfc000000, "?@nx,b,w", pa10},
 237 { "addib",      0xa4000000, 0xfc000000, "?@n5,b,w", pa10}, /* addib{tf}*/
 238 /* This entry is for the disassembler only.  It will never be used by
 239    assembler.  */
 240 { "addib",      0xac000000, 0xfc000000, "?@n5,b,w", pa10}, /* addib{tf}*/
 241 { "nop",        0x08000240, 0xffffffff, "", pa10},      /* or 0,0,0 */
 242 { "copy",       0x08000240, 0xffe0ffe0, "x,t", pa10},   /* or r,0,t */
 243 { "mtsar",      0x01601840, 0xffe0ffff, "x", pa10}, /* mtctl r,cr11 */
 244
 245 /* Loads and Stores for integer registers.  */
 246 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10},
 247 { "ldw",        0x48000000, 0xfc000000, "j(b),x", pa10},
 248 { "ldh",        0x44000000, 0xfc000000, "j(s,b),x", pa10},
 249 { "ldh",        0x44000000, 0xfc000000, "j(b),x", pa10},
 250 { "ldb",        0x40000000, 0xfc000000, "j(s,b),x", pa10},
 251 { "ldb",        0x40000000, 0xfc000000, "j(b),x", pa10},
 252 { "stw",        0x68000000, 0xfc000000, "x,j(s,b)", pa10},
 253 { "stw",        0x68000000, 0xfc000000, "x,j(b)", pa10},
 254 { "sth",        0x64000000, 0xfc000000, "x,j(s,b)", pa10},
 255 { "sth",        0x64000000, 0xfc000000, "x,j(b)", pa10},
 256 { "stb",        0x60000000, 0xfc000000, "x,j(s,b)", pa10},
 257 { "stb",        0x60000000, 0xfc000000, "x,j(b)", pa10},
 258 { "ldwm",       0x4c000000, 0xfc000000, "j(s,b),x", pa10},
 259 { "ldwm",       0x4c000000, 0xfc000000, "j(b),x", pa10},
 260 { "stwm",       0x6c000000, 0xfc000000, "x,j(s,b)", pa10},
 261 { "stwm",       0x6c000000, 0xfc000000, "x,j(b)", pa10},
 262 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(s,b),t", pa10},
 263 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(b),t", pa10},
 264 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(s,b),t", pa10},
 265 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(b),t", pa10},
 266 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(s,b),t", pa10},
 267 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(b),t", pa10},
 268 { "ldwax",      0x0c000180, 0xfc00dfc0, "cxx(b),t", pa10},
 269 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(s,b),t", pa10},
 270 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(b),t", pa10},
 271 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(s,b),t", pa10},
 272 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(b),t", pa10},
 273 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(s,b),t", pa10},
 274 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(b),t", pa10},
 275 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(s,b),t", pa10},
 276 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(b),t", pa10},
 277 { "ldwas",      0x0c001180, 0xfc00dfc0, "cm5(b),t", pa10},
 278 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(s,b),t", pa10},
 279 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(b),t", pa10},
 280 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(s,b)", pa10},
 281 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(b)", pa10},
 282 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(s,b)", pa10},
 283 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(b)", pa10},
 284 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(s,b)", pa10},
 285 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(b)", pa10},
 286 { "stwas",      0x0c001380, 0xfc00dfc0, "cmx,V(b)", pa10},
 287 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(s,b)", pa10},
 288 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(b)", pa10},
 289
 290 /* Immediate instructions.  */
 291 { "ldo",        0x34000000, 0xfc00c000, "j(b),x", pa10},
 292 { "ldil",       0x20000000, 0xfc000000, "k,b", pa10},
 293 { "addil",      0x28000000, 0xfc000000, "k,b", pa10},
 294
 295 /* Branching instructions. */
 296 { "bl",         0xe8000000, 0xfc00e000, "nW,b", pa10},
 297 { "gate",       0xe8002000, 0xfc00e000, "nW,b", pa10},
 298 { "blr",        0xe8004000, 0xfc00e001, "nx,b", pa10},
 299 { "bv",         0xe800c000, 0xfc00fffd, "nx(b)", pa10},
 300 { "bv",         0xe800c000, 0xfc00fffd, "n(b)", pa10},
 301 { "be",         0xe0000000, 0xfc000000, "nz(S,b)", pa10},
 302 { "ble",        0xe4000000, 0xfc000000, "nz(S,b)", pa10},
 303 { "movb",       0xc8000000, 0xfc000000, "?ynx,b,w", pa10},
 304 { "movib",      0xcc000000, 0xfc000000, "?yn5,b,w", pa10},
 305 { "combt",      0x80000000, 0xfc000000, "?tnx,b,w", pa10},
 306 { "combf",      0x88000000, 0xfc000000, "?tnx,b,w", pa10},
 307 { "comibt",     0x84000000, 0xfc000000, "?tn5,b,w", pa10},
 308 { "comibf",     0x8c000000, 0xfc000000, "?tn5,b,w", pa10},
 309 { "addbt",      0xa0000000, 0xfc000000, "?dnx,b,w", pa10},
 310 { "addbf",      0xa8000000, 0xfc000000, "?dnx,b,w", pa10},
 311 { "addibt",     0xa4000000, 0xfc000000, "?dn5,b,w", pa10},
 312 { "addibf",     0xac000000, 0xfc000000, "?dn5,b,w", pa10},
 313 { "bb",         0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
 314 { "bb",         0xc4006000, 0xfc006000, "?Bnx,Q,w", pa20, FLAG_STRICT},
 315 { "bb",         0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
 316 { "bb",         0xc4004000, 0xfc004000, "?bnx,Q,w", pa10},
 317 { "bvb",        0xc0004000, 0xffe04000, "?bnx,w", pa10},
 318 { "clrbts",     0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
 319 { "popbts",     0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
 320 { "pushnom",    0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
 321 { "pushbts",    0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 322
 323 /* Computation Instructions */
 324
 325 { "cmpclr",     0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
 326 { "cmpclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
 327 { "comclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10},
 328 { "or",         0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 329 { "or",         0x08000240, 0xfc000fe0, "?lx,b,t", pa10},
 330 { "xor",        0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 331 { "xor",        0x08000280, 0xfc000fe0, "?lx,b,t", pa10},
 332 { "and",        0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 333 { "and",        0x08000200, 0xfc000fe0, "?lx,b,t", pa10},
 334 { "andcm",      0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 335 { "andcm",      0x08000000, 0xfc000fe0, "?lx,b,t", pa10},
 336 { "uxor",       0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
 337 { "uxor",       0x08000380, 0xfc000fe0, "?ux,b,t", pa10},
 338 { "uaddcm",     0x08000920, 0xfc000f20, "*?ux,b,t",pa20, FLAG_STRICT},
 339 { "uaddcm",     0x08000980, 0xfc000fe0, "?ux,b,t", pa10},
 340 { "uaddcmt",    0x080009c0, 0xfc000fe0, "?ux,b,t", pa10},
 341 { "dcor",       0x08000ba0, 0xfc1f0fa0, "%?ub,t",  pa20, FLAG_STRICT},
 342 { "dcor",       0x08000b80, 0xfc1f0fe0, "?ub,t",   pa10},
 343 { "idcor",      0x08000bc0, 0xfc1f0fe0, "?ub,t",   pa10},
 344 { "addi",       0xb4000000, 0xfc000800, "?ai,b,x", pa10},
 345 { "addio",      0xb4000800, 0xfc000800, "?ai,b,x", pa10},
 346 { "addit",      0xb0000000, 0xfc000800, "?ai,b,x", pa10},
 347 { "addito",     0xb0000800, 0xfc000800, "?ai,b,x", pa10},
 348 { "add",        0x08000600, 0xfc000fe0, "?ax,b,t", pa10},
 349 { "addl",       0x08000a00, 0xfc000fe0, "?ax,b,t", pa10},
 350 { "addo",       0x08000e00, 0xfc000fe0, "?ax,b,t", pa10},
 351 { "addc",       0x08000700, 0xfc000fe0, "?ax,b,t", pa10},
 352 { "addco",      0x08000f00, 0xfc000fe0, "?ax,b,t", pa10},
 353 { "sub",        0x08000400, 0xfc000fe0, "?sx,b,t", pa10},
 354 { "subo",       0x08000c00, 0xfc000fe0, "?sx,b,t", pa10},
 355 { "subb",       0x08000500, 0xfc000fe0, "?sx,b,t", pa10},
 356 { "subbo",      0x08000d00, 0xfc000fe0, "?sx,b,t", pa10},
 357 { "subt",       0x080004c0, 0xfc000fe0, "?sx,b,t", pa10},
 358 { "subto",      0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10},
 359 { "ds",         0x08000440, 0xfc000fe0, "?sx,b,t", pa10},
 360 { "subi",       0x94000000, 0xfc000800, "?si,b,x", pa10},
 361 { "subio",      0x94000800, 0xfc000800, "?si,b,x", pa10},
 362 { "cmpiclr",    0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
 363 { "cmpiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
 364 { "comiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10},
 365 { "sh1add",     0x08000640, 0xfc000fe0, "?ax,b,t", pa10},
 366 { "sh1addl",    0x08000a40, 0xfc000fe0, "?ax,b,t", pa10},
 367 { "sh1addo",    0x08000e40, 0xfc000fe0, "?ax,b,t", pa10},
 368 { "sh2add",     0x08000680, 0xfc000fe0, "?ax,b,t", pa10},
 369 { "sh2addl",    0x08000a80, 0xfc000fe0, "?ax,b,t", pa10},
 370 { "sh2addo",    0x08000e80, 0xfc000fe0, "?ax,b,t", pa10},
 371 { "sh3add",     0x080006c0, 0xfc000fe0, "?ax,b,t", pa10},
 372 { "sh3addl",    0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10},
 373 { "sh3addo",    0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10},
 374
 375 /* Subword Operation Instructions */
 376
 377 { "hadd",       0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 378 { "havg",       0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
 379 { "hshl",       0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
 380 { "hshladd",    0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 381 { "hshr",       0xf800c800, 0xfc10f820, "cSb,*,t", pa20, FLAG_STRICT},
 382 { "hshradd",    0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 383 { "hsub",       0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 384 { "mixh",       0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 385 { "mixw",       0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 386 { "permh",      0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
 387
 388
 389 /* Extract and Deposit Instructions */
 390
 391 { "shrpd",      0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
 392 { "shrpd",      0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
 393 { "shrpw",      0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
 394 { "shrpw",      0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
 395 { "vshd",       0xd0000000, 0xfc001fe0, "?xx,b,t", pa10},
 396 { "shd",        0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10},
 397 { "vextru",     0xd0001000, 0xfc001fe0, "?xb,T,x", pa10},
 398 { "vextrs",     0xd0001400, 0xfc001fe0, "?xb,T,x", pa10},
 399 { "extru",      0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10},
 400 { "extrs",      0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10},
 401 { "zvdep",      0xd4000000, 0xfc001fe0, "?xx,T,b", pa10},
 402 { "vdep",       0xd4000400, 0xfc001fe0, "?xx,T,b", pa10},
 403 { "zdep",       0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10},
 404 { "dep",        0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10},
 405 { "zvdepi",     0xd4001000, 0xfc001fe0, "?x5,T,b", pa10},
 406 { "vdepi",      0xd4001400, 0xfc001fe0, "?x5,T,b", pa10},
 407 { "zdepi",      0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10},
 408 { "depi",       0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10},
 409
 410 /* System Control Instructions */
 411
 412 { "break",      0x00000000, 0xfc001fe0, "r,A", pa10},
 413 { "rfi",        0x00000c00, 0xffffffff, "", pa10},
 414 { "rfir",       0x00000ca0, 0xffffffff, "", pa11},
 415 { "ssm",        0x00000d60, 0xffe0ffe0, "R,t", pa10},
 416 { "rsm",        0x00000e60, 0xffe0ffe0, "R,t", pa10},
 417 { "mtsm",       0x00001860, 0xffe0ffff, "x", pa10},
 418 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10},
 419 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(b),t", pa10},
 420 { "mtsp",       0x00001820, 0xffe01fff, "x,S", pa10},
 421 { "mtctl",      0x00001840, 0xfc00ffff, "x,^", pa10},
 422 { "mtsarcm",    0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 423 { "mfia",       0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
 424 { "mfsp",       0x000004a0, 0xffff1fe0, "S,t", pa10},
 425 { "mfctl",      0x000008a0, 0xfc1fffe0, "^,t", pa10},
 426 { "sync",       0x00000400, 0xffffffff, "", pa10},
 427 { "syncdma",    0x00100400, 0xffffffff, "", pa10},
 428 { "prober",     0x04001180, 0xfc003fe0, "(s,b),x,t", pa10},
 429 { "prober",     0x04001180, 0xfc003fe0, "(b),x,t", pa10},
 430 { "proberi",    0x04003180, 0xfc003fe0, "(s,b),R,t", pa10},
 431 { "proberi",    0x04003180, 0xfc003fe0, "(b),R,t", pa10},
 432 { "probew",     0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10},
 433 { "probew",     0x040011c0, 0xfc003fe0, "(b),x,t", pa10},
 434 { "probewi",    0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10},
 435 { "probewi",    0x040031c0, 0xfc003fe0, "(b),R,t", pa10},
 436 { "lpa",        0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10},
 437 { "lpa",        0x04001340, 0xfc003fc0, "cZx(b),t", pa10},
 438 { "lha",        0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10},
 439 { "lha",        0x04001300, 0xfc003fc0, "cZx(b),t", pa10},
 440 { "lci",        0x04001300, 0xfc003fe0, "x(s,b),t", pa10},
 441 { "lci",        0x04001300, 0xfc003fe0, "x(b),t", pa10},
 442 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(s,b)", pa10},
 443 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(b)", pa10},
 444 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(S,b)", pa10},
 445 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(b)", pa10},
 446 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(s,b)", pa10},
 447 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(b)", pa10},
 448 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(S,b)", pa10},
 449 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(b)", pa10},
 450 { "idtlba",     0x04001040, 0xfc003fff, "x,(s,b)", pa10},
 451 { "idtlba",     0x04001040, 0xfc003fff, "x,(b)", pa10},
 452 { "iitlba",     0x04000040, 0xfc001fff, "x,(S,b)", pa10},
 453 { "iitlba",     0x04000040, 0xfc001fff, "x,(b)", pa10},
 454 { "idtlbp",     0x04001000, 0xfc003fff, "x,(s,b)", pa10},
 455 { "idtlbp",     0x04001000, 0xfc003fff, "x,(b)", pa10},
 456 { "iitlbp",     0x04000000, 0xfc001fff, "x,(S,b)", pa10},
 457 { "iitlbp",     0x04000000, 0xfc001fff, "x,(b)", pa10},
 458 { "pdc",        0x04001380, 0xfc003fdf, "cZx(s,b)", pa10},
 459 { "pdc",        0x04001380, 0xfc003fdf, "cZx(b)", pa10},
 460 { "fdc",        0x04001280, 0xfc003fdf, "cZx(s,b)", pa10},
 461 { "fdc",        0x04001280, 0xfc003fdf, "cZx(b)", pa10},
 462 { "fic",        0x04000280, 0xfc001fdf, "cZx(S,b)", pa10},
 463 { "fic",        0x04000280, 0xfc001fdf, "cZx(b)", pa10},
 464 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10},
 465 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(b)", pa10},
 466 { "fice",       0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10},
 467 { "fice",       0x040002c0, 0xfc001fdf, "cZx(b)", pa10},
 468 { "diag",       0x14000000, 0xfc000000, "D", pa10},
 469
 470 /* These may be specific to certain versions of the PA.  Joel claimed
 471    they were 72000 (7200?) specific.  However, I'm almost certain the
 472    mtcpu/mfcpu were undocumented, but available in the older 700 machines.  */
 473 { "mtcpu",      0x14001600, 0xfc00ffff, "x,^"},
 474 { "mfcpu",      0x14001A00, 0xfc00ffff, "^,x"},
 475 { "tocen",      0x14403600, 0xffffffff, ""},
 476 { "tocdis",     0x14401620, 0xffffffff, ""},
 477 { "shdwgr",     0x14402600, 0xffffffff, ""},
 478 { "grshdw",     0x14400620, 0xffffffff, ""},
 479
 480 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
 481    the Timex FPU or the Mustang ERS (not sure which) manual.  */
 482 { "gfw",        0x04001680, 0xfc003fdf, "cZx(s,b)", pa11},
 483 { "gfw",        0x04001680, 0xfc003fdf, "cZx(b)", pa11},
 484 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11},
 485 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(b)", pa11},
 486
 487 /* Floating Point Coprocessor Instructions */
 488
 489 { "fldwx",      0x24000000, 0xfc001f80, "cxx(s,b),v", pa10},
 490 { "fldwx",      0x24000000, 0xfc001f80, "cxx(b),v", pa10},
 491 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(s,b),y", pa10},
 492 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(b),y", pa10},
 493 { "fstwx",      0x24000200, 0xfc001f80, "cxv,x(s,b)", pa10},
 494 { "fstwx",      0x24000200, 0xfc001f80, "cxv,x(b)", pa10},
 495 { "fstdx",      0x2c000200, 0xfc001fc0, "cxy,x(s,b)", pa10},
 496 { "fstdx",      0x2c000200, 0xfc001fc0, "cxy,x(b)", pa10},
 497 { "fstqx",      0x3c000200, 0xfc001fc0, "cxy,x(s,b)", pa10},
 498 { "fstqx",      0x3c000200, 0xfc001fc0, "cxy,x(b)", pa10},
 499 { "fldws",      0x24001000, 0xfc001f80, "cm5(s,b),v", pa10},
 500 { "fldws",      0x24001000, 0xfc001f80, "cm5(b),v", pa10},
 501 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(s,b),y", pa10},
 502 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(b),y", pa10},
 503 { "fstws",      0x24001200, 0xfc001f80, "cmv,5(s,b)", pa10},
 504 { "fstws",      0x24001200, 0xfc001f80, "cmv,5(b)", pa10},
 505 { "fstds",      0x2c001200, 0xfc001fc0, "cmy,5(s,b)", pa10},
 506 { "fstds",      0x2c001200, 0xfc001fc0, "cmy,5(b)", pa10},
 507 { "fstqs",      0x3c001200, 0xfc001fc0, "cmy,5(s,b)", pa10},
 508 { "fstqs",      0x3c001200, 0xfc001fc0, "cmy,5(b)", pa10},
 509 { "fadd",       0x30000600, 0xfc00e7e0, "FE,X,v", pa10},
 510 { "fadd",       0x38000600, 0xfc00e720, "IJ,K,v", pa10},
 511 { "fsub",       0x30002600, 0xfc00e7e0, "FE,X,v", pa10},
 512 { "fsub",       0x38002600, 0xfc00e720, "IJ,K,v", pa10},
 513 { "fmpy",       0x30004600, 0xfc00e7e0, "FE,X,v", pa10},
 514 { "fmpy",       0x38004600, 0xfc00e720, "IJ,K,v", pa10},
 515 { "fdiv",       0x30006600, 0xfc00e7e0, "FE,X,v", pa10},
 516 { "fdiv",       0x38006600, 0xfc00e720, "IJ,K,v", pa10},
 517 { "fsqrt",      0x30008000, 0xfc1fe7e0, "FE,v", pa10},
 518 { "fsqrt",      0x38008000, 0xfc1fe720, "FJ,v", pa10},
 519 { "fabs",       0x30006000, 0xfc1fe7e0, "FE,v", pa10},
 520 { "fabs",       0x38006000, 0xfc1fe720, "FJ,v", pa10},
 521 { "frem",       0x30008600, 0xfc00e7e0, "FE,X,v", pa10},
 522 { "frem",       0x38008600, 0xfc00e720, "FJ,K,v", pa10},
 523 { "frnd",       0x3000a000, 0xfc1fe7e0, "FE,v", pa10},
 524 { "frnd",       0x3800a000, 0xfc1fe720, "FJ,v", pa10},
 525 { "fcpy",       0x30004000, 0xfc1fe7e0, "FE,v", pa10},
 526 { "fcpy",       0x38004000, 0xfc1fe720, "FJ,v", pa10},
 527 { "fcnvff",     0x30000200, 0xfc1f87e0, "FGE,v", pa10},
 528 { "fcnvff",     0x38000200, 0xfc1f8720, "FGJ,v", pa10},
 529 { "fcnvxf",     0x30008200, 0xfc1f87e0, "FGE,v", pa10},
 530 { "fcnvxf",     0x38008200, 0xfc1f8720, "FGJ,v", pa10},
 531 { "fcnvfx",     0x30010200, 0xfc1f87e0, "FGE,v", pa10},
 532 { "fcnvfx",     0x38010200, 0xfc1f8720, "FGJ,v", pa10},
 533 { "fcnvfxt",    0x30018200, 0xfc1f87e0, "FGE,v", pa10},
 534 { "fcnvfxt",    0x38018200, 0xfc1f8720, "FGJ,v", pa10},
 535 { "fmpyfadd",   0xb8000000, 0xfc000020, "IJ,K,3,v", pa20, FLAG_STRICT},
 536 { "fmpynfadd",  0xb8000020, 0xfc000020, "IJ,K,3,v", pa20, FLAG_STRICT},
 537 { "fneg",       0x3000c000, 0xfc1fe7e0, "FE,v", pa20, FLAG_STRICT},
 538 { "fneg",       0x3800c000, 0xfc1fe720, "IJ,v", pa20, FLAG_STRICT},
 539 { "fnegabs",    0x3000e000, 0xfc1fe7e0, "FE,v", pa20, FLAG_STRICT},
 540 { "fnegabs",    0x3800e000, 0xfc1fe720, "IJ,v", pa20, FLAG_STRICT},
 541 { "fcmp",       0x30000400, 0xfc00e7e0, "F?fE,X", pa10},
 542 { "fcmp",       0x38000400, 0xfc00e720, "I?fJ,K", pa10},
 543 { "xmpyu",      0x38004700, 0xfc00e720, "J,K,v", pa11},
 544 { "fmpyadd",    0x18000000, 0xfc000000, "H4,6,7,9,8", pa11},
 545 { "fmpysub",    0x98000000, 0xfc000000, "H4,6,7,9,8", pa11},
 546 { "ftest",      0x30002420, 0xffffffff, "", pa10},
 547 { "fid",        0x30000000, 0xffffffff, "", pa11},
 548
 549
 550 /* Assist Instructions */
 551
 552 { "spop0",      0x10000000, 0xfc000600, "f,ON", pa10},
 553 { "spop1",      0x10000200, 0xfc000600, "f,oNt", pa10},
 554 { "spop2",      0x10000400, 0xfc000600, "f,1Nb", pa10},
 555 { "spop3",      0x10000600, 0xfc000600, "f,0Nx,b", pa10},
 556 { "copr",       0x30000000, 0xfc000000, "u,2N", pa10},
 557 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10},
 558 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(b),t", pa10},
 559 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10},
 560 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(b),t", pa10},
 561 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10},
 562 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(b)", pa10},
 563 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10},
 564 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10},
 565 { "cldws",      0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10},
 566 { "cldws",      0x24001000, 0xfc001e00, "ucm5(b),t", pa10},
 567 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10},
 568 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(b),t", pa10},
 569 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10},
 570 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(b)", pa10},
 571 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10},
 572 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10},
 573 };
 574
 575 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
 576
 577 /* SKV 12/18/92. Added some denotations for various operands. */
 578
 579 #define PA_IMM11_AT_31 'i'
 580 #define PA_IMM14_AT_31 'j'
 581 #define PA_IMM21_AT_31 'k'
 582 #define PA_DISP12 'w'
 583 #define PA_DISP17 'W'
 584
 585 #define N_HPPA_OPERAND_FORMATS 5