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[binutils-gdb.git] / include / opcode / rx.h
1 /* Opcode decoder for the Renesas RX
2 Copyright (C) 2008-2015 Free Software Foundation, Inc.
3 Written by DJ Delorie <dj@redhat.com>
4
5 This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 /* The RX decoder in libopcodes is used by the simulator, gdb's
23 analyzer, and the disassembler. Given an opcode data source,
24 it decodes the next opcode into the following structures. */
25
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29
30 typedef enum
31 {
32 RX_AnySize = 0,
33 RX_Byte, /* undefined extension */
34 RX_UByte,
35 RX_SByte,
36 RX_Word, /* undefined extension */
37 RX_UWord,
38 RX_SWord,
39 RX_3Byte,
40 RX_Long,
41 } RX_Size;
42
43 typedef enum
44 {
45 RX_Operand_None,
46 RX_Operand_Immediate, /* #addend */
47 RX_Operand_Register, /* Rn */
48 RX_Operand_Indirect, /* [Rn + addend] */
49 RX_Operand_Postinc, /* [Rn+] */
50 RX_Operand_Predec, /* [-Rn] */
51 RX_Operand_Condition, /* eq, gtu, etc */
52 RX_Operand_Flag, /* [UIOSZC] */
53 RX_Operand_TwoReg, /* [Rn + scale*R2] */
54 } RX_Operand_Type;
55
56 typedef enum
57 {
58 RXO_unknown,
59 RXO_mov, /* d = s (signed) */
60 RXO_movbi, /* d = [s,s2] (signed) */
61 RXO_movbir, /* [s,s2] = d (signed) */
62 RXO_pushm, /* s..s2 */
63 RXO_popm, /* s..s2 */
64 RXO_xchg, /* s <-> d */
65 RXO_stcc, /* d = s if cond(s2) */
66 RXO_rtsd, /* rtsd, 1=imm, 2-0 = reg if reg type */
67
68 /* These are all either d OP= s or, if s2 is set, d = s OP s2. Note
69 that d may be "None". */
70 RXO_and,
71 RXO_or,
72 RXO_xor,
73 RXO_add,
74 RXO_sub,
75 RXO_mul,
76 RXO_div,
77 RXO_divu,
78 RXO_shll,
79 RXO_shar,
80 RXO_shlr,
81
82 RXO_adc, /* d = d + s + carry */
83 RXO_sbb, /* d = d - s - ~carry */
84 RXO_abs, /* d = |s| */
85 RXO_max, /* d = max(d,s) */
86 RXO_min, /* d = min(d,s) */
87 RXO_emul, /* d:64 = d:32 * s */
88 RXO_emulu, /* d:64 = d:32 * s (unsigned) */
89
90 RXO_rolc, /* d <<= 1 through carry */
91 RXO_rorc, /* d >>= 1 through carry*/
92 RXO_rotl, /* d <<= #s without carry */
93 RXO_rotr, /* d >>= #s without carry*/
94 RXO_revw, /* d = revw(s) */
95 RXO_revl, /* d = revl(s) */
96 RXO_branch, /* pc = d if cond(s) */
97 RXO_branchrel,/* pc += d if cond(s) */
98 RXO_jsr, /* pc = d */
99 RXO_jsrrel, /* pc += d */
100 RXO_rts,
101 RXO_nop,
102 RXO_nop2,
103 RXO_nop3,
104
105 RXO_scmpu,
106 RXO_smovu,
107 RXO_smovb,
108 RXO_suntil,
109 RXO_swhile,
110 RXO_smovf,
111 RXO_sstr,
112
113 RXO_rmpa,
114 RXO_mulhi,
115 RXO_mullo,
116 RXO_machi,
117 RXO_maclo,
118 RXO_mvtachi,
119 RXO_mvtaclo,
120 RXO_mvfachi,
121 RXO_mvfacmi,
122 RXO_mvfaclo,
123 RXO_racw,
124
125 RXO_sat, /* sat(d) */
126 RXO_satr,
127
128 RXO_fadd, /* d op= s */
129 RXO_fcmp,
130 RXO_fsub,
131 RXO_ftoi,
132 RXO_fmul,
133 RXO_fdiv,
134 RXO_round,
135 RXO_itof,
136
137 RXO_bset, /* d |= (1<<s) */
138 RXO_bclr, /* d &= ~(1<<s) */
139 RXO_btst, /* s & (1<<s2) */
140 RXO_bnot, /* d ^= (1<<s) */
141 RXO_bmcc, /* d<s> = cond(s2) */
142
143 RXO_clrpsw, /* flag index in d */
144 RXO_setpsw, /* flag index in d */
145 RXO_mvtipl, /* new IPL in s */
146
147 RXO_rtfi,
148 RXO_rte,
149 RXO_rtd, /* undocumented */
150 RXO_brk,
151 RXO_dbt, /* undocumented */
152 RXO_int, /* vector id in s */
153 RXO_stop,
154 RXO_wait,
155
156 RXO_sccnd, /* d = cond(s) ? 1 : 0 */
157 } RX_Opcode_ID;
158
159 /* Condition bitpatterns, as registers. */
160 #define RXC_eq 0
161 #define RXC_z 0
162 #define RXC_ne 1
163 #define RXC_nz 1
164 #define RXC_c 2
165 #define RXC_nc 3
166 #define RXC_gtu 4
167 #define RXC_leu 5
168 #define RXC_pz 6
169 #define RXC_n 7
170 #define RXC_ge 8
171 #define RXC_lt 9
172 #define RXC_gt 10
173 #define RXC_le 11
174 #define RXC_o 12
175 #define RXC_no 13
176 #define RXC_always 14
177 #define RXC_never 15
178
179 typedef struct
180 {
181 RX_Operand_Type type;
182 int reg;
183 int addend;
184 RX_Size size;
185 } RX_Opcode_Operand;
186
187 typedef struct
188 {
189 RX_Opcode_ID id;
190 int n_bytes;
191 int prefix;
192 char * syntax;
193 RX_Size size;
194 /* By convention, these are destination, source1, source2. */
195 RX_Opcode_Operand op[3];
196
197 /* The logic here is:
198 newflags = (oldflags & ~(int)flags_0) | flags_1 | (op_flags & flags_s)
199 Only the O, S, Z, and C flags are affected. */
200 char flags_0; /* This also clears out flags-to-be-set. */
201 char flags_1;
202 char flags_s;
203 } RX_Opcode_Decoded;
204
205 /* Within the syntax, %c-style format specifiers are as follows:
206
207 %% = '%' character
208 %0 = operand[0] (destination)
209 %1 = operand[1] (source)
210 %2 = operand[2] (2nd source)
211 %s = operation size (b/w/l)
212 %SN = operand size [N] (N=0,1,2)
213 %aN = op[N] as an address (N=0,1,2)
214
215 Register numbers 0..15 are general registers. 16..31 are control
216 registers. 32..47 are condition codes. */
217
218 int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(void *), void *);
219
220 #ifdef __cplusplus
221 }
222 #endif