include/opcode/tic6x.h

   1 /* TI C6X opcode information.
   2    Copyright 2010
   3    Free Software Foundation, Inc.
   4
   5    This program is free software; you can redistribute it and/or modify
   6    it under the terms of the GNU General Public License as published by
   7    the Free Software Foundation; either version 3 of the License, or
   8    (at your option) any later version.
   9
  10    This program is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13    GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program; if not, write to the Free Software
  17    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  18    MA 02110-1301, USA.  */
  19
  20 #ifndef OPCODE_TIC6X_H
  21 #define OPCODE_TIC6X_H
  22
  23 #include "bfd.h"
  24 #include "symcat.h"
  25
  26 /* A field in an instruction format.  The names are based on those
  27    used in the architecture manuals.  */
  28 typedef enum
  29   {
  30     tic6x_field_baseR,
  31     tic6x_field_creg,
  32     tic6x_field_cst,
  33     tic6x_field_csta,
  34     tic6x_field_cstb,
  35     tic6x_field_dst,
  36     tic6x_field_fstgfcyc,
  37     tic6x_field_h,
  38     tic6x_field_mask,
  39     tic6x_field_mode,
  40     tic6x_field_offsetR,
  41     tic6x_field_op,
  42     tic6x_field_p,
  43     tic6x_field_r,
  44     tic6x_field_s,
  45     tic6x_field_sc,
  46     tic6x_field_src,
  47     tic6x_field_src1,
  48     tic6x_field_src2,
  49     tic6x_field_srcdst,
  50     tic6x_field_x,
  51     tic6x_field_y,
  52     tic6x_field_z
  53   } tic6x_insn_field_id;
  54
  55 typedef struct
  56 {
  57   /* The name used to reference the field.  */
  58   tic6x_insn_field_id field_id;
  59
  60   /* The least-significant bit position in the field.  */
  61   unsigned short low_pos;
  62
  63   /* The number of bits in the field.  */
  64   unsigned short width;
  65 } tic6x_insn_field;
  66
  67 /* Maximum number of variable fields in an instruction format.  */
  68 #define TIC6X_MAX_INSN_FIELDS 11
  69
  70 /* A particular instruction format.  */
  71 typedef struct
  72 {
  73   /* How many bits in the instruction.  */
  74   unsigned int num_bits;
  75
  76   /* Constant bits in the instruction.  */
  77   unsigned int cst_bits;
  78
  79   /* Mask matching those bits.  */
  80   unsigned int mask;
  81
  82   /* The number of instruction fields.  */
  83   unsigned int num_fields;
  84
  85   /* Descriptions of instruction fields.  */
  86   tic6x_insn_field fields[TIC6X_MAX_INSN_FIELDS];
  87 } tic6x_insn_format;
  88
  89 /* An index into the table of instruction formats.  */
  90 typedef enum
  91   {
  92 #define FMT(name, num_bits, cst_bits, mask, fields)     \
  93   CONCAT2(tic6x_insn_format_, name),
  94 #include "tic6x-insn-formats.h"
  95 #undef FMT
  96     tic6x_insn_format_max
  97   } tic6x_insn_format_id;
  98
  99 /* The table itself.  */
 100 extern const tic6x_insn_format tic6x_insn_format_table[tic6x_insn_format_max];
 101
 102 /* If instruction format FMT has a field FIELD, return a pointer to
 103    the description of that field; otherwise return NULL.  */
 104
 105 const tic6x_insn_field *tic6x_field_from_fmt (const tic6x_insn_format *fmt,
 106                                               tic6x_insn_field_id field);
 107
 108 /* Description of a field (in an instruction format) whose value is
 109    fixed, or constrained to be in a particular range, in a particular
 110    opcode.  */
 111 typedef struct
 112 {
 113   /* The name of the field.  */
 114   tic6x_insn_field_id field_id;
 115
 116   /* The least value of the field in this instruction.  */
 117   unsigned int min_val;
 118
 119   /* The greatest value of the field in this instruction.  */
 120   unsigned int max_val;
 121 } tic6x_fixed_field;
 122
 123 /* Bit-masks for defining instructions present on some subset of
 124    processors; each indicates an instruction present on that processor
 125    and those that are supersets of it.  The options passed to the
 126    assembler determine a bit-mask ANDed with the bit-mask indicating
 127    when the instruction was added to determine whether the instruction
 128    is enabled.  */
 129 #define TIC6X_INSN_C62X         0x0001
 130 #define TIC6X_INSN_C64X         0x0002
 131 #define TIC6X_INSN_C64XP        0x0004
 132 #define TIC6X_INSN_C67X         0x0008
 133 #define TIC6X_INSN_C67XP        0x0010
 134 #define TIC6X_INSN_C674X        0x0020
 135 #define TIC6X_INSN_ATOMIC       0x0040
 136
 137 /* Flags with further information about an opcode table entry.  */
 138
 139 /* Only used by the assembler, not the disassembler.  */
 140 #define TIC6X_FLAG_MACRO        0x0001
 141
 142 /* Must be first in its execute packet.  */
 143 #define TIC6X_FLAG_FIRST        0x0002
 144
 145 /* Multi-cycle NOP (not used for the NOP n instruction itself, which
 146    is only a multicycle NOP if n > 1).  */
 147 #define TIC6X_FLAG_MCNOP        0x0004
 148
 149 /* Cannot be in parallel with a multi-cycle NOP.  */
 150 #define TIC6X_FLAG_NO_MCNOP     0x0008
 151
 152 /* Load instruction.  */
 153 #define TIC6X_FLAG_LOAD         0x0010
 154
 155 /* Store instruction.  */
 156 #define TIC6X_FLAG_STORE        0x0020
 157
 158 /* Unaligned memory operation.  */
 159 #define TIC6X_FLAG_UNALIGNED    0x0040
 160
 161 /* Only on side B.  */
 162 #define TIC6X_FLAG_SIDE_B_ONLY  0x0080
 163
 164 /* Only on data path T2.  */
 165 #define TIC6X_FLAG_SIDE_T2_ONLY 0x0100
 166
 167 /* Does not support cross paths.  */
 168 #define TIC6X_FLAG_NO_CROSS     0x0200
 169
 170 /* Annotate this branch instruction as a call.  */
 171 #define TIC6X_FLAG_CALL         0x0400
 172
 173 /* Annotate this branch instruction as a return.  */
 174 #define TIC6X_FLAG_RETURN       0x0800
 175
 176 /* This instruction starts a software pipelined loop.  */
 177 #define TIC6X_FLAG_SPLOOP       0x1000
 178
 179 /* This instruction ends a software pipelined loop.  */
 180 #define TIC6X_FLAG_SPKERNEL     0x2000
 181
 182 /* This instruction takes a list of functional units as parameters;
 183    although described as having one parameter, the number may be 0 to
 184    8.  */
 185 #define TIC6X_FLAG_SPMASK       0x4000
 186
 187 /* When more than one opcode matches the assembly source, prefer the
 188    one with the highest value for this bit-field.  If two opcode table
 189    entries can match the same syntactic form, they must have different
 190    values here.  */
 191 #define TIC6X_PREFER_VAL(n)     (((n) & 0x8000) >> 15)
 192 #define TIC6X_FLAG_PREFER(n)    ((n) << 15)
 193 #define TIC6X_NUM_PREFER        2
 194
 195 /* Maximum number of fixed fields for a particular opcode.  */
 196 #define TIC6X_MAX_FIXED_FIELDS 4
 197
 198 /* Maximum number of operands in the opcode table for a particular
 199    opcode.  */
 200 #define TIC6X_MAX_OPERANDS 4
 201
 202 /* Maximum number of operands in the source code for a particular
 203    opcode (different from the number in the opcode table for SPMASK
 204    and SPMASKR).  */
 205 #define TIC6X_MAX_SOURCE_OPERANDS 8
 206
 207 /* Maximum number of variable fields for a particular opcode.  */
 208 #define TIC6X_MAX_VAR_FIELDS 7
 209
 210 /* Which functional units an opcode uses.  This only describes the
 211    basic choice of D, L, M, S or no functional unit; other fields are
 212    used to describe further restrictions (instructions only operating
 213    on one side), use of cross paths and load/store instructions using
 214    one side for the address and the other side for the source or
 215    destination register.  */
 216 typedef enum
 217   {
 218     tic6x_func_unit_d,
 219     tic6x_func_unit_l,
 220     tic6x_func_unit_m,
 221     tic6x_func_unit_s,
 222     tic6x_func_unit_nfu
 223   } tic6x_func_unit_base;
 224
 225 /* Possible forms of source operand.  */
 226 typedef enum
 227   {
 228     /* An assembly-time constant.  */
 229     tic6x_operand_asm_const,
 230     /* A link-time constant.  */
 231     tic6x_operand_link_const,
 232     /* A register, from the same side as the functional unit
 233        selected.  */
 234     tic6x_operand_reg,
 235     /* A register, that is from the other side if a cross path is
 236        used.  */
 237     tic6x_operand_xreg,
 238     /* A register, that is from the side of the data path
 239        selected.  */
 240     tic6x_operand_dreg,
 241     /* An address register usable with 15-bit offsets (B14 or B15).
 242        This is from the same side as the functional unit if a cross
 243        path is not used, and the other side if a cross path is
 244        used.  */
 245     tic6x_operand_areg,
 246     /* A return address register (A3 or B3), from the same side as the
 247        functional unit selected.  */
 248     tic6x_operand_retreg,
 249     /* A register pair, from the same side as the functional unit
 250        selected.  */
 251     tic6x_operand_regpair,
 252     /* A register pair, that is from the other side if a cross path is
 253        used.  */
 254     tic6x_operand_xregpair,
 255     /* A register pair, from the side of the data path selected.  */
 256     tic6x_operand_dregpair,
 257     /* The literal string "irp" (case-insensitive).  */
 258     tic6x_operand_irp,
 259     /* The literal string "nrp" (case-insensitive).  */
 260     tic6x_operand_nrp,
 261     /* A control register.  */
 262     tic6x_operand_ctrl,
 263     /* A memory reference (base and offset registers from the side of
 264        the functional unit selected), using either unsigned 5-bit
 265        constant or register offset, if any offset; register offsets
 266        cannot use unscaled () syntax.  */
 267     tic6x_operand_mem_short,
 268     /* A memory reference (base and offset registers from the side of
 269        the functional unit selected), using either unsigned 5-bit
 270        constant or register offset, if any offset; register offsets
 271        can use unscaled () syntax (for LDNDW and STNDW).  */
 272     tic6x_operand_mem_ndw,
 273     /* A memory reference using 15-bit link-time constant offset
 274        relative to B14 or B15.  */
 275     tic6x_operand_mem_long,
 276     /* A memory reference that only dereferences a register with no
 277        further adjustments (*REG), that register being from the side
 278        of the functional unit selected.  */
 279     tic6x_operand_mem_deref,
 280     /* A functional unit name or a list thereof (for SPMASK and
 281        SPMASKR).  */
 282     tic6x_operand_func_unit
 283   } tic6x_operand_form;
 284
 285 /* Whether something is, or can be, read or written.  */
 286 typedef enum
 287   {
 288     tic6x_rw_none,
 289     tic6x_rw_read,
 290     tic6x_rw_write,
 291     tic6x_rw_read_write
 292   } tic6x_rw;
 293
 294 /* Description of a source operand and how it is used.  */
 295 typedef struct
 296 {
 297   /* The syntactic form of the operand.  */
 298   tic6x_operand_form form;
 299
 300   /* For non-constant operands, the size in bytes (1, 2, 4, 5 or
 301      8).  Ignored for constant operands.  */
 302   unsigned int size;
 303
 304   /* Whether the operand is read, written or both.  In addition to the
 305      operations described here, address registers are read on cycle 1
 306      regardless of when the memory operand is read or written, and may
 307      be modified as described by the addressing mode, and control
 308      registers may be implicitly read by some instructions.  There are
 309      also some special cases not fully described by this
 310      structure.
 311
 312      - For mpydp, the low part of src2 is read on cycles 1 and 3 but
 313        not 2, and the high part on cycles 2 and 4 but not 3.
 314
 315      - The swap2 pseudo-operation maps to packlh2, reading the first
 316        operand of swap2 twice.  */
 317   tic6x_rw rw;
 318
 319   /* The first and last cycles (1 for E1, etc.) at which the operand,
 320      or the low part for two-register operands, is read or
 321      written.  */
 322   unsigned short low_first;
 323   unsigned short low_last;
 324
 325   /* Likewise, for the high part.  */
 326   unsigned short high_first;
 327   unsigned short high_last;
 328 } tic6x_operand_info;
 329
 330 /* Ways of converting an operand or functional unit specifier to a
 331    field value.  */
 332 typedef enum
 333   {
 334     /* Store an unsigned assembly-time constant (which must fit) in
 335        the field.  */
 336     tic6x_coding_ucst,
 337     /* Store a signed constant (which must fit) in the field.  This
 338        may be used both for assembly-time constants and for link-time
 339        constants.  */
 340     tic6x_coding_scst,
 341     /* Subtract one from an unsigned assembly-time constant (which
 342        must be strictly positive before the subtraction) and store the
 343        value (which must fit) in the field.  */
 344     tic6x_coding_ucst_minus_one,
 345     /* Negate a signed assembly-time constant, and store the result of
 346        negation (which must fit) in the field.  Used only for
 347        pseudo-operations.  */
 348     tic6x_coding_scst_negate,
 349     /* Store an unsigned link-time constant, implicitly DP-relative
 350        and counting in bytes, in the field.  For expression operands,
 351        assembly-time constants are encoded as-is.  For memory
 352        reference operands, the offset is encoded as-is if [] syntax is
 353        used and shifted if () is used.  */
 354     tic6x_coding_ulcst_dpr_byte,
 355     /* Store an unsigned link-time constant, implicitly DP-relative
 356        and counting in half-words, in the field.  For expression
 357        operands, assembly-time constants are encoded as-is.  For
 358        memory reference operands, the offset is encoded as-is if []
 359        syntax is used and shifted if () is used.  */
 360     tic6x_coding_ulcst_dpr_half,
 361     /* Store an unsigned link-time constant, implicitly DP-relative
 362        and counting in words, in the field.  For expression operands,
 363        assembly-time constants are encoded as-is.  For memory
 364        reference operands, the offset is encoded as-is if [] syntax is
 365        used and shifted if () is used.  */
 366     tic6x_coding_ulcst_dpr_word,
 367     /* Store the low 16 bits of a link-time constant in the field;
 368        considered unsigned for disassembly.  */
 369     tic6x_coding_lcst_low16,
 370     /* Store the high 16 bits of a link-time constant in the field;
 371        considered unsigned for disassembly.  */
 372     tic6x_coding_lcst_high16,
 373     /* Store a signed PC-relative value (address of label minus
 374        address of fetch packet containing the current instruction,
 375        counted in words) in the field.  */
 376     tic6x_coding_pcrel,
 377     /* Likewise, but counting in half-words if in a header-based fetch
 378        packet.  */
 379     tic6x_coding_pcrel_half,
 380     /* Encode the register number (even number for a register pair) in
 381        the field.  When applied to a memory reference, encode the base
 382        register.  */
 383     tic6x_coding_reg,
 384     /* Store 0 for register B14, 1 for register B15.  When applied to
 385        a memory reference, encode the base register.  */
 386     tic6x_coding_areg,
 387     /* Store the low part of a control register address.  */
 388     tic6x_coding_crlo,
 389     /* Store the high part of a control register address.  */
 390     tic6x_coding_crhi,
 391     /* Encode the even register number for a register pair, shifted
 392        right by one bit.  */
 393     tic6x_coding_reg_shift,
 394     /* Store either the offset register or the 5-bit unsigned offset
 395        for a memory reference.  If an offset uses the unscaled ()
 396        form, which is only permitted with constants, it is scaled
 397        according to the access size of the operand before being
 398        stored.  */
 399     tic6x_coding_mem_offset,
 400     /* Store either the offset register or the 5-bit unsigned offset
 401        for a memory reference, but with no scaling applied to the
 402        offset (for nonaligned doubleword operations).  */
 403     tic6x_coding_mem_offset_noscale,
 404     /* Store the addressing mode for a memory reference.  */
 405     tic6x_coding_mem_mode,
 406     /* Store whether a memory reference is scaled.  */
 407     tic6x_coding_scaled,
 408     /* Store the stage in an SPKERNEL instruction in the upper part of
 409        the field.  */
 410     tic6x_coding_fstg,
 411     /* Store the cycle in an SPKERNEL instruction in the lower part of
 412        the field.  */
 413     tic6x_coding_fcyc,
 414     /* Store the mask bits for functional units in the field in an
 415        SPMASK or SPMASKR instruction.  */
 416     tic6x_coding_spmask,
 417     /* Store the number of a register that is unused, or minimally
 418        used, in this execute packet.  The number must be the same for
 419        all uses of this coding in a single instruction, but may be
 420        different for different instructions in the execute packet.
 421        This is for the "zero" pseudo-operation.  This is not safe when
 422        reads may occur from instructions in previous execute packets;
 423        in such cases the programmer or compiler should use explicit
 424        "sub" instructions for those cases of "zero" that cannot be
 425        implemented as "mvk" for the processor specified.  */
 426     tic6x_coding_reg_unused,
 427     /* Store 1 if the functional unit used is on side B, 0 for side
 428        A.  */
 429     tic6x_coding_fu,
 430     /* Store 1 if the data path used (source register for store,
 431        destination for load) is on side B, 0 for side A.  */
 432     tic6x_coding_data_fu,
 433     /* Store 1 if the cross path is being used, 0 otherwise.  */
 434     tic6x_coding_xpath
 435   } tic6x_coding_method;
 436
 437 /* How to generate the value of a particular field.  */
 438 typedef struct
 439 {
 440   /* The name of the field.  */
 441   tic6x_insn_field_id field_id;
 442
 443   /* How it is encoded.  */
 444   tic6x_coding_method coding_method;
 445
 446   /* Source operand number, if any.  */
 447   unsigned int operand_num;
 448 } tic6x_coding_field;
 449
 450 /* Types of instruction for pipeline purposes.  The type determines
 451    functional unit and cross path latency (when the same functional
 452    unit can be used by other instructions, when the same cross path
 453    can be used by other instructions).  */
 454 typedef enum
 455   {
 456     tic6x_pipeline_nop,
 457     tic6x_pipeline_1cycle,
 458     tic6x_pipeline_1616_m,
 459     tic6x_pipeline_store,
 460     tic6x_pipeline_mul_ext,
 461     tic6x_pipeline_load,
 462     tic6x_pipeline_branch,
 463     tic6x_pipeline_2cycle_dp,
 464     tic6x_pipeline_4cycle,
 465     tic6x_pipeline_intdp,
 466     tic6x_pipeline_dpcmp,
 467     tic6x_pipeline_addsubdp,
 468     tic6x_pipeline_mpyi,
 469     tic6x_pipeline_mpyid,
 470     tic6x_pipeline_mpydp,
 471     tic6x_pipeline_mpyspdp,
 472     tic6x_pipeline_mpysp2dp
 473   } tic6x_pipeline_type;
 474
 475 /* Description of a control register.  */
 476 typedef struct
 477 {
 478   /* The name of the register.  */
 479   const char *name;
 480
 481   /* Which ISA variants include this control register.  */
 482   unsigned short isa_variants;
 483
 484   /* Whether it can be read, written or both (in supervisor mode).
 485      Some registers use the same address, but different names, for
 486      reading and writing.  */
 487   tic6x_rw rw;
 488
 489   /* crlo value for this register.  */
 490   unsigned int crlo;
 491
 492   /* Mask that, ANDed with the crhi value in the instruction, must be
 493      0.  0 is always generated when generating code.  */
 494   unsigned int crhi_mask;
 495 } tic6x_ctrl;
 496
 497 /* An index into the table of control registers.  */
 498 typedef enum
 499   {
 500 #define CTRL(name, isa, rw, crlo, crhi_mask)    \
 501     CONCAT2(tic6x_ctrl_,name),
 502 #include "tic6x-control-registers.h"
 503 #undef CTRL
 504     tic6x_ctrl_max
 505   } tic6x_ctrl_id;
 506
 507 /* The table itself.  */
 508 extern const tic6x_ctrl tic6x_ctrl_table[tic6x_ctrl_max];
 509
 510 /* An entry in the opcode table.  */
 511 typedef struct
 512 {
 513   /* The name of the instruction.  */
 514   const char *name;
 515
 516   /* Functional unit used by this instruction (basic information).  */
 517   tic6x_func_unit_base func_unit;
 518
 519   /* The format of this instruction.  */
 520   tic6x_insn_format_id format;
 521
 522   /* The pipeline type of this instruction.  */
 523   tic6x_pipeline_type type;
 524
 525   /* Which ISA variants include this instruction.  */
 526   unsigned short isa_variants;
 527
 528   /* Flags for this instruction.  */
 529   unsigned short flags;
 530
 531   /* Number of fixed fields, or fields with restricted value ranges,
 532      for this instruction.  */
 533   unsigned int num_fixed_fields;
 534
 535   /* Values of fields fixed for this instruction.  */
 536   tic6x_fixed_field fixed_fields[TIC6X_MAX_FIXED_FIELDS];
 537
 538   /* The number of operands in the source form of this
 539      instruction.  */
 540   unsigned int num_operands;
 541
 542   /* Information about individual operands.  */
 543   tic6x_operand_info operand_info[TIC6X_MAX_OPERANDS];
 544
 545   /* The number of variable fields for this instruction with encoding
 546      instructions explicitly given.  */
 547   unsigned int num_variable_fields;
 548
 549   /* How fields (other than ones with fixed value) are computed from
 550      the source operands and functional unit specifiers.  In addition
 551      to fields specified here:
 552
 553      - creg, if present, is set from the predicate, along with z which
 554        must be present if creg is present.
 555
 556      - p, if present (on all non-compact instructions), is set from
 557        the parallel bars.
 558   */
 559   tic6x_coding_field variable_fields[TIC6X_MAX_VAR_FIELDS];
 560 } tic6x_opcode;
 561
 562 /* An index into the table of opcodes.  */
 563 typedef enum
 564   {
 565 #define INSN(name, func_unit, format, type, isa, flags, fixed, ops, var) \
 566     CONCAT6(tic6x_opcode_,name,_,func_unit,_,format),
 567 #define INSNE(name, e, func_unit, format, type, isa, flags, fixed, ops, var) \
 568     CONCAT4(tic6x_opcode_,name,_,e),
 569 #include "tic6x-opcode-table.h"
 570 #undef INSN
 571 #undef INSNE
 572     tic6x_opcode_max
 573   } tic6x_opcode_id;
 574
 575 /* The table itself.  */
 576 extern const tic6x_opcode tic6x_opcode_table[tic6x_opcode_max];
 577
 578 /* A linked list of opcodes.  */
 579 typedef struct tic6x_opcode_list_tag
 580 {
 581   tic6x_opcode_id id;
 582   struct tic6x_opcode_list_tag *next;
 583 } tic6x_opcode_list;
 584
 585 /* The information from a fetch packet header.  */
 586 typedef struct
 587 {
 588   /* The header itself.  */
 589   unsigned int header;
 590
 591   /* Whether each word uses compact instructions.  */
 592   bfd_boolean word_compact[7];
 593
 594   /* Whether loads are protected.  */
 595   bfd_boolean prot;
 596
 597   /* Whether instructions use the high register set.  */
 598   bfd_boolean rs;
 599
 600   /* Data size.  */
 601   unsigned int dsz;
 602
 603   /* Whether compact instructions in the S unit are decoded as
 604      branches.  */
 605   bfd_boolean br;
 606
 607   /* Whether compact instructions saturate.  */
 608   bfd_boolean sat;
 609
 610   /* P-bits.  */
 611   bfd_boolean p_bits[14];
 612 } tic6x_fetch_packet_header;
 613
 614 #endif /* OPCODE_TIC6X_H */