include/opcode/tic6x.h

   1 /* TI C6X opcode information.
   2    Copyright 2010-2013 Free Software Foundation, Inc.
   3
   4    This program is free software; you can redistribute it and/or modify
   5    it under the terms of the GNU General Public License as published by
   6    the Free Software Foundation; either version 3 of the License, or
   7    (at your option) any later version.
   8
   9    This program is distributed in the hope that it will be useful,
  10    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12    GNU General Public License for more details.
  13
  14    You should have received a copy of the GNU General Public License
  15    along with this program; if not, write to the Free Software
  16    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  17    MA 02110-1301, USA.  */
  18
  19 #ifndef OPCODE_TIC6X_H
  20 #define OPCODE_TIC6X_H
  21
  22 #include "bfd.h"
  23 #include "symcat.h"
  24
  25 /* A field in an instruction format.  The names are based on those
  26    used in the architecture manuals.  */
  27 typedef enum
  28   {
  29     tic6x_field_baseR,
  30     tic6x_field_creg,
  31     tic6x_field_cst,
  32     tic6x_field_csta,
  33     tic6x_field_cstb,
  34     tic6x_field_dst,
  35     tic6x_field_fstgfcyc,
  36     tic6x_field_h,
  37     tic6x_field_mask,
  38     tic6x_field_mode,
  39     tic6x_field_offsetR,
  40     tic6x_field_op,
  41     tic6x_field_p,
  42     tic6x_field_r,
  43     tic6x_field_s,
  44     tic6x_field_sc,
  45     tic6x_field_src,
  46     tic6x_field_src1,
  47     tic6x_field_src2,
  48     tic6x_field_srcdst,
  49     tic6x_field_x,
  50     tic6x_field_y,
  51     tic6x_field_z
  52   } tic6x_insn_field_id;
  53
  54 typedef struct
  55 {
  56   /* The name used to reference the field.  */
  57   tic6x_insn_field_id field_id;
  58
  59   /* The least-significant bit position in the field.  */
  60   unsigned short low_pos;
  61
  62   /* The number of bits in the field.  */
  63   unsigned short width;
  64 } tic6x_insn_field;
  65
  66 /* Maximum number of variable fields in an instruction format.  */
  67 #define TIC6X_MAX_INSN_FIELDS 11
  68
  69 /* A particular instruction format.  */
  70 typedef struct
  71 {
  72   /* How many bits in the instruction.  */
  73   unsigned int num_bits;
  74
  75   /* Constant bits in the instruction.  */
  76   unsigned int cst_bits;
  77
  78   /* Mask matching those bits.  */
  79   unsigned int mask;
  80
  81   /* The number of instruction fields.  */
  82   unsigned int num_fields;
  83
  84   /* Descriptions of instruction fields.  */
  85   tic6x_insn_field fields[TIC6X_MAX_INSN_FIELDS];
  86 } tic6x_insn_format;
  87
  88 /* An index into the table of instruction formats.  */
  89 typedef enum
  90   {
  91 #define FMT(name, num_bits, cst_bits, mask, fields)     \
  92   CONCAT2(tic6x_insn_format_, name),
  93 #include "tic6x-insn-formats.h"
  94 #undef FMT
  95     tic6x_insn_format_max
  96   } tic6x_insn_format_id;
  97
  98 /* The table itself.  */
  99 extern const tic6x_insn_format tic6x_insn_format_table[tic6x_insn_format_max];
 100
 101 /* If instruction format FMT has a field FIELD, return a pointer to
 102    the description of that field; otherwise return NULL.  */
 103
 104 const tic6x_insn_field *tic6x_field_from_fmt (const tic6x_insn_format *fmt,
 105                                               tic6x_insn_field_id field);
 106
 107 /* Description of a field (in an instruction format) whose value is
 108    fixed, or constrained to be in a particular range, in a particular
 109    opcode.  */
 110 typedef struct
 111 {
 112   /* The name of the field.  */
 113   tic6x_insn_field_id field_id;
 114
 115   /* The least value of the field in this instruction.  */
 116   unsigned int min_val;
 117
 118   /* The greatest value of the field in this instruction.  */
 119   unsigned int max_val;
 120 } tic6x_fixed_field;
 121
 122 /* Bit-masks for defining instructions present on some subset of
 123    processors; each indicates an instruction present on that processor
 124    and those that are supersets of it.  The options passed to the
 125    assembler determine a bit-mask ANDed with the bit-mask indicating
 126    when the instruction was added to determine whether the instruction
 127    is enabled.  */
 128 #define TIC6X_INSN_C62X         0x0001
 129 #define TIC6X_INSN_C64X         0x0002
 130 #define TIC6X_INSN_C64XP        0x0004
 131 #define TIC6X_INSN_C67X         0x0008
 132 #define TIC6X_INSN_C67XP        0x0010
 133 #define TIC6X_INSN_C674X        0x0020
 134
 135 /* Flags with further information about an opcode table entry.  */
 136
 137 /* Only used by the assembler, not the disassembler.  */
 138 #define TIC6X_FLAG_MACRO        0x0001
 139
 140 /* Must be first in its execute packet.  */
 141 #define TIC6X_FLAG_FIRST        0x0002
 142
 143 /* Multi-cycle NOP (not used for the NOP n instruction itself, which
 144    is only a multicycle NOP if n > 1).  */
 145 #define TIC6X_FLAG_MCNOP        0x0004
 146
 147 /* Cannot be in parallel with a multi-cycle NOP.  */
 148 #define TIC6X_FLAG_NO_MCNOP     0x0008
 149
 150 /* Load instruction.  */
 151 #define TIC6X_FLAG_LOAD         0x0010
 152
 153 /* Store instruction.  */
 154 #define TIC6X_FLAG_STORE        0x0020
 155
 156 /* Unaligned memory operation.  */
 157 #define TIC6X_FLAG_UNALIGNED    0x0040
 158
 159 /* Only on side B.  */
 160 #define TIC6X_FLAG_SIDE_B_ONLY  0x0080
 161
 162 /* Only on data path T2.  */
 163 #define TIC6X_FLAG_SIDE_T2_ONLY 0x0100
 164
 165 /* Does not support cross paths.  */
 166 #define TIC6X_FLAG_NO_CROSS     0x0200
 167
 168 /* Annotate this branch instruction as a call.  */
 169 #define TIC6X_FLAG_CALL         0x0400
 170
 171 /* Annotate this branch instruction as a return.  */
 172 #define TIC6X_FLAG_RETURN       0x0800
 173
 174 /* This instruction starts a software pipelined loop.  */
 175 #define TIC6X_FLAG_SPLOOP       0x1000
 176
 177 /* This instruction ends a software pipelined loop.  */
 178 #define TIC6X_FLAG_SPKERNEL     0x2000
 179
 180 /* This instruction takes a list of functional units as parameters;
 181    although described as having one parameter, the number may be 0 to
 182    8.  */
 183 #define TIC6X_FLAG_SPMASK       0x4000
 184
 185 /* When more than one opcode matches the assembly source, prefer the
 186    one with the highest value for this bit-field.  If two opcode table
 187    entries can match the same syntactic form, they must have different
 188    values here.  */
 189 #define TIC6X_PREFER_VAL(n)     (((n) & 0x8000) >> 15)
 190 #define TIC6X_FLAG_PREFER(n)    ((n) << 15)
 191 #define TIC6X_NUM_PREFER        2
 192
 193 /* Maximum number of fixed fields for a particular opcode.  */
 194 #define TIC6X_MAX_FIXED_FIELDS 4
 195
 196 /* Maximum number of operands in the opcode table for a particular
 197    opcode.  */
 198 #define TIC6X_MAX_OPERANDS 4
 199
 200 /* Maximum number of operands in the source code for a particular
 201    opcode (different from the number in the opcode table for SPMASK
 202    and SPMASKR).  */
 203 #define TIC6X_MAX_SOURCE_OPERANDS 8
 204
 205 /* Maximum number of variable fields for a particular opcode.  */
 206 #define TIC6X_MAX_VAR_FIELDS 7
 207
 208 /* Which functional units an opcode uses.  This only describes the
 209    basic choice of D, L, M, S or no functional unit; other fields are
 210    used to describe further restrictions (instructions only operating
 211    on one side), use of cross paths and load/store instructions using
 212    one side for the address and the other side for the source or
 213    destination register.  */
 214 typedef enum
 215   {
 216     tic6x_func_unit_d,
 217     tic6x_func_unit_l,
 218     tic6x_func_unit_m,
 219     tic6x_func_unit_s,
 220     tic6x_func_unit_nfu
 221   } tic6x_func_unit_base;
 222
 223 /* Possible forms of source operand.  */
 224 typedef enum
 225   {
 226     /* An assembly-time constant.  */
 227     tic6x_operand_asm_const,
 228     /* A link-time constant.  */
 229     tic6x_operand_link_const,
 230     /* A register, from the same side as the functional unit
 231        selected.  */
 232     tic6x_operand_reg,
 233     /* A register, that is from the other side if a cross path is
 234        used.  */
 235     tic6x_operand_xreg,
 236     /* A register, that is from the side of the data path
 237        selected.  */
 238     tic6x_operand_dreg,
 239     /* An address register usable with 15-bit offsets (B14 or B15).
 240        This is from the same side as the functional unit if a cross
 241        path is not used, and the other side if a cross path is
 242        used.  */
 243     tic6x_operand_areg,
 244     /* A return address register (A3 or B3), from the same side as the
 245        functional unit selected.  */
 246     tic6x_operand_retreg,
 247     /* A register pair, from the same side as the functional unit
 248        selected.  */
 249     tic6x_operand_regpair,
 250     /* A register pair, that is from the other side if a cross path is
 251        used.  */
 252     tic6x_operand_xregpair,
 253     /* A register pair, from the side of the data path selected.  */
 254     tic6x_operand_dregpair,
 255     /* The literal string "irp" (case-insensitive).  */
 256     tic6x_operand_irp,
 257     /* The literal string "nrp" (case-insensitive).  */
 258     tic6x_operand_nrp,
 259     /* A control register.  */
 260     tic6x_operand_ctrl,
 261     /* A memory reference (base and offset registers from the side of
 262        the functional unit selected), using either unsigned 5-bit
 263        constant or register offset, if any offset; register offsets
 264        cannot use unscaled () syntax.  */
 265     tic6x_operand_mem_short,
 266     /* A memory reference (base and offset registers from the side of
 267        the functional unit selected), using either unsigned 5-bit
 268        constant or register offset, if any offset; register offsets
 269        can use unscaled () syntax (for LDNDW and STNDW).  */
 270     tic6x_operand_mem_ndw,
 271     /* A memory reference using 15-bit link-time constant offset
 272        relative to B14 or B15.  */
 273     tic6x_operand_mem_long,
 274     /* A memory reference that only dereferences a register with no
 275        further adjustments (*REG), that register being from the side
 276        of the functional unit selected.  */
 277     tic6x_operand_mem_deref,
 278     /* A functional unit name or a list thereof (for SPMASK and
 279        SPMASKR).  */
 280     tic6x_operand_func_unit
 281   } tic6x_operand_form;
 282
 283 /* Whether something is, or can be, read or written.  */
 284 typedef enum
 285   {
 286     tic6x_rw_none,
 287     tic6x_rw_read,
 288     tic6x_rw_write,
 289     tic6x_rw_read_write
 290   } tic6x_rw;
 291
 292 /* Description of a source operand and how it is used.  */
 293 typedef struct
 294 {
 295   /* The syntactic form of the operand.  */
 296   tic6x_operand_form form;
 297
 298   /* For non-constant operands, the size in bytes (1, 2, 4, 5 or
 299      8).  Ignored for constant operands.  */
 300   unsigned int size;
 301
 302   /* Whether the operand is read, written or both.  In addition to the
 303      operations described here, address registers are read on cycle 1
 304      regardless of when the memory operand is read or written, and may
 305      be modified as described by the addressing mode, and control
 306      registers may be implicitly read by some instructions.  There are
 307      also some special cases not fully described by this
 308      structure.
 309
 310      - For mpydp, the low part of src2 is read on cycles 1 and 3 but
 311        not 2, and the high part on cycles 2 and 4 but not 3.
 312
 313      - The swap2 pseudo-operation maps to packlh2, reading the first
 314        operand of swap2 twice.  */
 315   tic6x_rw rw;
 316
 317   /* The first and last cycles (1 for E1, etc.) at which the operand,
 318      or the low part for two-register operands, is read or
 319      written.  */
 320   unsigned short low_first;
 321   unsigned short low_last;
 322
 323   /* Likewise, for the high part.  */
 324   unsigned short high_first;
 325   unsigned short high_last;
 326 } tic6x_operand_info;
 327
 328 /* Ways of converting an operand or functional unit specifier to a
 329    field value.  */
 330 typedef enum
 331   {
 332     /* Store an unsigned assembly-time constant (which must fit) in
 333        the field.  */
 334     tic6x_coding_ucst,
 335     /* Store a signed constant (which must fit) in the field.  This
 336        may be used both for assembly-time constants and for link-time
 337        constants.  */
 338     tic6x_coding_scst,
 339     /* Subtract one from an unsigned assembly-time constant (which
 340        must be strictly positive before the subtraction) and store the
 341        value (which must fit) in the field.  */
 342     tic6x_coding_ucst_minus_one,
 343     /* Negate a signed assembly-time constant, and store the result of
 344        negation (which must fit) in the field.  Used only for
 345        pseudo-operations.  */
 346     tic6x_coding_scst_negate,
 347     /* Store an unsigned link-time constant, implicitly DP-relative
 348        and counting in bytes, in the field.  For expression operands,
 349        assembly-time constants are encoded as-is.  For memory
 350        reference operands, the offset is encoded as-is if [] syntax is
 351        used and shifted if () is used.  */
 352     tic6x_coding_ulcst_dpr_byte,
 353     /* Store an unsigned link-time constant, implicitly DP-relative
 354        and counting in half-words, in the field.  For expression
 355        operands, assembly-time constants are encoded as-is.  For
 356        memory reference operands, the offset is encoded as-is if []
 357        syntax is used and shifted if () is used.  */
 358     tic6x_coding_ulcst_dpr_half,
 359     /* Store an unsigned link-time constant, implicitly DP-relative
 360        and counting in words, in the field.  For expression operands,
 361        assembly-time constants are encoded as-is.  For memory
 362        reference operands, the offset is encoded as-is if [] syntax is
 363        used and shifted if () is used.  */
 364     tic6x_coding_ulcst_dpr_word,
 365     /* Store the low 16 bits of a link-time constant in the field;
 366        considered unsigned for disassembly.  */
 367     tic6x_coding_lcst_low16,
 368     /* Store the high 16 bits of a link-time constant in the field;
 369        considered unsigned for disassembly.  */
 370     tic6x_coding_lcst_high16,
 371     /* Store a signed PC-relative value (address of label minus
 372        address of fetch packet containing the current instruction,
 373        counted in words) in the field.  */
 374     tic6x_coding_pcrel,
 375     /* Likewise, but counting in half-words if in a header-based fetch
 376        packet.  */
 377     tic6x_coding_pcrel_half,
 378     /* Encode the register number (even number for a register pair) in
 379        the field.  When applied to a memory reference, encode the base
 380        register.  */
 381     tic6x_coding_reg,
 382     /* Encode the register-pair's lsb (even register) for instructions
 383        that use src1 as port for loading lsb of double-precision
 384        operand value (absdp, dpint, dpsp, dptrunc, rcpdp, rsqrdp).  */
 385     tic6x_coding_regpair_lsb,
 386     /* Encode the register-pair's msb (odd register), see above.  */
 387     tic6x_coding_regpair_msb,
 388     /* Store 0 for register B14, 1 for register B15.  When applied to
 389        a memory reference, encode the base register.  */
 390     tic6x_coding_areg,
 391     /* Store the low part of a control register address.  */
 392     tic6x_coding_crlo,
 393     /* Store the high part of a control register address.  */
 394     tic6x_coding_crhi,
 395     /* Encode the even register number for a register pair, shifted
 396        right by one bit.  */
 397     tic6x_coding_reg_shift,
 398     /* Store either the offset register or the 5-bit unsigned offset
 399        for a memory reference.  If an offset uses the unscaled ()
 400        form, which is only permitted with constants, it is scaled
 401        according to the access size of the operand before being
 402        stored.  */
 403     tic6x_coding_mem_offset,
 404     /* Store either the offset register or the 5-bit unsigned offset
 405        for a memory reference, but with no scaling applied to the
 406        offset (for nonaligned doubleword operations).  */
 407     tic6x_coding_mem_offset_noscale,
 408     /* Store the addressing mode for a memory reference.  */
 409     tic6x_coding_mem_mode,
 410     /* Store whether a memory reference is scaled.  */
 411     tic6x_coding_scaled,
 412     /* Store the stage in an SPKERNEL instruction in the upper part of
 413        the field.  */
 414     tic6x_coding_fstg,
 415     /* Store the cycle in an SPKERNEL instruction in the lower part of
 416        the field.  */
 417     tic6x_coding_fcyc,
 418     /* Store the mask bits for functional units in the field in an
 419        SPMASK or SPMASKR instruction.  */
 420     tic6x_coding_spmask,
 421     /* Store the number of a register that is unused, or minimally
 422        used, in this execute packet.  The number must be the same for
 423        all uses of this coding in a single instruction, but may be
 424        different for different instructions in the execute packet.
 425        This is for the "zero" pseudo-operation.  This is not safe when
 426        reads may occur from instructions in previous execute packets;
 427        in such cases the programmer or compiler should use explicit
 428        "sub" instructions for those cases of "zero" that cannot be
 429        implemented as "mvk" for the processor specified.  */
 430     tic6x_coding_reg_unused,
 431     /* Store 1 if the functional unit used is on side B, 0 for side
 432        A.  */
 433     tic6x_coding_fu,
 434     /* Store 1 if the data path used (source register for store,
 435        destination for load) is on side B, 0 for side A.  */
 436     tic6x_coding_data_fu,
 437     /* Store 1 if the cross path is being used, 0 otherwise.  */
 438     tic6x_coding_xpath
 439   } tic6x_coding_method;
 440
 441 /* How to generate the value of a particular field.  */
 442 typedef struct
 443 {
 444   /* The name of the field.  */
 445   tic6x_insn_field_id field_id;
 446
 447   /* How it is encoded.  */
 448   tic6x_coding_method coding_method;
 449
 450   /* Source operand number, if any.  */
 451   unsigned int operand_num;
 452 } tic6x_coding_field;
 453
 454 /* Types of instruction for pipeline purposes.  The type determines
 455    functional unit and cross path latency (when the same functional
 456    unit can be used by other instructions, when the same cross path
 457    can be used by other instructions).  */
 458 typedef enum
 459   {
 460     tic6x_pipeline_nop,
 461     tic6x_pipeline_1cycle,
 462     tic6x_pipeline_1616_m,
 463     tic6x_pipeline_store,
 464     tic6x_pipeline_mul_ext,
 465     tic6x_pipeline_load,
 466     tic6x_pipeline_branch,
 467     tic6x_pipeline_2cycle_dp,
 468     tic6x_pipeline_4cycle,
 469     tic6x_pipeline_intdp,
 470     tic6x_pipeline_dpcmp,
 471     tic6x_pipeline_addsubdp,
 472     tic6x_pipeline_mpyi,
 473     tic6x_pipeline_mpyid,
 474     tic6x_pipeline_mpydp,
 475     tic6x_pipeline_mpyspdp,
 476     tic6x_pipeline_mpysp2dp
 477   } tic6x_pipeline_type;
 478
 479 /* Description of a control register.  */
 480 typedef struct
 481 {
 482   /* The name of the register.  */
 483   const char *name;
 484
 485   /* Which ISA variants include this control register.  */
 486   unsigned short isa_variants;
 487
 488   /* Whether it can be read, written or both (in supervisor mode).
 489      Some registers use the same address, but different names, for
 490      reading and writing.  */
 491   tic6x_rw rw;
 492
 493   /* crlo value for this register.  */
 494   unsigned int crlo;
 495
 496   /* Mask that, ANDed with the crhi value in the instruction, must be
 497      0.  0 is always generated when generating code.  */
 498   unsigned int crhi_mask;
 499 } tic6x_ctrl;
 500
 501 /* An index into the table of control registers.  */
 502 typedef enum
 503   {
 504 #define CTRL(name, isa, rw, crlo, crhi_mask)    \
 505     CONCAT2(tic6x_ctrl_,name),
 506 #include "tic6x-control-registers.h"
 507 #undef CTRL
 508     tic6x_ctrl_max
 509   } tic6x_ctrl_id;
 510
 511 /* The table itself.  */
 512 extern const tic6x_ctrl tic6x_ctrl_table[tic6x_ctrl_max];
 513
 514 /* An entry in the opcode table.  */
 515 typedef struct
 516 {
 517   /* The name of the instruction.  */
 518   const char *name;
 519
 520   /* Functional unit used by this instruction (basic information).  */
 521   tic6x_func_unit_base func_unit;
 522
 523   /* The format of this instruction.  */
 524   tic6x_insn_format_id format;
 525
 526   /* The pipeline type of this instruction.  */
 527   tic6x_pipeline_type type;
 528
 529   /* Which ISA variants include this instruction.  */
 530   unsigned short isa_variants;
 531
 532   /* Flags for this instruction.  */
 533   unsigned short flags;
 534
 535   /* Number of fixed fields, or fields with restricted value ranges,
 536      for this instruction.  */
 537   unsigned int num_fixed_fields;
 538
 539   /* Values of fields fixed for this instruction.  */
 540   tic6x_fixed_field fixed_fields[TIC6X_MAX_FIXED_FIELDS];
 541
 542   /* The number of operands in the source form of this
 543      instruction.  */
 544   unsigned int num_operands;
 545
 546   /* Information about individual operands.  */
 547   tic6x_operand_info operand_info[TIC6X_MAX_OPERANDS];
 548
 549   /* The number of variable fields for this instruction with encoding
 550      instructions explicitly given.  */
 551   unsigned int num_variable_fields;
 552
 553   /* How fields (other than ones with fixed value) are computed from
 554      the source operands and functional unit specifiers.  In addition
 555      to fields specified here:
 556
 557      - creg, if present, is set from the predicate, along with z which
 558        must be present if creg is present.
 559
 560      - p, if present (on all non-compact instructions), is set from
 561        the parallel bars.
 562   */
 563   tic6x_coding_field variable_fields[TIC6X_MAX_VAR_FIELDS];
 564 } tic6x_opcode;
 565
 566 /* An index into the table of opcodes.  */
 567 typedef enum
 568   {
 569 #define INSN(name, func_unit, format, type, isa, flags, fixed, ops, var) \
 570     CONCAT6(tic6x_opcode_,name,_,func_unit,_,format),
 571 #define INSNE(name, e, func_unit, format, type, isa, flags, fixed, ops, var) \
 572     CONCAT4(tic6x_opcode_,name,_,e),
 573 #include "tic6x-opcode-table.h"
 574 #undef INSN
 575 #undef INSNE
 576     tic6x_opcode_max
 577   } tic6x_opcode_id;
 578
 579 /* The table itself.  */
 580 extern const tic6x_opcode tic6x_opcode_table[tic6x_opcode_max];
 581
 582 /* A linked list of opcodes.  */
 583 typedef struct tic6x_opcode_list_tag
 584 {
 585   tic6x_opcode_id id;
 586   struct tic6x_opcode_list_tag *next;
 587 } tic6x_opcode_list;
 588
 589 /* The information from a fetch packet header.  */
 590 typedef struct
 591 {
 592   /* The header itself.  */
 593   unsigned int header;
 594
 595   /* Whether each word uses compact instructions.  */
 596   bfd_boolean word_compact[7];
 597
 598   /* Whether loads are protected.  */
 599   bfd_boolean prot;
 600
 601   /* Whether instructions use the high register set.  */
 602   bfd_boolean rs;
 603
 604   /* Data size.  */
 605   unsigned int dsz;
 606
 607   /* Whether compact instructions in the S unit are decoded as
 608      branches.  */
 609   bfd_boolean br;
 610
 611   /* Whether compact instructions saturate.  */
 612   bfd_boolean sat;
 613
 614   /* P-bits.  */
 615   bfd_boolean p_bits[14];
 616 } tic6x_fetch_packet_header;
 617
 618 #endif /* OPCODE_TIC6X_H */