f643489aceec51e60b85e4b9b5d0105d4787fe29
1 /* Xtensa configuration settings.
2 Copyright (C) 2001,2002,2003 Free Software Foundation, Inc.
3 Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2, or (at your option)
10 This program is distributed in the hope that it will be useful, but
11 WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19 #ifndef XTENSA_CONFIG_H
20 #define XTENSA_CONFIG_H
22 /* The macros defined here match those with the same names in the Xtensa
23 compile-time HAL (Hardware Abstraction Layer). Please refer to the
24 Xtensa System Software Reference Manual for documentation of these
27 #define XCHAL_HAVE_BE 1
28 #define XCHAL_HAVE_DENSITY 1
29 #define XCHAL_HAVE_CONST16 0
30 #define XCHAL_HAVE_ABS 1
31 #define XCHAL_HAVE_ADDX 1
32 #define XCHAL_HAVE_L32R 1
33 #define XCHAL_HAVE_MAC16 0
34 #define XCHAL_HAVE_MUL16 0
35 #define XCHAL_HAVE_MUL32 0
36 #define XCHAL_HAVE_DIV32 0
37 #define XCHAL_HAVE_NSA 1
38 #define XCHAL_HAVE_MINMAX 0
39 #define XCHAL_HAVE_SEXT 0
40 #define XCHAL_HAVE_LOOPS 1
41 #define XCHAL_HAVE_BOOLEANS 0
42 #define XCHAL_HAVE_FP 0
43 #define XCHAL_HAVE_FP_DIV 0
44 #define XCHAL_HAVE_FP_RECIP 0
45 #define XCHAL_HAVE_FP_SQRT 0
46 #define XCHAL_HAVE_FP_RSQRT 0
47 #define XCHAL_HAVE_WINDOWED 1
49 #define XCHAL_ICACHE_SIZE 8192
50 #define XCHAL_DCACHE_SIZE 8192
51 #define XCHAL_ICACHE_LINESIZE 16
52 #define XCHAL_DCACHE_LINESIZE 16
53 #define XCHAL_ICACHE_LINEWIDTH 4
54 #define XCHAL_DCACHE_LINEWIDTH 4
55 #define XCHAL_DCACHE_IS_WRITEBACK 0
57 #define XCHAL_HAVE_MMU 1
58 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12
60 #define XCHAL_HAVE_DEBUG 1
61 #define XCHAL_NUM_IBREAK 2
62 #define XCHAL_NUM_DBREAK 2
63 #define XCHAL_DEBUGLEVEL 4
65 #define XCHAL_EXTRA_SA_SIZE 0
66 #define XCHAL_EXTRA_SA_ALIGN 1
68 #endif /* !XTENSA_CONFIG_H */