gprofng: 29470 The test suite should be made more flexible
[binutils-gdb.git] / include / xtensa-dynconfig.h
1 /* Xtensa configuration settings.
2 Copyright (C) 2022-2023 Free Software Foundation, Inc.
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2, or (at your option)
7 any later version.
8
9 This program is distributed in the hope that it will be useful, but
10 WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
17
18 #ifndef XTENSA_DYNCONFIG_H
19 #define XTENSA_DYNCONFIG_H
20
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24
25 /*
26 * Config versioning.
27 *
28 * When new config entries need to be passed through dynconfig
29 * create new xtensa_config_v<N> structure and put them there.
30 * Declare new function xtensa_get_config_v<N> (void).
31 * Define corresponding X*HAL_* macros by accessing xtensa_get_config_v<N> ().
32 * Define macro XTENSA_CONFIG_V<N>_ENTRY_LIST by listing
33 * XTENSA_CONFIG_ENTRY for every entry in the new structure.
34 * Add constant definition for the new xtensa_config_v<N> to the
35 * XTENSA_CONFIG_INSTANCE_LIST.
36 * Add XTENSA_CONFIG_V<N>_ENTRY_LIST to the XTENSA_CONFIG_ENTRY_LIST.
37 *
38 * On the user side (gcc/binutils/...) add definition for the function
39 * xtensa_get_config_v<N> (void).
40 */
41
42 struct xtensa_config_v1
43 {
44 int xchal_have_be;
45 int xchal_have_density;
46 int xchal_have_const16;
47 int xchal_have_abs;
48 int xchal_have_addx;
49 int xchal_have_l32r;
50 int xshal_use_absolute_literals;
51 int xshal_have_text_section_literals;
52 int xchal_have_mac16;
53 int xchal_have_mul16;
54 int xchal_have_mul32;
55 int xchal_have_mul32_high;
56 int xchal_have_div32;
57 int xchal_have_nsa;
58 int xchal_have_minmax;
59 int xchal_have_sext;
60 int xchal_have_loops;
61 int xchal_have_threadptr;
62 int xchal_have_release_sync;
63 int xchal_have_s32c1i;
64 int xchal_have_booleans;
65 int xchal_have_fp;
66 int xchal_have_fp_div;
67 int xchal_have_fp_recip;
68 int xchal_have_fp_sqrt;
69 int xchal_have_fp_rsqrt;
70 int xchal_have_fp_postinc;
71 int xchal_have_dfp;
72 int xchal_have_dfp_div;
73 int xchal_have_dfp_recip;
74 int xchal_have_dfp_sqrt;
75 int xchal_have_dfp_rsqrt;
76 int xchal_have_windowed;
77 int xchal_num_aregs;
78 int xchal_have_wide_branches;
79 int xchal_have_predicted_branches;
80 int xchal_icache_size;
81 int xchal_dcache_size;
82 int xchal_icache_linesize;
83 int xchal_dcache_linesize;
84 int xchal_icache_linewidth;
85 int xchal_dcache_linewidth;
86 int xchal_dcache_is_writeback;
87 int xchal_have_mmu;
88 int xchal_mmu_min_pte_page_size;
89 int xchal_have_debug;
90 int xchal_num_ibreak;
91 int xchal_num_dbreak;
92 int xchal_debuglevel;
93 int xchal_max_instruction_size;
94 int xchal_inst_fetch_width;
95 int xshal_abi;
96 int xthal_abi_windowed;
97 int xthal_abi_call0;
98 };
99
100 struct xtensa_config_v2
101 {
102 int xchal_m_stage;
103 int xtensa_march_latest;
104 int xtensa_march_earliest;
105 };
106
107 extern const void *xtensa_load_config (const char *name,
108 const void *no_plugin_def,
109 const void *no_name_def);
110 extern const struct xtensa_config_v1 *xtensa_get_config_v1 (void);
111 extern const struct xtensa_config_v2 *xtensa_get_config_v2 (void);
112
113 #ifdef XTENSA_CONFIG_DEFINITION
114
115 #ifndef XCHAL_HAVE_MUL32_HIGH
116 #define XCHAL_HAVE_MUL32_HIGH 0
117 #endif
118
119 #ifndef XCHAL_HAVE_RELEASE_SYNC
120 #define XCHAL_HAVE_RELEASE_SYNC 0
121 #endif
122
123 #ifndef XCHAL_HAVE_S32C1I
124 #define XCHAL_HAVE_S32C1I 0
125 #endif
126
127 #ifndef XCHAL_HAVE_THREADPTR
128 #define XCHAL_HAVE_THREADPTR 0
129 #endif
130
131 #ifndef XCHAL_HAVE_FP_POSTINC
132 #define XCHAL_HAVE_FP_POSTINC 0
133 #endif
134
135 #ifndef XCHAL_HAVE_DFP
136 #define XCHAL_HAVE_DFP 0
137 #endif
138
139 #ifndef XCHAL_HAVE_DFP_DIV
140 #define XCHAL_HAVE_DFP_DIV 0
141 #endif
142
143 #ifndef XCHAL_HAVE_DFP_RECIP
144 #define XCHAL_HAVE_DFP_RECIP 0
145 #endif
146
147 #ifndef XCHAL_HAVE_DFP_SQRT
148 #define XCHAL_HAVE_DFP_SQRT 0
149 #endif
150
151 #ifndef XCHAL_HAVE_DFP_RSQRT
152 #define XCHAL_HAVE_DFP_RSQRT 0
153 #endif
154
155 #ifndef XSHAL_HAVE_TEXT_SECTION_LITERALS
156 #define XSHAL_HAVE_TEXT_SECTION_LITERALS 0
157 #endif
158
159 #ifndef XCHAL_MMU_MIN_PTE_PAGE_SIZE
160 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE 1
161 #endif
162
163 #ifndef XTHAL_ABI_WINDOWED
164 #define XTHAL_ABI_WINDOWED 0
165 #endif
166
167 #ifndef XTHAL_ABI_CALL0
168 #define XTHAL_ABI_CALL0 1
169 #endif
170
171 #ifndef XCHAL_M_STAGE
172 #define XCHAL_M_STAGE 0
173 #endif
174
175 #ifndef XTENSA_MARCH_LATEST
176 #define XTENSA_MARCH_LATEST 0
177 #endif
178
179 #ifndef XTENSA_MARCH_EARLIEST
180 #define XTENSA_MARCH_EARLIEST 0
181 #endif
182
183 #define XTENSA_CONFIG_ENTRY(a) a
184
185 #define XTENSA_CONFIG_V1_ENTRY_LIST \
186 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BE), \
187 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DENSITY), \
188 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_CONST16), \
189 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ABS), \
190 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ADDX), \
191 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_L32R), \
192 XTENSA_CONFIG_ENTRY(XSHAL_USE_ABSOLUTE_LITERALS), \
193 XTENSA_CONFIG_ENTRY(XSHAL_HAVE_TEXT_SECTION_LITERALS), \
194 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MAC16), \
195 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL16), \
196 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32), \
197 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32_HIGH), \
198 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DIV32), \
199 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_NSA), \
200 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MINMAX), \
201 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_SEXT), \
202 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_LOOPS), \
203 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_THREADPTR), \
204 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_RELEASE_SYNC), \
205 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_S32C1I), \
206 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BOOLEANS), \
207 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP), \
208 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_DIV), \
209 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RECIP), \
210 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_SQRT), \
211 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RSQRT), \
212 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_POSTINC), \
213 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP), \
214 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_DIV), \
215 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RECIP), \
216 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_SQRT), \
217 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RSQRT), \
218 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WINDOWED), \
219 XTENSA_CONFIG_ENTRY(XCHAL_NUM_AREGS), \
220 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WIDE_BRANCHES), \
221 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_PREDICTED_BRANCHES), \
222 XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_SIZE), \
223 XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_SIZE), \
224 XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINESIZE), \
225 XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINESIZE), \
226 XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINEWIDTH), \
227 XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINEWIDTH), \
228 XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_IS_WRITEBACK), \
229 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MMU), \
230 XTENSA_CONFIG_ENTRY(XCHAL_MMU_MIN_PTE_PAGE_SIZE), \
231 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DEBUG), \
232 XTENSA_CONFIG_ENTRY(XCHAL_NUM_IBREAK), \
233 XTENSA_CONFIG_ENTRY(XCHAL_NUM_DBREAK), \
234 XTENSA_CONFIG_ENTRY(XCHAL_DEBUGLEVEL), \
235 XTENSA_CONFIG_ENTRY(XCHAL_MAX_INSTRUCTION_SIZE), \
236 XTENSA_CONFIG_ENTRY(XCHAL_INST_FETCH_WIDTH), \
237 XTENSA_CONFIG_ENTRY(XSHAL_ABI), \
238 XTENSA_CONFIG_ENTRY(XTHAL_ABI_WINDOWED), \
239 XTENSA_CONFIG_ENTRY(XTHAL_ABI_CALL0)
240
241 #define XTENSA_CONFIG_V2_ENTRY_LIST \
242 XTENSA_CONFIG_ENTRY(XCHAL_M_STAGE), \
243 XTENSA_CONFIG_ENTRY(XTENSA_MARCH_LATEST), \
244 XTENSA_CONFIG_ENTRY(XTENSA_MARCH_EARLIEST)
245
246 #define XTENSA_CONFIG_INSTANCE_LIST \
247 const struct xtensa_config_v1 xtensa_config_v1 = { \
248 XTENSA_CONFIG_V1_ENTRY_LIST, \
249 }; \
250 const struct xtensa_config_v2 xtensa_config_v2 = { \
251 XTENSA_CONFIG_V2_ENTRY_LIST, \
252 }
253
254 #define XTENSA_CONFIG_ENTRY_LIST \
255 XTENSA_CONFIG_V1_ENTRY_LIST, \
256 XTENSA_CONFIG_V2_ENTRY_LIST
257
258 #else /* XTENSA_CONFIG_DEFINITION */
259
260 #undef XCHAL_HAVE_BE
261 #define XCHAL_HAVE_BE (xtensa_get_config_v1 ()->xchal_have_be)
262
263 #undef XCHAL_HAVE_DENSITY
264 #define XCHAL_HAVE_DENSITY (xtensa_get_config_v1 ()->xchal_have_density)
265
266 #undef XCHAL_HAVE_CONST16
267 #define XCHAL_HAVE_CONST16 (xtensa_get_config_v1 ()->xchal_have_const16)
268
269 #undef XCHAL_HAVE_ABS
270 #define XCHAL_HAVE_ABS (xtensa_get_config_v1 ()->xchal_have_abs)
271
272 #undef XCHAL_HAVE_ADDX
273 #define XCHAL_HAVE_ADDX (xtensa_get_config_v1 ()->xchal_have_addx)
274
275 #undef XCHAL_HAVE_L32R
276 #define XCHAL_HAVE_L32R (xtensa_get_config_v1 ()->xchal_have_l32r)
277
278 #undef XSHAL_USE_ABSOLUTE_LITERALS
279 #define XSHAL_USE_ABSOLUTE_LITERALS (xtensa_get_config_v1 ()->xshal_use_absolute_literals)
280
281 #undef XSHAL_HAVE_TEXT_SECTION_LITERALS
282 #define XSHAL_HAVE_TEXT_SECTION_LITERALS (xtensa_get_config_v1 ()->xshal_have_text_section_literals)
283
284 #undef XCHAL_HAVE_MAC16
285 #define XCHAL_HAVE_MAC16 (xtensa_get_config_v1 ()->xchal_have_mac16)
286
287 #undef XCHAL_HAVE_MUL16
288 #define XCHAL_HAVE_MUL16 (xtensa_get_config_v1 ()->xchal_have_mul16)
289
290 #undef XCHAL_HAVE_MUL32
291 #define XCHAL_HAVE_MUL32 (xtensa_get_config_v1 ()->xchal_have_mul32)
292
293 #undef XCHAL_HAVE_MUL32_HIGH
294 #define XCHAL_HAVE_MUL32_HIGH (xtensa_get_config_v1 ()->xchal_have_mul32_high)
295
296 #undef XCHAL_HAVE_DIV32
297 #define XCHAL_HAVE_DIV32 (xtensa_get_config_v1 ()->xchal_have_div32)
298
299 #undef XCHAL_HAVE_NSA
300 #define XCHAL_HAVE_NSA (xtensa_get_config_v1 ()->xchal_have_nsa)
301
302 #undef XCHAL_HAVE_MINMAX
303 #define XCHAL_HAVE_MINMAX (xtensa_get_config_v1 ()->xchal_have_minmax)
304
305 #undef XCHAL_HAVE_SEXT
306 #define XCHAL_HAVE_SEXT (xtensa_get_config_v1 ()->xchal_have_sext)
307
308 #undef XCHAL_HAVE_LOOPS
309 #define XCHAL_HAVE_LOOPS (xtensa_get_config_v1 ()->xchal_have_loops)
310
311 #undef XCHAL_HAVE_THREADPTR
312 #define XCHAL_HAVE_THREADPTR (xtensa_get_config_v1 ()->xchal_have_threadptr)
313
314 #undef XCHAL_HAVE_RELEASE_SYNC
315 #define XCHAL_HAVE_RELEASE_SYNC (xtensa_get_config_v1 ()->xchal_have_release_sync)
316
317 #undef XCHAL_HAVE_S32C1I
318 #define XCHAL_HAVE_S32C1I (xtensa_get_config_v1 ()->xchal_have_s32c1i)
319
320 #undef XCHAL_HAVE_BOOLEANS
321 #define XCHAL_HAVE_BOOLEANS (xtensa_get_config_v1 ()->xchal_have_booleans)
322
323 #undef XCHAL_HAVE_FP
324 #define XCHAL_HAVE_FP (xtensa_get_config_v1 ()->xchal_have_fp)
325
326 #undef XCHAL_HAVE_FP_DIV
327 #define XCHAL_HAVE_FP_DIV (xtensa_get_config_v1 ()->xchal_have_fp_div)
328
329 #undef XCHAL_HAVE_FP_RECIP
330 #define XCHAL_HAVE_FP_RECIP (xtensa_get_config_v1 ()->xchal_have_fp_recip)
331
332 #undef XCHAL_HAVE_FP_SQRT
333 #define XCHAL_HAVE_FP_SQRT (xtensa_get_config_v1 ()->xchal_have_fp_sqrt)
334
335 #undef XCHAL_HAVE_FP_RSQRT
336 #define XCHAL_HAVE_FP_RSQRT (xtensa_get_config_v1 ()->xchal_have_fp_rsqrt)
337
338 #undef XCHAL_HAVE_FP_POSTINC
339 #define XCHAL_HAVE_FP_POSTINC (xtensa_get_config_v1 ()->xchal_have_fp_postinc)
340
341 #undef XCHAL_HAVE_DFP
342 #define XCHAL_HAVE_DFP (xtensa_get_config_v1 ()->xchal_have_dfp)
343
344 #undef XCHAL_HAVE_DFP_DIV
345 #define XCHAL_HAVE_DFP_DIV (xtensa_get_config_v1 ()->xchal_have_dfp_div)
346
347 #undef XCHAL_HAVE_DFP_RECIP
348 #define XCHAL_HAVE_DFP_RECIP (xtensa_get_config_v1 ()->xchal_have_dfp_recip)
349
350 #undef XCHAL_HAVE_DFP_SQRT
351 #define XCHAL_HAVE_DFP_SQRT (xtensa_get_config_v1 ()->xchal_have_dfp_sqrt)
352
353 #undef XCHAL_HAVE_DFP_RSQRT
354 #define XCHAL_HAVE_DFP_RSQRT (xtensa_get_config_v1 ()->xchal_have_dfp_rsqrt)
355
356 #undef XCHAL_HAVE_WINDOWED
357 #define XCHAL_HAVE_WINDOWED (xtensa_get_config_v1 ()->xchal_have_windowed)
358
359 #undef XCHAL_NUM_AREGS
360 #define XCHAL_NUM_AREGS (xtensa_get_config_v1 ()->xchal_num_aregs)
361
362 #undef XCHAL_HAVE_WIDE_BRANCHES
363 #define XCHAL_HAVE_WIDE_BRANCHES (xtensa_get_config_v1 ()->xchal_have_wide_branches)
364
365 #undef XCHAL_HAVE_PREDICTED_BRANCHES
366 #define XCHAL_HAVE_PREDICTED_BRANCHES (xtensa_get_config_v1 ()->xchal_have_predicted_branches)
367
368
369 #undef XCHAL_ICACHE_SIZE
370 #define XCHAL_ICACHE_SIZE (xtensa_get_config_v1 ()->xchal_icache_size)
371
372 #undef XCHAL_DCACHE_SIZE
373 #define XCHAL_DCACHE_SIZE (xtensa_get_config_v1 ()->xchal_dcache_size)
374
375 #undef XCHAL_ICACHE_LINESIZE
376 #define XCHAL_ICACHE_LINESIZE (xtensa_get_config_v1 ()->xchal_icache_linesize)
377
378 #undef XCHAL_DCACHE_LINESIZE
379 #define XCHAL_DCACHE_LINESIZE (xtensa_get_config_v1 ()->xchal_dcache_linesize)
380
381 #undef XCHAL_ICACHE_LINEWIDTH
382 #define XCHAL_ICACHE_LINEWIDTH (xtensa_get_config_v1 ()->xchal_icache_linewidth)
383
384 #undef XCHAL_DCACHE_LINEWIDTH
385 #define XCHAL_DCACHE_LINEWIDTH (xtensa_get_config_v1 ()->xchal_dcache_linewidth)
386
387 #undef XCHAL_DCACHE_IS_WRITEBACK
388 #define XCHAL_DCACHE_IS_WRITEBACK (xtensa_get_config_v1 ()->xchal_dcache_is_writeback)
389
390
391 #undef XCHAL_HAVE_MMU
392 #define XCHAL_HAVE_MMU (xtensa_get_config_v1 ()->xchal_have_mmu)
393
394 #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
395 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE (xtensa_get_config_v1 ()->xchal_mmu_min_pte_page_size)
396
397
398 #undef XCHAL_HAVE_DEBUG
399 #define XCHAL_HAVE_DEBUG (xtensa_get_config_v1 ()->xchal_have_debug)
400
401 #undef XCHAL_NUM_IBREAK
402 #define XCHAL_NUM_IBREAK (xtensa_get_config_v1 ()->xchal_num_ibreak)
403
404 #undef XCHAL_NUM_DBREAK
405 #define XCHAL_NUM_DBREAK (xtensa_get_config_v1 ()->xchal_num_dbreak)
406
407 #undef XCHAL_DEBUGLEVEL
408 #define XCHAL_DEBUGLEVEL (xtensa_get_config_v1 ()->xchal_debuglevel)
409
410
411 #undef XCHAL_MAX_INSTRUCTION_SIZE
412 #define XCHAL_MAX_INSTRUCTION_SIZE (xtensa_get_config_v1 ()->xchal_max_instruction_size)
413
414 #undef XCHAL_INST_FETCH_WIDTH
415 #define XCHAL_INST_FETCH_WIDTH (xtensa_get_config_v1 ()->xchal_inst_fetch_width)
416
417
418 #undef XSHAL_ABI
419 #undef XTHAL_ABI_WINDOWED
420 #undef XTHAL_ABI_CALL0
421 #define XSHAL_ABI (xtensa_get_config_v1 ()->xshal_abi)
422 #define XTHAL_ABI_WINDOWED (xtensa_get_config_v1 ()->xthal_abi_windowed)
423 #define XTHAL_ABI_CALL0 (xtensa_get_config_v1 ()->xthal_abi_call0)
424
425
426 #undef XCHAL_M_STAGE
427 #define XCHAL_M_STAGE (xtensa_get_config_v2 ()->xchal_m_stage)
428
429 #undef XTENSA_MARCH_LATEST
430 #define XTENSA_MARCH_LATEST (xtensa_get_config_v2 ()->xtensa_march_latest)
431
432 #undef XTENSA_MARCH_EARLIEST
433 #define XTENSA_MARCH_EARLIEST (xtensa_get_config_v2 ()->xtensa_march_earliest)
434
435 #endif /* XTENSA_CONFIG_DEFINITION */
436
437 #ifdef __cplusplus
438 }
439 #endif
440 #endif /* !XTENSA_DYNCONFIG_H */