index.mdwn

   1 # Welcome to LibreSoC
   2 Sounds cool? Learn more [here](who_we_are)
   3
   4 [[who_we_are]]
   5
   6 # Join us in Realizing the First Market Ready LibreSOC!
   7
   8 1. First, join the
   9 [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
  10 introduce yourself, and read through
  11 [recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
  12 and the [[charter]].
  13
  14 2. The next thing you should do is read through the [bugs
  15 list](http://bugs.libre-riscv.org) and see if there are any bugs that
  16 pique your interest.
  17
  18 3. After that, go ahead and take a look at the resources section below.
  19 Try and clone a repository with ``git clone https://git.libre-riscv.org/git/repositoryname.git``
  20
  21 4. If you plan to do HDL work, you should familiarize yourself with our [[HDL_workflow]].
  22
  23 5. We do have funding available (see [[nlnet]]) upon completion of issues -
  24 we are also working on procuring more funding which gets the project to
  25 nanometre scale tapeout.
  26
  27 6. After all this, if you feel that Libre-SoC is a good cause that
  28 you would like to contribute to, add yourself to the [[current_members]]
  29 page, fill in some information about yourself, and join the mailing list
  30 and say hello.
  31
  32 Also note that you can edit this wiki. See the last section of this page.
  33
  34 ## Needed Skills
  35
  36 Most labor is currently being applied to developing the GPU portion of
  37 the Libre-SoC.
  38
  39 The highest priority needed at the moment is a c++ engineer to work on
  40 a MESA 3D driver. This will begin life similar to SwiftShader however
  41 retaining the vectorisation and predication intrinsics as well as hardware accelerated opcodes (all of which SwiftShader lacks)
  42
  43 Medium to long-term we need HDL engineers. Particularly those familiar
  44 with nMigen or just python.  Most of the techniques being used require
  45 software engineering skills (OO design, polymorphism) than they do more
  46 traditional HDL programming skills. Basically if you have experience in 2
  47 of the following you'll do fine: python, nmigen, verilog/VHDL/gate-level
  48 design. See [[HDL_workflow]]
  49
  50 Also, individuals with experience in formal mathematical verification
  51 are quite welcome.
  52
  53 TODO: add a list of upcoming project tasks/milestones (link to
  54 bugtracker).
  55
  56 # Resources
  57
  58 | Resource | Link |
  59 | --- | --- |
  60 | Bugs and Tasks | <http://bugs.libre-riscv.org/> |
  61 | Mailing Lists | <http://lists.libre-riscv.org> |
  62 | Archives | <http://lists.libre-riscv.org/pipermail> |
  63 | Git repositories | <http://git.libre-riscv.org> |
  64 | Kazan (Vulkan driver) | <https://salsa.debian.org/Kazan-team/kazan> |
  65 | Further Information | [[resources]] |
  66
  67 # Main Pages
  68
  69 * Libre-SoC [[charter]]
  70 * [[shakti/m_class]]
  71 * [[alt_rvp]]
  72 * [[3d_gpu]]
  73 * [[vpu]]
  74 * [[simple_v_extension]]
  75 * [[zfpacc_proposal]]
  76 * [[ztrans_proposal]]
  77 * [[simple_v_extension/specification/mv.x]]
  78 * [[simple_v_extension/specification/ld.x]]
  79 * Specifications and [[resources]]
  80
  81 # Spike Emulator
  82 * [Set-Up Instructions][1]
  83
  84 [1]: https://libre-riscv.org/3d_gpu/spike_sv/
  85
  86 # Current Members
  87
  88 [[current_members]]
  89
  90 # Wiki Structure
  91
  92 This is a publicly editable wiki.
  93
  94 All wikis are supposed to have a [[SandBox]], so this one does too.
  95
  96 This wiki is powered by [[ikiwiki]].
  97
  98 This is the sitemap: [[sitemap]]