index.mdwn

   1 # Welcome to Libre-SoC ([provisionally renamed](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-January/003580.html) from Libre-RISCV)!
   2 ## Why a Libre SOC?
   3
   4 Its quite hard to guarantee that a performant processors(think pipelined, out-of-order) are functionally perfectly correct. In fact, it often turns out that they [aren’t](https://meltdownattack.com):
   5
   6 There are entire [dissertations](http://www.kroening.com/diss/diss-kroe.pdf) dedicated to the subject matter of merely functionally verifying a pipeline(this doesn’t even consider out of order execution).
   7
   8 Given the fact that [high performing]bug free processors don’t exist anymore, how can you trust your processor? The next best thing is have access to a processor’s design files. Not only have access to them, you need to be able to study and improve them.
   9
  10 Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve intelligence, media consumption, wireless connectivity, etc.
  11
  12 ## What we Do
  13 LibreSOC strives to deliver a fully capable and competitive Libre integrated System on Chip. We want to maximize the degree of trust a customer can place in his or her processor. We do this by providing the customer the freedom to  study, modify, and redistribute the processor source from HDL to VLSI.
  14
  15 Right now, we're targeting an (quad core, 800mhz, dual issue, GPU, VPU, [and later an ML inference core] ) SOC.
  16
  17 ## Still Got Questions?
  18 Read about the business and practical benefits of a LibreSOC below.
  19
  20 [[why_a_libresoc]]
  21
  22 # Contact
  23
  24 The main contact point is the
  25 [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev).
  26 If you need to contact the sysadmin please use webmaster@libre-riscv.org
  27
  28 # Joining/Onboarding Process
  29
  30 This process probably needs some improvement: the basic
  31 idea is to join the
  32 [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
  33 introduce yourself, and read through
  34 [recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
  35 and the [[charter]].
  36
  37 The next thing you should do is read through the [bugs
  38 list](http://bugs.libre-riscv.org) and see if there are any bugs that
  39 pique your interest.
  40
  41 We do have funding available (see [[nlnet]]) upon completion of issues -
  42 we are also working on procuring more funding which gets the project to
  43 nanometre scale tapeout.
  44
  45 After all this, if you feel that Libre-SoC is a good cause that
  46 you would like to contribute to, add yourself to the [[current_members]]
  47 page, fill in some information about yourself, and join the mailing list
  48 and say hello.
  49
  50 Also note that you can edit this wiki. See the last section of this page.
  51
  52 ## Needed Skills
  53
  54 Most labor is currently being applied to developing the GPU portion of
  55 the Libre-SoC.
  56
  57 The highest priority needed at the moment is a c++ engineer to work on
  58 a MESA 3D driver. This will begin life similar to SwiftShader however
  59 retaining the vectorisation and predication intrinsics as well as hardware accelerated opcodes (all of which SwiftShader lacks)
  60
  61 Medium to long-term we need HDL engineers. Particularly those familiar
  62 with nMigen or just python.  Most of the techniques being used require
  63 software engineering skills (OO design, polymorphism) than they do more
  64 traditional HDL programming skills. Basically if you have experience in 2
  65 of the following you'll do fine: python, nmigen, verilog/VHDL/gate-level
  66 design. See [[HDL_workflow]]
  67
  68 Also, individuals with experience in formal mathematical verification
  69 are quite welcome.
  70
  71 TODO: add a list of upcoming project tasks/milestones (link to
  72 bugtracker).
  73
  74 # Resources
  75
  76 * Mailing Lists <http://lists.libre-riscv.org> -
  77   Archives at <http://lists.libre-riscv.org/pipermail>
  78 * Git repositories <http://git.libre-riscv.org>
  79   may be cloned publicly with
  80   git clone https://git.libre-riscv.org/git/repositoryname.git
  81 * Bugzilla at <http://bugs.libre-riscv.org/>
  82 * Kazan (Vulkan driver) at <https://salsa.debian.org/Kazan-team/kazan>
  83 * Further Information [[resources]]
  84
  85 # Main Pages
  86
  87 * Libre-SoC [[charter]]
  88 * [[shakti/m_class]]
  89 * [[alt_rvp]]
  90 * [[3d_gpu]]
  91 * [[vpu]]
  92 * [[simple_v_extension]]
  93 * [[zfpacc_proposal]]
  94 * [[ztrans_proposal]]
  95 * [[simple_v_extension/specification/mv.x]]
  96 * [[simple_v_extension/specification/ld.x]]
  97 * Specifications and [[resources]]
  98
  99 # Spike Emulator
 100 * [Set-Up Instructions][1]
 101
 102 [1]: https://libre-riscv.org/3d_gpu/spike_sv/
 103
 104 # Current Members
 105
 106 [[current_members]]
 107
 108 # Wiki Structure
 109
 110 This is a publicly editable wiki.
 111
 112 All wikis are supposed to have a [[SandBox]], so this one does too.
 113
 114 This wiki is powered by [[ikiwiki]].
 115
 116 This is the sitemap: [[sitemap]]