kernel/calc.cc

   1 /*
   2  *  yosys -- Yosys Open SYnthesis Suite
   3  *
   4  *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
   5  *
   6  *  Permission to use, copy, modify, and/or distribute this software for any
   7  *  purpose with or without fee is hereby granted, provided that the above
   8  *  copyright notice and this permission notice appear in all copies.
   9  *
  10  *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  */
  19
  20 // [[CITE]] Power-Modulus Algorithm
  21 // Schneier, Bruce (1996). Applied Cryptography: Protocols, Algorithms, and Source Code in C,
  22 // Second Edition (2nd ed.). Wiley. ISBN 978-0-471-11709-4, page 244
  23
  24 #include "kernel/yosys.h"
  25 #include "libs/bigint/BigIntegerLibrary.hh"
  26
  27 YOSYS_NAMESPACE_BEGIN
  28
  29 static void extend(RTLIL::Const &arg, int width, bool is_signed)
  30 {
  31         RTLIL::State padding = RTLIL::State::S0;
  32
  33         if (arg.bits.size() > 0 && (is_signed || arg.bits.back() > RTLIL::State::S1))
  34                 padding = arg.bits.back();
  35
  36         while (int(arg.bits.size()) < width)
  37                 arg.bits.push_back(padding);
  38 }
  39
  40 static void extend_u0(RTLIL::Const &arg, int width, bool is_signed)
  41 {
  42         RTLIL::State padding = RTLIL::State::S0;
  43
  44         if (arg.bits.size() > 0 && is_signed)
  45                 padding = arg.bits.back();
  46
  47         while (int(arg.bits.size()) < width)
  48                 arg.bits.push_back(padding);
  49 }
  50
  51 static BigInteger const2big(const RTLIL::Const &val, bool as_signed, int &undef_bit_pos)
  52 {
  53         BigInteger result = 0, this_bit = 1;
  54         for (size_t i = 0; i < val.bits.size(); i++) {
  55                 if (val.bits[i] == RTLIL::State::S1) {
  56                         if (as_signed && i+1 == val.bits.size())
  57                                 result -= this_bit;
  58                         else
  59                                 result += this_bit;
  60                 }
  61                 else if (val.bits[i] != RTLIL::State::S0) {
  62                         if (undef_bit_pos < 0)
  63                                 undef_bit_pos = i;
  64                 }
  65                 this_bit *= 2;
  66         }
  67         return result;
  68 }
  69
  70 static RTLIL::Const big2const(const BigInteger &val, int result_len, int undef_bit_pos)
  71 {
  72         if (undef_bit_pos >= 0)
  73                 return RTLIL::Const(RTLIL::State::Sx, result_len);
  74
  75         BigUnsigned mag = val.getMagnitude();
  76         RTLIL::Const result(0, result_len);
  77
  78         if (!mag.isZero())
  79         {
  80                 if (val.getSign() < 0)
  81                 {
  82                         mag--;
  83                         for (int i = 0; i < result_len; i++)
  84                                 result.bits[i] = mag.getBit(i) ? RTLIL::State::S0 : RTLIL::State::S1;
  85                 }
  86                 else
  87                 {
  88                         for (int i = 0; i < result_len; i++)
  89                                 result.bits[i] = mag.getBit(i) ? RTLIL::State::S1 : RTLIL::State::S0;
  90                 }
  91         }
  92
  93 #if 0
  94         if (undef_bit_pos >= 0)
  95                 for (int i = undef_bit_pos; i < result_len; i++)
  96                         result.bits[i] = RTLIL::State::Sx;
  97 #endif
  98
  99         return result;
 100 }
 101
 102 static RTLIL::State logic_and(RTLIL::State a, RTLIL::State b)
 103 {
 104         if (a == RTLIL::State::S0) return RTLIL::State::S0;
 105         if (b == RTLIL::State::S0) return RTLIL::State::S0;
 106         if (a != RTLIL::State::S1) return RTLIL::State::Sx;
 107         if (b != RTLIL::State::S1) return RTLIL::State::Sx;
 108         return RTLIL::State::S1;
 109 }
 110
 111 static RTLIL::State logic_or(RTLIL::State a, RTLIL::State b)
 112 {
 113         if (a == RTLIL::State::S1) return RTLIL::State::S1;
 114         if (b == RTLIL::State::S1) return RTLIL::State::S1;
 115         if (a != RTLIL::State::S0) return RTLIL::State::Sx;
 116         if (b != RTLIL::State::S0) return RTLIL::State::Sx;
 117         return RTLIL::State::S0;
 118 }
 119
 120 static RTLIL::State logic_xor(RTLIL::State a, RTLIL::State b)
 121 {
 122         if (a != RTLIL::State::S0 && a != RTLIL::State::S1) return RTLIL::State::Sx;
 123         if (b != RTLIL::State::S0 && b != RTLIL::State::S1) return RTLIL::State::Sx;
 124         return a != b ? RTLIL::State::S1 : RTLIL::State::S0;
 125 }
 126
 127 static RTLIL::State logic_xnor(RTLIL::State a, RTLIL::State b)
 128 {
 129         if (a != RTLIL::State::S0 && a != RTLIL::State::S1) return RTLIL::State::Sx;
 130         if (b != RTLIL::State::S0 && b != RTLIL::State::S1) return RTLIL::State::Sx;
 131         return a == b ? RTLIL::State::S1 : RTLIL::State::S0;
 132 }
 133
 134 RTLIL::Const RTLIL::const_not(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 135 {
 136         if (result_len < 0)
 137                 result_len = arg1.bits.size();
 138
 139         RTLIL::Const arg1_ext = arg1;
 140         extend_u0(arg1_ext, result_len, signed1);
 141
 142         RTLIL::Const result(RTLIL::State::Sx, result_len);
 143         for (size_t i = 0; i < size_t(result_len); i++) {
 144                 if (i >= arg1_ext.bits.size())
 145                         result.bits[i] = RTLIL::State::S0;
 146                 else if (arg1_ext.bits[i] == RTLIL::State::S0)
 147                         result.bits[i] = RTLIL::State::S1;
 148                 else if (arg1_ext.bits[i] == RTLIL::State::S1)
 149                         result.bits[i] = RTLIL::State::S0;
 150         }
 151
 152         return result;
 153 }
 154
 155 static RTLIL::Const logic_wrapper(RTLIL::State(*logic_func)(RTLIL::State, RTLIL::State),
 156                 RTLIL::Const arg1, RTLIL::Const arg2, bool signed1, bool signed2, int result_len = -1)
 157 {
 158         if (result_len < 0)
 159                 result_len = std::max(arg1.bits.size(), arg2.bits.size());
 160
 161         extend_u0(arg1, result_len, signed1);
 162         extend_u0(arg2, result_len, signed2);
 163
 164         RTLIL::Const result(RTLIL::State::Sx, result_len);
 165         for (size_t i = 0; i < size_t(result_len); i++) {
 166                 RTLIL::State a = i < arg1.bits.size() ? arg1.bits[i] : RTLIL::State::S0;
 167                 RTLIL::State b = i < arg2.bits.size() ? arg2.bits[i] : RTLIL::State::S0;
 168                 result.bits[i] = logic_func(a, b);
 169         }
 170
 171         return result;
 172 }
 173
 174 RTLIL::Const RTLIL::const_and(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 175 {
 176         return logic_wrapper(logic_and, arg1, arg2, signed1, signed2, result_len);
 177 }
 178
 179 RTLIL::Const RTLIL::const_or(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 180 {
 181         return logic_wrapper(logic_or, arg1, arg2, signed1, signed2, result_len);
 182 }
 183
 184 RTLIL::Const RTLIL::const_xor(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 185 {
 186         return logic_wrapper(logic_xor, arg1, arg2, signed1, signed2, result_len);
 187 }
 188
 189 RTLIL::Const RTLIL::const_xnor(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 190 {
 191         return logic_wrapper(logic_xnor, arg1, arg2, signed1, signed2, result_len);
 192 }
 193
 194 static RTLIL::Const logic_reduce_wrapper(RTLIL::State initial, RTLIL::State(*logic_func)(RTLIL::State, RTLIL::State), const RTLIL::Const &arg1, int result_len)
 195 {
 196         RTLIL::State temp = initial;
 197
 198         for (size_t i = 0; i < arg1.bits.size(); i++)
 199                 temp = logic_func(temp, arg1.bits[i]);
 200
 201         RTLIL::Const result(temp);
 202         while (int(result.bits.size()) < result_len)
 203                 result.bits.push_back(RTLIL::State::S0);
 204         return result;
 205 }
 206
 207 RTLIL::Const RTLIL::const_reduce_and(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 208 {
 209         return logic_reduce_wrapper(RTLIL::State::S1, logic_and, arg1, result_len);
 210 }
 211
 212 RTLIL::Const RTLIL::const_reduce_or(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 213 {
 214         return logic_reduce_wrapper(RTLIL::State::S0, logic_or, arg1, result_len);
 215 }
 216
 217 RTLIL::Const RTLIL::const_reduce_xor(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 218 {
 219         return logic_reduce_wrapper(RTLIL::State::S0, logic_xor, arg1, result_len);
 220 }
 221
 222 RTLIL::Const RTLIL::const_reduce_xnor(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 223 {
 224         RTLIL::Const buffer = logic_reduce_wrapper(RTLIL::State::S0, logic_xor, arg1, result_len);
 225         if (!buffer.bits.empty()) {
 226                 if (buffer.bits.front() == RTLIL::State::S0)
 227                         buffer.bits.front() = RTLIL::State::S1;
 228                 else if (buffer.bits.front() == RTLIL::State::S1)
 229                         buffer.bits.front() = RTLIL::State::S0;
 230         }
 231         return buffer;
 232 }
 233
 234 RTLIL::Const RTLIL::const_reduce_bool(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 235 {
 236         return logic_reduce_wrapper(RTLIL::State::S0, logic_or, arg1, result_len);
 237 }
 238
 239 RTLIL::Const RTLIL::const_logic_not(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 240 {
 241         int undef_bit_pos_a = -1;
 242         BigInteger a = const2big(arg1, signed1, undef_bit_pos_a);
 243         RTLIL::Const result(a.isZero() ? undef_bit_pos_a >= 0 ? RTLIL::State::Sx : RTLIL::State::S1 : RTLIL::State::S0);
 244
 245         while (int(result.bits.size()) < result_len)
 246                 result.bits.push_back(RTLIL::State::S0);
 247         return result;
 248 }
 249
 250 RTLIL::Const RTLIL::const_logic_and(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 251 {
 252         int undef_bit_pos_a = -1, undef_bit_pos_b = -1;
 253         BigInteger a = const2big(arg1, signed1, undef_bit_pos_a);
 254         BigInteger b = const2big(arg2, signed2, undef_bit_pos_b);
 255
 256         RTLIL::State bit_a = a.isZero() ? undef_bit_pos_a >= 0 ? RTLIL::State::Sx : RTLIL::State::S0 : RTLIL::State::S1;
 257         RTLIL::State bit_b = b.isZero() ? undef_bit_pos_b >= 0 ? RTLIL::State::Sx : RTLIL::State::S0 : RTLIL::State::S1;
 258         RTLIL::Const result(logic_and(bit_a, bit_b));
 259
 260         while (int(result.bits.size()) < result_len)
 261                 result.bits.push_back(RTLIL::State::S0);
 262         return result;
 263 }
 264
 265 RTLIL::Const RTLIL::const_logic_or(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 266 {
 267         int undef_bit_pos_a = -1, undef_bit_pos_b = -1;
 268         BigInteger a = const2big(arg1, signed1, undef_bit_pos_a);
 269         BigInteger b = const2big(arg2, signed2, undef_bit_pos_b);
 270
 271         RTLIL::State bit_a = a.isZero() ? undef_bit_pos_a >= 0 ? RTLIL::State::Sx : RTLIL::State::S0 : RTLIL::State::S1;
 272         RTLIL::State bit_b = b.isZero() ? undef_bit_pos_b >= 0 ? RTLIL::State::Sx : RTLIL::State::S0 : RTLIL::State::S1;
 273         RTLIL::Const result(logic_or(bit_a, bit_b));
 274
 275         while (int(result.bits.size()) < result_len)
 276                 result.bits.push_back(RTLIL::State::S0);
 277         return result;
 278 }
 279
 280 static RTLIL::Const const_shift_worker(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool sign_ext, int direction, int result_len)
 281 {
 282         int undef_bit_pos = -1;
 283         BigInteger offset = const2big(arg2, false, undef_bit_pos) * direction;
 284
 285         if (result_len < 0)
 286                 result_len = arg1.bits.size();
 287
 288         RTLIL::Const result(RTLIL::State::Sx, result_len);
 289         if (undef_bit_pos >= 0)
 290                 return result;
 291
 292         for (int i = 0; i < result_len; i++) {
 293                 BigInteger pos = BigInteger(i) + offset;
 294                 if (pos < 0)
 295                         result.bits[i] = RTLIL::State::S0;
 296                 else if (pos >= arg1.bits.size())
 297                         result.bits[i] = sign_ext ? arg1.bits.back() : RTLIL::State::S0;
 298                 else
 299                         result.bits[i] = arg1.bits[pos.toInt()];
 300         }
 301
 302         return result;
 303 }
 304
 305 RTLIL::Const RTLIL::const_shl(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool, int result_len)
 306 {
 307         RTLIL::Const arg1_ext = arg1;
 308         extend_u0(arg1_ext, result_len, signed1);
 309         return const_shift_worker(arg1_ext, arg2, false, -1, result_len);
 310 }
 311
 312 RTLIL::Const RTLIL::const_shr(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool, int result_len)
 313 {
 314         RTLIL::Const arg1_ext = arg1;
 315         extend_u0(arg1_ext, result_len, signed1);
 316         return const_shift_worker(arg1_ext, arg2, false, +1, result_len);
 317 }
 318
 319 RTLIL::Const RTLIL::const_sshl(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 320 {
 321         if (!signed1)
 322                 return const_shl(arg1, arg2, signed1, signed2, result_len);
 323         return const_shift_worker(arg1, arg2, true, -1, result_len);
 324 }
 325
 326 RTLIL::Const RTLIL::const_sshr(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 327 {
 328         if (!signed1)
 329                 return const_shr(arg1, arg2, signed1, signed2, result_len);
 330         return const_shift_worker(arg1, arg2, true, +1, result_len);
 331 }
 332
 333 static RTLIL::Const const_shift_shiftx(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool, bool signed2, int result_len, RTLIL::State other_bits)
 334 {
 335         int undef_bit_pos = -1;
 336         BigInteger offset = const2big(arg2, signed2, undef_bit_pos);
 337
 338         if (result_len < 0)
 339                 result_len = arg1.bits.size();
 340
 341         RTLIL::Const result(RTLIL::State::Sx, result_len);
 342         if (undef_bit_pos >= 0)
 343                 return result;
 344
 345         for (int i = 0; i < result_len; i++) {
 346                 BigInteger pos = BigInteger(i) + offset;
 347                 if (pos < 0 || pos >= arg1.bits.size())
 348                         result.bits[i] = other_bits;
 349                 else
 350                         result.bits[i] = arg1.bits[pos.toInt()];
 351         }
 352
 353         return result;
 354 }
 355
 356 RTLIL::Const RTLIL::const_shift(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 357 {
 358         return const_shift_shiftx(arg1, arg2, signed1, signed2, result_len, RTLIL::State::S0);
 359 }
 360
 361 RTLIL::Const RTLIL::const_shiftx(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 362 {
 363         return const_shift_shiftx(arg1, arg2, signed1, signed2, result_len, RTLIL::State::Sx);
 364 }
 365
 366 RTLIL::Const RTLIL::const_lt(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 367 {
 368         int undef_bit_pos = -1;
 369         bool y = const2big(arg1, signed1, undef_bit_pos) < const2big(arg2, signed2, undef_bit_pos);
 370         RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0);
 371
 372         while (int(result.bits.size()) < result_len)
 373                 result.bits.push_back(RTLIL::State::S0);
 374         return result;
 375 }
 376
 377 RTLIL::Const RTLIL::const_le(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 378 {
 379         int undef_bit_pos = -1;
 380         bool y = const2big(arg1, signed1, undef_bit_pos) <= const2big(arg2, signed2, undef_bit_pos);
 381         RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0);
 382
 383         while (int(result.bits.size()) < result_len)
 384                 result.bits.push_back(RTLIL::State::S0);
 385         return result;
 386 }
 387
 388 RTLIL::Const RTLIL::const_eq(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 389 {
 390         RTLIL::Const arg1_ext = arg1;
 391         RTLIL::Const arg2_ext = arg2;
 392         RTLIL::Const result(RTLIL::State::S0, result_len);
 393
 394         int width = std::max(arg1_ext.bits.size(), arg2_ext.bits.size());
 395         extend_u0(arg1_ext, width, signed1 && signed2);
 396         extend_u0(arg2_ext, width, signed1 && signed2);
 397
 398         RTLIL::State matched_status = RTLIL::State::S1;
 399         for (size_t i = 0; i < arg1_ext.bits.size(); i++) {
 400                 if (arg1_ext.bits.at(i) == RTLIL::State::S0 && arg2_ext.bits.at(i) == RTLIL::State::S1)
 401                         return result;
 402                 if (arg1_ext.bits.at(i) == RTLIL::State::S1 && arg2_ext.bits.at(i) == RTLIL::State::S0)
 403                         return result;
 404                 if (arg1_ext.bits.at(i) > RTLIL::State::S1 || arg2_ext.bits.at(i) > RTLIL::State::S1)
 405                         matched_status = RTLIL::State::Sx;
 406         }
 407
 408         result.bits.front() = matched_status;
 409         return result;
 410 }
 411
 412 RTLIL::Const RTLIL::const_ne(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 413 {
 414         RTLIL::Const result = RTLIL::const_eq(arg1, arg2, signed1, signed2, result_len);
 415         if (result.bits.front() == RTLIL::State::S0)
 416                 result.bits.front() = RTLIL::State::S1;
 417         else if (result.bits.front() == RTLIL::State::S1)
 418                 result.bits.front() = RTLIL::State::S0;
 419         return result;
 420 }
 421
 422 RTLIL::Const RTLIL::const_eqx(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 423 {
 424         RTLIL::Const arg1_ext = arg1;
 425         RTLIL::Const arg2_ext = arg2;
 426         RTLIL::Const result(RTLIL::State::S0, result_len);
 427
 428         int width = std::max(arg1_ext.bits.size(), arg2_ext.bits.size());
 429         extend_u0(arg1_ext, width, signed1 && signed2);
 430         extend_u0(arg2_ext, width, signed1 && signed2);
 431
 432         for (size_t i = 0; i < arg1_ext.bits.size(); i++) {
 433                 if (arg1_ext.bits.at(i) != arg2_ext.bits.at(i))
 434                         return result;
 435         }
 436
 437         result.bits.front() = RTLIL::State::S1;
 438         return result;
 439 }
 440
 441 RTLIL::Const RTLIL::const_nex(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 442 {
 443         RTLIL::Const result = RTLIL::const_eqx(arg1, arg2, signed1, signed2, result_len);
 444         if (result.bits.front() == RTLIL::State::S0)
 445                 result.bits.front() = RTLIL::State::S1;
 446         else if (result.bits.front() == RTLIL::State::S1)
 447                 result.bits.front() = RTLIL::State::S0;
 448         return result;
 449 }
 450
 451 RTLIL::Const RTLIL::const_ge(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 452 {
 453         int undef_bit_pos = -1;
 454         bool y = const2big(arg1, signed1, undef_bit_pos) >= const2big(arg2, signed2, undef_bit_pos);
 455         RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0);
 456
 457         while (int(result.bits.size()) < result_len)
 458                 result.bits.push_back(RTLIL::State::S0);
 459         return result;
 460 }
 461
 462 RTLIL::Const RTLIL::const_gt(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 463 {
 464         int undef_bit_pos = -1;
 465         bool y = const2big(arg1, signed1, undef_bit_pos) > const2big(arg2, signed2, undef_bit_pos);
 466         RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0);
 467
 468         while (int(result.bits.size()) < result_len)
 469                 result.bits.push_back(RTLIL::State::S0);
 470         return result;
 471 }
 472
 473 RTLIL::Const RTLIL::const_add(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 474 {
 475         int undef_bit_pos = -1;
 476         BigInteger y = const2big(arg1, signed1, undef_bit_pos) + const2big(arg2, signed2, undef_bit_pos);
 477         return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), undef_bit_pos);
 478 }
 479
 480 RTLIL::Const RTLIL::const_sub(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 481 {
 482         int undef_bit_pos = -1;
 483         BigInteger y = const2big(arg1, signed1, undef_bit_pos) - const2big(arg2, signed2, undef_bit_pos);
 484         return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), undef_bit_pos);
 485 }
 486
 487 RTLIL::Const RTLIL::const_mul(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 488 {
 489         int undef_bit_pos = -1;
 490         BigInteger y = const2big(arg1, signed1, undef_bit_pos) * const2big(arg2, signed2, undef_bit_pos);
 491         return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
 492 }
 493
 494 RTLIL::Const RTLIL::const_div(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 495 {
 496         int undef_bit_pos = -1;
 497         BigInteger a = const2big(arg1, signed1, undef_bit_pos);
 498         BigInteger b = const2big(arg2, signed2, undef_bit_pos);
 499         if (b.isZero())
 500                 return RTLIL::Const(RTLIL::State::Sx, result_len);
 501         bool result_neg = (a.getSign() == BigInteger::negative) != (b.getSign() == BigInteger::negative);
 502         a = a.getSign() == BigInteger::negative ? -a : a;
 503         b = b.getSign() == BigInteger::negative ? -b : b;
 504         return big2const(result_neg ? -(a / b) : (a / b), result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
 505 }
 506
 507 RTLIL::Const RTLIL::const_mod(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 508 {
 509         int undef_bit_pos = -1;
 510         BigInteger a = const2big(arg1, signed1, undef_bit_pos);
 511         BigInteger b = const2big(arg2, signed2, undef_bit_pos);
 512         if (b.isZero())
 513                 return RTLIL::Const(RTLIL::State::Sx, result_len);
 514         bool result_neg = a.getSign() == BigInteger::negative;
 515         a = a.getSign() == BigInteger::negative ? -a : a;
 516         b = b.getSign() == BigInteger::negative ? -b : b;
 517         return big2const(result_neg ? -(a % b) : (a % b), result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
 518 }
 519
 520 RTLIL::Const RTLIL::const_pow(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 521 {
 522         int undef_bit_pos = -1;
 523
 524         BigInteger a = const2big(arg1, signed1, undef_bit_pos);
 525         BigInteger b = const2big(arg2, signed2, undef_bit_pos);
 526         BigInteger y = 1;
 527
 528         if (a == 0 && b < 0)
 529                 return RTLIL::Const(RTLIL::State::Sx, result_len);
 530
 531         if (a == 0 && b > 0)
 532                 return RTLIL::Const(RTLIL::State::S0, result_len);
 533
 534         if (b < 0)
 535         {
 536                 if (a < -1 || a > 1)
 537                         y = 0;
 538                 if (a == -1)
 539                         y = (-b % 2) == 0 ? 1 : -1;
 540         }
 541
 542         if (b > 0)
 543         {
 544                 // Power-modulo with 2^result_len as modulus
 545                 BigInteger modulus = 1;
 546                 int modulus_bits = (result_len >= 0 ? result_len : 1024);
 547                 for (int i = 0; i < modulus_bits; i++)
 548                         modulus *= 2;
 549
 550                 bool flip_result_sign = false;
 551                 if (a < 0) {
 552                         a *= -1;
 553                         if (b % 2 == 1)
 554                                 flip_result_sign = true;
 555                 }
 556
 557                 while (b > 0) {
 558                         if (b % 2 == 1)
 559                                 y = (y * a) % modulus;
 560                         b = b / 2;
 561                         a = (a * a) % modulus;
 562                 }
 563
 564                 if (flip_result_sign)
 565                         y *= -1;
 566         }
 567
 568         return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
 569 }
 570
 571 RTLIL::Const RTLIL::const_pos(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 572 {
 573         RTLIL::Const arg1_ext = arg1;
 574         extend(arg1_ext, result_len, signed1);
 575
 576         return arg1_ext;
 577 }
 578
 579 RTLIL::Const RTLIL::const_bu0(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 580 {
 581         RTLIL::Const arg1_ext = arg1;
 582         extend_u0(arg1_ext, result_len, signed1);
 583
 584         return arg1_ext;
 585 }
 586
 587 RTLIL::Const RTLIL::const_neg(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 588 {
 589         RTLIL::Const arg1_ext = arg1;
 590         extend(arg1_ext, result_len, signed1);
 591
 592         RTLIL::Const zero(RTLIL::State::S0, 1);
 593         return RTLIL::const_sub(zero, arg1_ext, false, signed1, result_len);
 594 }
 595
 596 YOSYS_NAMESPACE_END
 597