2 * yosys -- Yosys Open SYnthesis Suite
4 * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 // [[CITE]] Power-Modulus Algorithm
21 // Schneier, Bruce (1996). Applied Cryptography: Protocols, Algorithms, and Source Code in C,
22 // Second Edition (2nd ed.). Wiley. ISBN 978-0-471-11709-4, page 244
24 #include "kernel/log.h"
25 #include "kernel/rtlil.h"
26 #include "libs/bigint/BigIntegerLibrary.hh"
29 static void extend(RTLIL::Const
&arg
, int width
, bool is_signed
)
31 RTLIL::State padding
= RTLIL::State::S0
;
33 if (arg
.bits
.size() > 0 && (is_signed
|| arg
.bits
.back() > RTLIL::State::S1
))
34 padding
= arg
.bits
.back();
36 while (int(arg
.bits
.size()) < width
)
37 arg
.bits
.push_back(padding
);
40 static void extend_u0(RTLIL::Const
&arg
, int width
, bool is_signed
)
42 RTLIL::State padding
= RTLIL::State::S0
;
44 if (arg
.bits
.size() > 0 && is_signed
)
45 padding
= arg
.bits
.back();
47 while (int(arg
.bits
.size()) < width
)
48 arg
.bits
.push_back(padding
);
51 static BigInteger
const2big(const RTLIL::Const
&val
, bool as_signed
, int &undef_bit_pos
)
53 BigInteger result
= 0, this_bit
= 1;
54 for (size_t i
= 0; i
< val
.bits
.size(); i
++) {
55 if (val
.bits
[i
] == RTLIL::State::S1
) {
56 if (as_signed
&& i
+1 == val
.bits
.size())
61 else if (val
.bits
[i
] != RTLIL::State::S0
) {
62 if (undef_bit_pos
< 0)
70 static RTLIL::Const
big2const(const BigInteger
&val
, int result_len
, int undef_bit_pos
)
72 BigUnsigned mag
= val
.getMagnitude();
73 RTLIL::Const
result(0, result_len
);
77 if (val
.getSign() < 0)
80 for (int i
= 0; i
< result_len
; i
++)
81 result
.bits
[i
] = mag
.getBit(i
) ? RTLIL::State::S0
: RTLIL::State::S1
;
85 for (int i
= 0; i
< result_len
; i
++)
86 result
.bits
[i
] = mag
.getBit(i
) ? RTLIL::State::S1
: RTLIL::State::S0
;
90 if (undef_bit_pos
>= 0)
91 for (int i
= undef_bit_pos
; i
< result_len
; i
++)
92 result
.bits
[i
] = RTLIL::State::Sx
;
97 static RTLIL::State
logic_and(RTLIL::State a
, RTLIL::State b
)
99 if (a
== RTLIL::State::S0
) return RTLIL::State::S0
;
100 if (b
== RTLIL::State::S0
) return RTLIL::State::S0
;
101 if (a
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
102 if (b
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
103 return RTLIL::State::S1
;
106 static RTLIL::State
logic_or(RTLIL::State a
, RTLIL::State b
)
108 if (a
== RTLIL::State::S1
) return RTLIL::State::S1
;
109 if (b
== RTLIL::State::S1
) return RTLIL::State::S1
;
110 if (a
!= RTLIL::State::S0
) return RTLIL::State::Sx
;
111 if (b
!= RTLIL::State::S0
) return RTLIL::State::Sx
;
112 return RTLIL::State::S0
;
115 static RTLIL::State
logic_xor(RTLIL::State a
, RTLIL::State b
)
117 if (a
!= RTLIL::State::S0
&& a
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
118 if (b
!= RTLIL::State::S0
&& b
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
119 return a
!= b
? RTLIL::State::S1
: RTLIL::State::S0
;
122 static RTLIL::State
logic_xnor(RTLIL::State a
, RTLIL::State b
)
124 if (a
!= RTLIL::State::S0
&& a
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
125 if (b
!= RTLIL::State::S0
&& b
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
126 return a
== b
? RTLIL::State::S1
: RTLIL::State::S0
;
129 RTLIL::Const
RTLIL::const_not(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool signed1
, bool, int result_len
)
132 result_len
= arg1
.bits
.size();
134 RTLIL::Const arg1_ext
= arg1
;
135 extend_u0(arg1_ext
, result_len
, signed1
);
137 RTLIL::Const
result(RTLIL::State::Sx
, result_len
);
138 for (size_t i
= 0; i
< size_t(result_len
); i
++) {
139 if (i
>= arg1_ext
.bits
.size())
140 result
.bits
[i
] = RTLIL::State::S0
;
141 else if (arg1_ext
.bits
[i
] == RTLIL::State::S0
)
142 result
.bits
[i
] = RTLIL::State::S1
;
143 else if (arg1_ext
.bits
[i
] == RTLIL::State::S1
)
144 result
.bits
[i
] = RTLIL::State::S0
;
150 static RTLIL::Const
logic_wrapper(RTLIL::State(*logic_func
)(RTLIL::State
, RTLIL::State
),
151 RTLIL::Const arg1
, RTLIL::Const arg2
, bool signed1
, bool signed2
, int result_len
= -1)
154 result_len
= std::max(arg1
.bits
.size(), arg2
.bits
.size());
156 extend_u0(arg1
, result_len
, signed1
);
157 extend_u0(arg2
, result_len
, signed2
);
159 RTLIL::Const
result(RTLIL::State::Sx
, result_len
);
160 for (size_t i
= 0; i
< size_t(result_len
); i
++) {
161 RTLIL::State a
= i
< arg1
.bits
.size() ? arg1
.bits
[i
] : RTLIL::State::S0
;
162 RTLIL::State b
= i
< arg2
.bits
.size() ? arg2
.bits
[i
] : RTLIL::State::S0
;
163 result
.bits
[i
] = logic_func(a
, b
);
169 RTLIL::Const
RTLIL::const_and(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
171 return logic_wrapper(logic_and
, arg1
, arg2
, signed1
, signed2
, result_len
);
174 RTLIL::Const
RTLIL::const_or(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
176 return logic_wrapper(logic_or
, arg1
, arg2
, signed1
, signed2
, result_len
);
179 RTLIL::Const
RTLIL::const_xor(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
181 return logic_wrapper(logic_xor
, arg1
, arg2
, signed1
, signed2
, result_len
);
184 RTLIL::Const
RTLIL::const_xnor(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
186 return logic_wrapper(logic_xnor
, arg1
, arg2
, signed1
, signed2
, result_len
);
189 static RTLIL::Const
logic_reduce_wrapper(RTLIL::State initial
, RTLIL::State(*logic_func
)(RTLIL::State
, RTLIL::State
), const RTLIL::Const
&arg1
, int result_len
)
191 RTLIL::State temp
= initial
;
193 for (size_t i
= 0; i
< arg1
.bits
.size(); i
++)
194 temp
= logic_func(temp
, arg1
.bits
[i
]);
196 RTLIL::Const
result(temp
);
197 while (int(result
.bits
.size()) < result_len
)
198 result
.bits
.push_back(RTLIL::State::S0
);
202 RTLIL::Const
RTLIL::const_reduce_and(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
204 return logic_reduce_wrapper(RTLIL::State::S1
, logic_and
, arg1
, result_len
);
207 RTLIL::Const
RTLIL::const_reduce_or(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
209 return logic_reduce_wrapper(RTLIL::State::S0
, logic_or
, arg1
, result_len
);
212 RTLIL::Const
RTLIL::const_reduce_xor(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
214 return logic_reduce_wrapper(RTLIL::State::S0
, logic_xor
, arg1
, result_len
);
217 RTLIL::Const
RTLIL::const_reduce_xnor(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
219 RTLIL::Const buffer
= logic_reduce_wrapper(RTLIL::State::S0
, logic_xor
, arg1
, result_len
);
220 if (!buffer
.bits
.empty()) {
221 if (buffer
.bits
.front() == RTLIL::State::S0
)
222 buffer
.bits
.front() = RTLIL::State::S1
;
223 else if (buffer
.bits
.front() == RTLIL::State::S1
)
224 buffer
.bits
.front() = RTLIL::State::S0
;
229 RTLIL::Const
RTLIL::const_reduce_bool(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
231 return logic_reduce_wrapper(RTLIL::State::S0
, logic_or
, arg1
, result_len
);
234 RTLIL::Const
RTLIL::const_logic_not(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool signed1
, bool, int result_len
)
236 int undef_bit_pos_a
= -1;
237 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos_a
);
238 RTLIL::Const
result(a
.isZero() ? undef_bit_pos_a
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S1
: RTLIL::State::S0
);
240 while (int(result
.bits
.size()) < result_len
)
241 result
.bits
.push_back(RTLIL::State::S0
);
245 RTLIL::Const
RTLIL::const_logic_and(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
247 int undef_bit_pos_a
= -1, undef_bit_pos_b
= -1;
248 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos_a
);
249 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos_b
);
251 RTLIL::State bit_a
= a
.isZero() ? undef_bit_pos_a
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S0
: RTLIL::State::S1
;
252 RTLIL::State bit_b
= b
.isZero() ? undef_bit_pos_b
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S0
: RTLIL::State::S1
;
253 RTLIL::Const
result(logic_and(bit_a
, bit_b
));
255 while (int(result
.bits
.size()) < result_len
)
256 result
.bits
.push_back(RTLIL::State::S0
);
260 RTLIL::Const
RTLIL::const_logic_or(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
262 int undef_bit_pos_a
= -1, undef_bit_pos_b
= -1;
263 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos_a
);
264 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos_b
);
266 RTLIL::State bit_a
= a
.isZero() ? undef_bit_pos_a
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S0
: RTLIL::State::S1
;
267 RTLIL::State bit_b
= b
.isZero() ? undef_bit_pos_b
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S0
: RTLIL::State::S1
;
268 RTLIL::Const
result(logic_or(bit_a
, bit_b
));
270 while (int(result
.bits
.size()) < result_len
)
271 result
.bits
.push_back(RTLIL::State::S0
);
275 static RTLIL::Const
const_shift(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool sign_ext
, int direction
, int result_len
)
277 int undef_bit_pos
= -1;
278 BigInteger offset
= const2big(arg2
, false, undef_bit_pos
) * direction
;
281 result_len
= arg1
.bits
.size();
283 RTLIL::Const
result(RTLIL::State::Sx
, result_len
);
284 if (undef_bit_pos
>= 0)
287 for (int i
= 0; i
< result_len
; i
++) {
288 BigInteger pos
= BigInteger(i
) + offset
;
290 result
.bits
[i
] = RTLIL::State::S0
;
291 else if (pos
>= arg1
.bits
.size())
292 result
.bits
[i
] = sign_ext
? arg1
.bits
.back() : RTLIL::State::S0
;
294 result
.bits
[i
] = arg1
.bits
[pos
.toInt()];
300 RTLIL::Const
RTLIL::const_shl(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool, int result_len
)
302 RTLIL::Const arg1_ext
= arg1
;
303 extend(arg1_ext
, result_len
, signed1
);
304 return const_shift(arg1_ext
, arg2
, false, -1, result_len
);
307 RTLIL::Const
RTLIL::const_shr(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool, int result_len
)
309 RTLIL::Const arg1_ext
= arg1
;
310 extend(arg1_ext
, result_len
, signed1
);
311 return const_shift(arg1_ext
, arg2
, false, +1, result_len
);
314 RTLIL::Const
RTLIL::const_sshl(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
317 return const_shl(arg1
, arg2
, signed1
, signed2
, result_len
);
318 return const_shift(arg1
, arg2
, true, -1, result_len
);
321 RTLIL::Const
RTLIL::const_sshr(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
324 return const_shr(arg1
, arg2
, signed1
, signed2
, result_len
);
325 return const_shift(arg1
, arg2
, true, +1, result_len
);
328 RTLIL::Const
RTLIL::const_lt(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
330 int undef_bit_pos
= -1;
331 bool y
= const2big(arg1
, signed1
, undef_bit_pos
) < const2big(arg2
, signed2
, undef_bit_pos
);
332 RTLIL::Const
result(undef_bit_pos
>= 0 ? RTLIL::State::Sx
: y
? RTLIL::State::S1
: RTLIL::State::S0
);
334 while (int(result
.bits
.size()) < result_len
)
335 result
.bits
.push_back(RTLIL::State::S0
);
339 RTLIL::Const
RTLIL::const_le(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
341 int undef_bit_pos
= -1;
342 bool y
= const2big(arg1
, signed1
, undef_bit_pos
) <= const2big(arg2
, signed2
, undef_bit_pos
);
343 RTLIL::Const
result(undef_bit_pos
>= 0 ? RTLIL::State::Sx
: y
? RTLIL::State::S1
: RTLIL::State::S0
);
345 while (int(result
.bits
.size()) < result_len
)
346 result
.bits
.push_back(RTLIL::State::S0
);
350 RTLIL::Const
RTLIL::const_eq(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
352 RTLIL::Const arg1_ext
= arg1
;
353 RTLIL::Const arg2_ext
= arg2
;
354 RTLIL::Const
result(RTLIL::State::S0
, result_len
);
356 int width
= std::max(arg1_ext
.bits
.size(), arg2_ext
.bits
.size());
357 extend_u0(arg1_ext
, width
, signed1
&& signed2
);
358 extend_u0(arg2_ext
, width
, signed1
&& signed2
);
360 RTLIL::State matched_status
= RTLIL::State::S1
;
361 for (size_t i
= 0; i
< arg1_ext
.bits
.size(); i
++) {
362 if (arg1_ext
.bits
.at(i
) == RTLIL::State::S0
&& arg2_ext
.bits
.at(i
) == RTLIL::State::S1
)
364 if (arg1_ext
.bits
.at(i
) == RTLIL::State::S1
&& arg2_ext
.bits
.at(i
) == RTLIL::State::S0
)
366 if (arg1_ext
.bits
.at(i
) > RTLIL::State::S1
|| arg2_ext
.bits
.at(i
) > RTLIL::State::S1
)
367 matched_status
= RTLIL::State::Sx
;
370 result
.bits
.front() = matched_status
;
374 RTLIL::Const
RTLIL::const_ne(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
376 RTLIL::Const result
= RTLIL::const_eq(arg1
, arg2
, signed1
, signed2
, result_len
);
377 if (result
.bits
.front() == RTLIL::State::S0
)
378 result
.bits
.front() = RTLIL::State::S1
;
379 else if (result
.bits
.front() == RTLIL::State::S1
)
380 result
.bits
.front() = RTLIL::State::S0
;
384 RTLIL::Const
RTLIL::const_ge(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
386 int undef_bit_pos
= -1;
387 bool y
= const2big(arg1
, signed1
, undef_bit_pos
) >= const2big(arg2
, signed2
, undef_bit_pos
);
388 RTLIL::Const
result(undef_bit_pos
>= 0 ? RTLIL::State::Sx
: y
? RTLIL::State::S1
: RTLIL::State::S0
);
390 while (int(result
.bits
.size()) < result_len
)
391 result
.bits
.push_back(RTLIL::State::S0
);
395 RTLIL::Const
RTLIL::const_gt(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
397 int undef_bit_pos
= -1;
398 bool y
= const2big(arg1
, signed1
, undef_bit_pos
) > const2big(arg2
, signed2
, undef_bit_pos
);
399 RTLIL::Const
result(undef_bit_pos
>= 0 ? RTLIL::State::Sx
: y
? RTLIL::State::S1
: RTLIL::State::S0
);
401 while (int(result
.bits
.size()) < result_len
)
402 result
.bits
.push_back(RTLIL::State::S0
);
406 RTLIL::Const
RTLIL::const_add(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
408 int undef_bit_pos
= -1;
409 BigInteger y
= const2big(arg1
, signed1
, undef_bit_pos
) + const2big(arg2
, signed2
, undef_bit_pos
);
410 return big2const(y
, result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), undef_bit_pos
);
413 RTLIL::Const
RTLIL::const_sub(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
415 int undef_bit_pos
= -1;
416 BigInteger y
= const2big(arg1
, signed1
, undef_bit_pos
) - const2big(arg2
, signed2
, undef_bit_pos
);
417 return big2const(y
, result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), undef_bit_pos
);
420 RTLIL::Const
RTLIL::const_mul(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
422 int undef_bit_pos
= -1;
423 BigInteger y
= const2big(arg1
, signed1
, undef_bit_pos
) * const2big(arg2
, signed2
, undef_bit_pos
);
424 return big2const(y
, result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), std::min(undef_bit_pos
, 0));
427 RTLIL::Const
RTLIL::const_div(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
429 int undef_bit_pos
= -1;
430 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos
);
431 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos
);
433 return RTLIL::Const(RTLIL::State::Sx
, result_len
);
434 bool result_neg
= (a
.getSign() == BigInteger::negative
) != (b
.getSign() == BigInteger::negative
);
435 a
= a
.getSign() == BigInteger::negative
? -a
: a
;
436 b
= b
.getSign() == BigInteger::negative
? -b
: b
;
437 return big2const(result_neg
? -(a
/ b
) : (a
/ b
), result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), std::min(undef_bit_pos
, 0));
440 RTLIL::Const
RTLIL::const_mod(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
442 int undef_bit_pos
= -1;
443 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos
);
444 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos
);
446 return RTLIL::Const(RTLIL::State::Sx
, result_len
);
447 bool result_neg
= a
.getSign() == BigInteger::negative
;
448 a
= a
.getSign() == BigInteger::negative
? -a
: a
;
449 b
= b
.getSign() == BigInteger::negative
? -b
: b
;
450 return big2const(result_neg
? -(a
% b
) : (a
% b
), result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), std::min(undef_bit_pos
, 0));
453 RTLIL::Const
RTLIL::const_pow(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
455 int undef_bit_pos
= -1;
457 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos
);
458 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos
);
462 return RTLIL::Const(RTLIL::State::Sx
, result_len
);
465 return RTLIL::Const(RTLIL::State::S0
, result_len
);
472 y
= (-b
% 2) == 0 ? 1 : -1;
477 // Power-modulo with 2^result_len as modulus
478 BigInteger modulus
= 1;
479 int modulus_bits
= (result_len
>= 0 ? result_len
: 1024);
480 for (int i
= 0; i
< modulus_bits
; i
++)
483 bool flip_result_sign
= false;
487 flip_result_sign
= true;
492 y
= (y
* a
) % modulus
;
494 a
= (a
* a
) % modulus
;
497 if (flip_result_sign
)
501 return big2const(y
, result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), std::min(undef_bit_pos
, 0));
504 RTLIL::Const
RTLIL::const_pos(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool signed1
, bool, int result_len
)
506 RTLIL::Const arg1_ext
= arg1
;
507 extend(arg1_ext
, result_len
, signed1
);
512 RTLIL::Const
RTLIL::const_neg(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool signed1
, bool, int result_len
)
514 RTLIL::Const arg1_ext
= arg1
;
515 extend(arg1_ext
, result_len
, signed1
);
517 RTLIL::Const
zero(RTLIL::State::S0
, 1);
518 return RTLIL::const_sub(zero
, arg1_ext
, false, signed1
, result_len
);