fc978c11a9193e37262b0007149e9790220f20ca
2 * yosys -- Yosys Open SYnthesis Suite
4 * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 // [[CITE]] Power-Modulus Algorithm
21 // Schneier, Bruce (1996). Applied Cryptography: Protocols, Algorithms, and Source Code in C,
22 // Second Edition (2nd ed.). Wiley. ISBN 978-0-471-11709-4, page 244
24 #include "kernel/log.h"
25 #include "kernel/rtlil.h"
26 #include "libs/bigint/BigIntegerLibrary.hh"
29 static void extend(RTLIL::Const
&arg
, int width
, bool is_signed
)
31 RTLIL::State padding
= RTLIL::State::S0
;
33 if (arg
.bits
.size() > 0 && (is_signed
|| arg
.bits
.back() > RTLIL::State::S1
))
34 padding
= arg
.bits
.back();
36 while (int(arg
.bits
.size()) < width
)
37 arg
.bits
.push_back(padding
);
40 static void extend_u0(RTLIL::Const
&arg
, int width
, bool is_signed
)
42 RTLIL::State padding
= RTLIL::State::S0
;
44 if (arg
.bits
.size() > 0 && is_signed
)
45 padding
= arg
.bits
.back();
47 while (int(arg
.bits
.size()) < width
)
48 arg
.bits
.push_back(padding
);
51 static BigInteger
const2big(const RTLIL::Const
&val
, bool as_signed
, int &undef_bit_pos
)
53 BigInteger result
= 0, this_bit
= 1;
54 for (size_t i
= 0; i
< val
.bits
.size(); i
++) {
55 if (val
.bits
[i
] == RTLIL::State::S1
) {
56 if (as_signed
&& i
+1 == val
.bits
.size())
61 else if (val
.bits
[i
] != RTLIL::State::S0
) {
62 if (undef_bit_pos
< 0)
70 static RTLIL::Const
big2const(const BigInteger
&val
, int result_len
, int undef_bit_pos
)
72 if (undef_bit_pos
>= 0)
73 return RTLIL::Const(RTLIL::State::Sx
, result_len
);
75 BigUnsigned mag
= val
.getMagnitude();
76 RTLIL::Const
result(0, result_len
);
80 if (val
.getSign() < 0)
83 for (int i
= 0; i
< result_len
; i
++)
84 result
.bits
[i
] = mag
.getBit(i
) ? RTLIL::State::S0
: RTLIL::State::S1
;
88 for (int i
= 0; i
< result_len
; i
++)
89 result
.bits
[i
] = mag
.getBit(i
) ? RTLIL::State::S1
: RTLIL::State::S0
;
94 if (undef_bit_pos
>= 0)
95 for (int i
= undef_bit_pos
; i
< result_len
; i
++)
96 result
.bits
[i
] = RTLIL::State::Sx
;
102 static RTLIL::State
logic_and(RTLIL::State a
, RTLIL::State b
)
104 if (a
== RTLIL::State::S0
) return RTLIL::State::S0
;
105 if (b
== RTLIL::State::S0
) return RTLIL::State::S0
;
106 if (a
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
107 if (b
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
108 return RTLIL::State::S1
;
111 static RTLIL::State
logic_or(RTLIL::State a
, RTLIL::State b
)
113 if (a
== RTLIL::State::S1
) return RTLIL::State::S1
;
114 if (b
== RTLIL::State::S1
) return RTLIL::State::S1
;
115 if (a
!= RTLIL::State::S0
) return RTLIL::State::Sx
;
116 if (b
!= RTLIL::State::S0
) return RTLIL::State::Sx
;
117 return RTLIL::State::S0
;
120 static RTLIL::State
logic_xor(RTLIL::State a
, RTLIL::State b
)
122 if (a
!= RTLIL::State::S0
&& a
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
123 if (b
!= RTLIL::State::S0
&& b
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
124 return a
!= b
? RTLIL::State::S1
: RTLIL::State::S0
;
127 static RTLIL::State
logic_xnor(RTLIL::State a
, RTLIL::State b
)
129 if (a
!= RTLIL::State::S0
&& a
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
130 if (b
!= RTLIL::State::S0
&& b
!= RTLIL::State::S1
) return RTLIL::State::Sx
;
131 return a
== b
? RTLIL::State::S1
: RTLIL::State::S0
;
134 RTLIL::Const
RTLIL::const_not(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool signed1
, bool, int result_len
)
137 result_len
= arg1
.bits
.size();
139 RTLIL::Const arg1_ext
= arg1
;
140 extend_u0(arg1_ext
, result_len
, signed1
);
142 RTLIL::Const
result(RTLIL::State::Sx
, result_len
);
143 for (size_t i
= 0; i
< size_t(result_len
); i
++) {
144 if (i
>= arg1_ext
.bits
.size())
145 result
.bits
[i
] = RTLIL::State::S0
;
146 else if (arg1_ext
.bits
[i
] == RTLIL::State::S0
)
147 result
.bits
[i
] = RTLIL::State::S1
;
148 else if (arg1_ext
.bits
[i
] == RTLIL::State::S1
)
149 result
.bits
[i
] = RTLIL::State::S0
;
155 static RTLIL::Const
logic_wrapper(RTLIL::State(*logic_func
)(RTLIL::State
, RTLIL::State
),
156 RTLIL::Const arg1
, RTLIL::Const arg2
, bool signed1
, bool signed2
, int result_len
= -1)
159 result_len
= std::max(arg1
.bits
.size(), arg2
.bits
.size());
161 extend_u0(arg1
, result_len
, signed1
);
162 extend_u0(arg2
, result_len
, signed2
);
164 RTLIL::Const
result(RTLIL::State::Sx
, result_len
);
165 for (size_t i
= 0; i
< size_t(result_len
); i
++) {
166 RTLIL::State a
= i
< arg1
.bits
.size() ? arg1
.bits
[i
] : RTLIL::State::S0
;
167 RTLIL::State b
= i
< arg2
.bits
.size() ? arg2
.bits
[i
] : RTLIL::State::S0
;
168 result
.bits
[i
] = logic_func(a
, b
);
174 RTLIL::Const
RTLIL::const_and(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
176 return logic_wrapper(logic_and
, arg1
, arg2
, signed1
, signed2
, result_len
);
179 RTLIL::Const
RTLIL::const_or(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
181 return logic_wrapper(logic_or
, arg1
, arg2
, signed1
, signed2
, result_len
);
184 RTLIL::Const
RTLIL::const_xor(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
186 return logic_wrapper(logic_xor
, arg1
, arg2
, signed1
, signed2
, result_len
);
189 RTLIL::Const
RTLIL::const_xnor(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
191 return logic_wrapper(logic_xnor
, arg1
, arg2
, signed1
, signed2
, result_len
);
194 static RTLIL::Const
logic_reduce_wrapper(RTLIL::State initial
, RTLIL::State(*logic_func
)(RTLIL::State
, RTLIL::State
), const RTLIL::Const
&arg1
, int result_len
)
196 RTLIL::State temp
= initial
;
198 for (size_t i
= 0; i
< arg1
.bits
.size(); i
++)
199 temp
= logic_func(temp
, arg1
.bits
[i
]);
201 RTLIL::Const
result(temp
);
202 while (int(result
.bits
.size()) < result_len
)
203 result
.bits
.push_back(RTLIL::State::S0
);
207 RTLIL::Const
RTLIL::const_reduce_and(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
209 return logic_reduce_wrapper(RTLIL::State::S1
, logic_and
, arg1
, result_len
);
212 RTLIL::Const
RTLIL::const_reduce_or(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
214 return logic_reduce_wrapper(RTLIL::State::S0
, logic_or
, arg1
, result_len
);
217 RTLIL::Const
RTLIL::const_reduce_xor(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
219 return logic_reduce_wrapper(RTLIL::State::S0
, logic_xor
, arg1
, result_len
);
222 RTLIL::Const
RTLIL::const_reduce_xnor(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
224 RTLIL::Const buffer
= logic_reduce_wrapper(RTLIL::State::S0
, logic_xor
, arg1
, result_len
);
225 if (!buffer
.bits
.empty()) {
226 if (buffer
.bits
.front() == RTLIL::State::S0
)
227 buffer
.bits
.front() = RTLIL::State::S1
;
228 else if (buffer
.bits
.front() == RTLIL::State::S1
)
229 buffer
.bits
.front() = RTLIL::State::S0
;
234 RTLIL::Const
RTLIL::const_reduce_bool(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool, bool, int result_len
)
236 return logic_reduce_wrapper(RTLIL::State::S0
, logic_or
, arg1
, result_len
);
239 RTLIL::Const
RTLIL::const_logic_not(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool signed1
, bool, int result_len
)
241 int undef_bit_pos_a
= -1;
242 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos_a
);
243 RTLIL::Const
result(a
.isZero() ? undef_bit_pos_a
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S1
: RTLIL::State::S0
);
245 while (int(result
.bits
.size()) < result_len
)
246 result
.bits
.push_back(RTLIL::State::S0
);
250 RTLIL::Const
RTLIL::const_logic_and(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
252 int undef_bit_pos_a
= -1, undef_bit_pos_b
= -1;
253 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos_a
);
254 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos_b
);
256 RTLIL::State bit_a
= a
.isZero() ? undef_bit_pos_a
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S0
: RTLIL::State::S1
;
257 RTLIL::State bit_b
= b
.isZero() ? undef_bit_pos_b
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S0
: RTLIL::State::S1
;
258 RTLIL::Const
result(logic_and(bit_a
, bit_b
));
260 while (int(result
.bits
.size()) < result_len
)
261 result
.bits
.push_back(RTLIL::State::S0
);
265 RTLIL::Const
RTLIL::const_logic_or(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
267 int undef_bit_pos_a
= -1, undef_bit_pos_b
= -1;
268 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos_a
);
269 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos_b
);
271 RTLIL::State bit_a
= a
.isZero() ? undef_bit_pos_a
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S0
: RTLIL::State::S1
;
272 RTLIL::State bit_b
= b
.isZero() ? undef_bit_pos_b
>= 0 ? RTLIL::State::Sx
: RTLIL::State::S0
: RTLIL::State::S1
;
273 RTLIL::Const
result(logic_or(bit_a
, bit_b
));
275 while (int(result
.bits
.size()) < result_len
)
276 result
.bits
.push_back(RTLIL::State::S0
);
280 static RTLIL::Const
const_shift(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool sign_ext
, int direction
, int result_len
)
282 int undef_bit_pos
= -1;
283 BigInteger offset
= const2big(arg2
, false, undef_bit_pos
) * direction
;
286 result_len
= arg1
.bits
.size();
288 RTLIL::Const
result(RTLIL::State::Sx
, result_len
);
289 if (undef_bit_pos
>= 0)
292 for (int i
= 0; i
< result_len
; i
++) {
293 BigInteger pos
= BigInteger(i
) + offset
;
295 result
.bits
[i
] = RTLIL::State::S0
;
296 else if (pos
>= arg1
.bits
.size())
297 result
.bits
[i
] = sign_ext
? arg1
.bits
.back() : RTLIL::State::S0
;
299 result
.bits
[i
] = arg1
.bits
[pos
.toInt()];
305 RTLIL::Const
RTLIL::const_shl(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool, int result_len
)
307 RTLIL::Const arg1_ext
= arg1
;
308 extend(arg1_ext
, result_len
, signed1
);
309 return const_shift(arg1_ext
, arg2
, false, -1, result_len
);
312 RTLIL::Const
RTLIL::const_shr(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool, int result_len
)
314 RTLIL::Const arg1_ext
= arg1
;
315 extend(arg1_ext
, result_len
, signed1
);
316 return const_shift(arg1_ext
, arg2
, false, +1, result_len
);
319 RTLIL::Const
RTLIL::const_sshl(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
322 return const_shl(arg1
, arg2
, signed1
, signed2
, result_len
);
323 return const_shift(arg1
, arg2
, true, -1, result_len
);
326 RTLIL::Const
RTLIL::const_sshr(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
329 return const_shr(arg1
, arg2
, signed1
, signed2
, result_len
);
330 return const_shift(arg1
, arg2
, true, +1, result_len
);
333 RTLIL::Const
RTLIL::const_lt(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
335 int undef_bit_pos
= -1;
336 bool y
= const2big(arg1
, signed1
, undef_bit_pos
) < const2big(arg2
, signed2
, undef_bit_pos
);
337 RTLIL::Const
result(undef_bit_pos
>= 0 ? RTLIL::State::Sx
: y
? RTLIL::State::S1
: RTLIL::State::S0
);
339 while (int(result
.bits
.size()) < result_len
)
340 result
.bits
.push_back(RTLIL::State::S0
);
344 RTLIL::Const
RTLIL::const_le(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
346 int undef_bit_pos
= -1;
347 bool y
= const2big(arg1
, signed1
, undef_bit_pos
) <= const2big(arg2
, signed2
, undef_bit_pos
);
348 RTLIL::Const
result(undef_bit_pos
>= 0 ? RTLIL::State::Sx
: y
? RTLIL::State::S1
: RTLIL::State::S0
);
350 while (int(result
.bits
.size()) < result_len
)
351 result
.bits
.push_back(RTLIL::State::S0
);
355 RTLIL::Const
RTLIL::const_eq(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
357 RTLIL::Const arg1_ext
= arg1
;
358 RTLIL::Const arg2_ext
= arg2
;
359 RTLIL::Const
result(RTLIL::State::S0
, result_len
);
361 int width
= std::max(arg1_ext
.bits
.size(), arg2_ext
.bits
.size());
362 extend_u0(arg1_ext
, width
, signed1
&& signed2
);
363 extend_u0(arg2_ext
, width
, signed1
&& signed2
);
365 RTLIL::State matched_status
= RTLIL::State::S1
;
366 for (size_t i
= 0; i
< arg1_ext
.bits
.size(); i
++) {
367 if (arg1_ext
.bits
.at(i
) == RTLIL::State::S0
&& arg2_ext
.bits
.at(i
) == RTLIL::State::S1
)
369 if (arg1_ext
.bits
.at(i
) == RTLIL::State::S1
&& arg2_ext
.bits
.at(i
) == RTLIL::State::S0
)
371 if (arg1_ext
.bits
.at(i
) > RTLIL::State::S1
|| arg2_ext
.bits
.at(i
) > RTLIL::State::S1
)
372 matched_status
= RTLIL::State::Sx
;
375 result
.bits
.front() = matched_status
;
379 RTLIL::Const
RTLIL::const_ne(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
381 RTLIL::Const result
= RTLIL::const_eq(arg1
, arg2
, signed1
, signed2
, result_len
);
382 if (result
.bits
.front() == RTLIL::State::S0
)
383 result
.bits
.front() = RTLIL::State::S1
;
384 else if (result
.bits
.front() == RTLIL::State::S1
)
385 result
.bits
.front() = RTLIL::State::S0
;
389 RTLIL::Const
RTLIL::const_eqx(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
391 RTLIL::Const arg1_ext
= arg1
;
392 RTLIL::Const arg2_ext
= arg2
;
393 RTLIL::Const
result(RTLIL::State::S0
, result_len
);
395 int width
= std::max(arg1_ext
.bits
.size(), arg2_ext
.bits
.size());
396 extend_u0(arg1_ext
, width
, signed1
&& signed2
);
397 extend_u0(arg2_ext
, width
, signed1
&& signed2
);
399 for (size_t i
= 0; i
< arg1_ext
.bits
.size(); i
++) {
400 if (arg1_ext
.bits
.at(i
) != arg2_ext
.bits
.at(i
))
404 result
.bits
.front() = RTLIL::State::S1
;
408 RTLIL::Const
RTLIL::const_nex(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
410 RTLIL::Const result
= RTLIL::const_eqx(arg1
, arg2
, signed1
, signed2
, result_len
);
411 if (result
.bits
.front() == RTLIL::State::S0
)
412 result
.bits
.front() = RTLIL::State::S1
;
413 else if (result
.bits
.front() == RTLIL::State::S1
)
414 result
.bits
.front() = RTLIL::State::S0
;
418 RTLIL::Const
RTLIL::const_ge(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
420 int undef_bit_pos
= -1;
421 bool y
= const2big(arg1
, signed1
, undef_bit_pos
) >= const2big(arg2
, signed2
, undef_bit_pos
);
422 RTLIL::Const
result(undef_bit_pos
>= 0 ? RTLIL::State::Sx
: y
? RTLIL::State::S1
: RTLIL::State::S0
);
424 while (int(result
.bits
.size()) < result_len
)
425 result
.bits
.push_back(RTLIL::State::S0
);
429 RTLIL::Const
RTLIL::const_gt(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
431 int undef_bit_pos
= -1;
432 bool y
= const2big(arg1
, signed1
, undef_bit_pos
) > const2big(arg2
, signed2
, undef_bit_pos
);
433 RTLIL::Const
result(undef_bit_pos
>= 0 ? RTLIL::State::Sx
: y
? RTLIL::State::S1
: RTLIL::State::S0
);
435 while (int(result
.bits
.size()) < result_len
)
436 result
.bits
.push_back(RTLIL::State::S0
);
440 RTLIL::Const
RTLIL::const_add(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
442 int undef_bit_pos
= -1;
443 BigInteger y
= const2big(arg1
, signed1
, undef_bit_pos
) + const2big(arg2
, signed2
, undef_bit_pos
);
444 return big2const(y
, result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), undef_bit_pos
);
447 RTLIL::Const
RTLIL::const_sub(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
449 int undef_bit_pos
= -1;
450 BigInteger y
= const2big(arg1
, signed1
, undef_bit_pos
) - const2big(arg2
, signed2
, undef_bit_pos
);
451 return big2const(y
, result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), undef_bit_pos
);
454 RTLIL::Const
RTLIL::const_mul(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
456 int undef_bit_pos
= -1;
457 BigInteger y
= const2big(arg1
, signed1
, undef_bit_pos
) * const2big(arg2
, signed2
, undef_bit_pos
);
458 return big2const(y
, result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), std::min(undef_bit_pos
, 0));
461 RTLIL::Const
RTLIL::const_div(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
463 int undef_bit_pos
= -1;
464 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos
);
465 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos
);
467 return RTLIL::Const(RTLIL::State::Sx
, result_len
);
468 bool result_neg
= (a
.getSign() == BigInteger::negative
) != (b
.getSign() == BigInteger::negative
);
469 a
= a
.getSign() == BigInteger::negative
? -a
: a
;
470 b
= b
.getSign() == BigInteger::negative
? -b
: b
;
471 return big2const(result_neg
? -(a
/ b
) : (a
/ b
), result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), std::min(undef_bit_pos
, 0));
474 RTLIL::Const
RTLIL::const_mod(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
476 int undef_bit_pos
= -1;
477 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos
);
478 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos
);
480 return RTLIL::Const(RTLIL::State::Sx
, result_len
);
481 bool result_neg
= a
.getSign() == BigInteger::negative
;
482 a
= a
.getSign() == BigInteger::negative
? -a
: a
;
483 b
= b
.getSign() == BigInteger::negative
? -b
: b
;
484 return big2const(result_neg
? -(a
% b
) : (a
% b
), result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), std::min(undef_bit_pos
, 0));
487 RTLIL::Const
RTLIL::const_pow(const RTLIL::Const
&arg1
, const RTLIL::Const
&arg2
, bool signed1
, bool signed2
, int result_len
)
489 int undef_bit_pos
= -1;
491 BigInteger a
= const2big(arg1
, signed1
, undef_bit_pos
);
492 BigInteger b
= const2big(arg2
, signed2
, undef_bit_pos
);
496 return RTLIL::Const(RTLIL::State::Sx
, result_len
);
499 return RTLIL::Const(RTLIL::State::S0
, result_len
);
506 y
= (-b
% 2) == 0 ? 1 : -1;
511 // Power-modulo with 2^result_len as modulus
512 BigInteger modulus
= 1;
513 int modulus_bits
= (result_len
>= 0 ? result_len
: 1024);
514 for (int i
= 0; i
< modulus_bits
; i
++)
517 bool flip_result_sign
= false;
521 flip_result_sign
= true;
526 y
= (y
* a
) % modulus
;
528 a
= (a
* a
) % modulus
;
531 if (flip_result_sign
)
535 return big2const(y
, result_len
>= 0 ? result_len
: std::max(arg1
.bits
.size(), arg2
.bits
.size()), std::min(undef_bit_pos
, 0));
538 RTLIL::Const
RTLIL::const_pos(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool signed1
, bool, int result_len
)
540 RTLIL::Const arg1_ext
= arg1
;
541 extend(arg1_ext
, result_len
, signed1
);
546 RTLIL::Const
RTLIL::const_neg(const RTLIL::Const
&arg1
, const RTLIL::Const
&, bool signed1
, bool, int result_len
)
548 RTLIL::Const arg1_ext
= arg1
;
549 extend(arg1_ext
, result_len
, signed1
);
551 RTLIL::Const
zero(RTLIL::State::S0
, 1);
552 return RTLIL::const_sub(zero
, arg1_ext
, false, signed1
, result_len
);