kernel/calc.cc

   1 /*
   2  *  yosys -- Yosys Open SYnthesis Suite
   3  *
   4  *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
   5  *
   6  *  Permission to use, copy, modify, and/or distribute this software for any
   7  *  purpose with or without fee is hereby granted, provided that the above
   8  *  copyright notice and this permission notice appear in all copies.
   9  *
  10  *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  */
  19
  20 // [[CITE]] Power-Modulus Algorithm
  21 // Schneier, Bruce (1996). Applied Cryptography: Protocols, Algorithms, and Source Code in C,
  22 // Second Edition (2nd ed.). Wiley. ISBN 978-0-471-11709-4, page 244
  23
  24 #include "kernel/yosys.h"
  25 #include "libs/bigint/BigIntegerLibrary.hh"
  26
  27 YOSYS_NAMESPACE_BEGIN
  28
  29 static void extend(RTLIL::Const &arg, int width, bool is_signed)
  30 {
  31         RTLIL::State padding = RTLIL::State::S0;
  32
  33         if (arg.bits.size() > 0 && (is_signed || arg.bits.back() > RTLIL::State::S1))
  34                 padding = arg.bits.back();
  35
  36         while (int(arg.bits.size()) < width)
  37                 arg.bits.push_back(padding);
  38
  39         arg.bits.resize(width);
  40 }
  41
  42 static void extend_u0(RTLIL::Const &arg, int width, bool is_signed)
  43 {
  44         RTLIL::State padding = RTLIL::State::S0;
  45
  46         if (arg.bits.size() > 0 && is_signed)
  47                 padding = arg.bits.back();
  48
  49         while (int(arg.bits.size()) < width)
  50                 arg.bits.push_back(padding);
  51
  52         arg.bits.resize(width);
  53 }
  54
  55 static BigInteger const2big(const RTLIL::Const &val, bool as_signed, int &undef_bit_pos)
  56 {
  57         BigInteger result = 0, this_bit = 1;
  58         for (size_t i = 0; i < val.bits.size(); i++) {
  59                 if (val.bits[i] == RTLIL::State::S1) {
  60                         if (as_signed && i+1 == val.bits.size())
  61                                 result -= this_bit;
  62                         else
  63                                 result += this_bit;
  64                 }
  65                 else if (val.bits[i] != RTLIL::State::S0) {
  66                         if (undef_bit_pos < 0)
  67                                 undef_bit_pos = i;
  68                 }
  69                 this_bit *= 2;
  70         }
  71         return result;
  72 }
  73
  74 static RTLIL::Const big2const(const BigInteger &val, int result_len, int undef_bit_pos)
  75 {
  76         if (undef_bit_pos >= 0)
  77                 return RTLIL::Const(RTLIL::State::Sx, result_len);
  78
  79         BigUnsigned mag = val.getMagnitude();
  80         RTLIL::Const result(0, result_len);
  81
  82         if (!mag.isZero())
  83         {
  84                 if (val.getSign() < 0)
  85                 {
  86                         mag--;
  87                         for (int i = 0; i < result_len; i++)
  88                                 result.bits[i] = mag.getBit(i) ? RTLIL::State::S0 : RTLIL::State::S1;
  89                 }
  90                 else
  91                 {
  92                         for (int i = 0; i < result_len; i++)
  93                                 result.bits[i] = mag.getBit(i) ? RTLIL::State::S1 : RTLIL::State::S0;
  94                 }
  95         }
  96
  97 #if 0
  98         if (undef_bit_pos >= 0)
  99                 for (int i = undef_bit_pos; i < result_len; i++)
 100                         result.bits[i] = RTLIL::State::Sx;
 101 #endif
 102
 103         return result;
 104 }
 105
 106 static RTLIL::State logic_and(RTLIL::State a, RTLIL::State b)
 107 {
 108         if (a == RTLIL::State::S0) return RTLIL::State::S0;
 109         if (b == RTLIL::State::S0) return RTLIL::State::S0;
 110         if (a != RTLIL::State::S1) return RTLIL::State::Sx;
 111         if (b != RTLIL::State::S1) return RTLIL::State::Sx;
 112         return RTLIL::State::S1;
 113 }
 114
 115 static RTLIL::State logic_or(RTLIL::State a, RTLIL::State b)
 116 {
 117         if (a == RTLIL::State::S1) return RTLIL::State::S1;
 118         if (b == RTLIL::State::S1) return RTLIL::State::S1;
 119         if (a != RTLIL::State::S0) return RTLIL::State::Sx;
 120         if (b != RTLIL::State::S0) return RTLIL::State::Sx;
 121         return RTLIL::State::S0;
 122 }
 123
 124 static RTLIL::State logic_xor(RTLIL::State a, RTLIL::State b)
 125 {
 126         if (a != RTLIL::State::S0 && a != RTLIL::State::S1) return RTLIL::State::Sx;
 127         if (b != RTLIL::State::S0 && b != RTLIL::State::S1) return RTLIL::State::Sx;
 128         return a != b ? RTLIL::State::S1 : RTLIL::State::S0;
 129 }
 130
 131 static RTLIL::State logic_xnor(RTLIL::State a, RTLIL::State b)
 132 {
 133         if (a != RTLIL::State::S0 && a != RTLIL::State::S1) return RTLIL::State::Sx;
 134         if (b != RTLIL::State::S0 && b != RTLIL::State::S1) return RTLIL::State::Sx;
 135         return a == b ? RTLIL::State::S1 : RTLIL::State::S0;
 136 }
 137
 138 RTLIL::Const RTLIL::const_not(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 139 {
 140         if (result_len < 0)
 141                 result_len = arg1.bits.size();
 142
 143         RTLIL::Const arg1_ext = arg1;
 144         extend_u0(arg1_ext, result_len, signed1);
 145
 146         RTLIL::Const result(RTLIL::State::Sx, result_len);
 147         for (size_t i = 0; i < size_t(result_len); i++) {
 148                 if (i >= arg1_ext.bits.size())
 149                         result.bits[i] = RTLIL::State::S0;
 150                 else if (arg1_ext.bits[i] == RTLIL::State::S0)
 151                         result.bits[i] = RTLIL::State::S1;
 152                 else if (arg1_ext.bits[i] == RTLIL::State::S1)
 153                         result.bits[i] = RTLIL::State::S0;
 154         }
 155
 156         return result;
 157 }
 158
 159 static RTLIL::Const logic_wrapper(RTLIL::State(*logic_func)(RTLIL::State, RTLIL::State),
 160                 RTLIL::Const arg1, RTLIL::Const arg2, bool signed1, bool signed2, int result_len = -1)
 161 {
 162         if (result_len < 0)
 163                 result_len = std::max(arg1.bits.size(), arg2.bits.size());
 164
 165         extend_u0(arg1, result_len, signed1);
 166         extend_u0(arg2, result_len, signed2);
 167
 168         RTLIL::Const result(RTLIL::State::Sx, result_len);
 169         for (size_t i = 0; i < size_t(result_len); i++) {
 170                 RTLIL::State a = i < arg1.bits.size() ? arg1.bits[i] : RTLIL::State::S0;
 171                 RTLIL::State b = i < arg2.bits.size() ? arg2.bits[i] : RTLIL::State::S0;
 172                 result.bits[i] = logic_func(a, b);
 173         }
 174
 175         return result;
 176 }
 177
 178 RTLIL::Const RTLIL::const_and(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 179 {
 180         return logic_wrapper(logic_and, arg1, arg2, signed1, signed2, result_len);
 181 }
 182
 183 RTLIL::Const RTLIL::const_or(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 184 {
 185         return logic_wrapper(logic_or, arg1, arg2, signed1, signed2, result_len);
 186 }
 187
 188 RTLIL::Const RTLIL::const_xor(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 189 {
 190         return logic_wrapper(logic_xor, arg1, arg2, signed1, signed2, result_len);
 191 }
 192
 193 RTLIL::Const RTLIL::const_xnor(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 194 {
 195         return logic_wrapper(logic_xnor, arg1, arg2, signed1, signed2, result_len);
 196 }
 197
 198 static RTLIL::Const logic_reduce_wrapper(RTLIL::State initial, RTLIL::State(*logic_func)(RTLIL::State, RTLIL::State), const RTLIL::Const &arg1, int result_len)
 199 {
 200         RTLIL::State temp = initial;
 201
 202         for (size_t i = 0; i < arg1.bits.size(); i++)
 203                 temp = logic_func(temp, arg1.bits[i]);
 204
 205         RTLIL::Const result(temp);
 206         while (int(result.bits.size()) < result_len)
 207                 result.bits.push_back(RTLIL::State::S0);
 208         return result;
 209 }
 210
 211 RTLIL::Const RTLIL::const_reduce_and(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 212 {
 213         return logic_reduce_wrapper(RTLIL::State::S1, logic_and, arg1, result_len);
 214 }
 215
 216 RTLIL::Const RTLIL::const_reduce_or(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 217 {
 218         return logic_reduce_wrapper(RTLIL::State::S0, logic_or, arg1, result_len);
 219 }
 220
 221 RTLIL::Const RTLIL::const_reduce_xor(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 222 {
 223         return logic_reduce_wrapper(RTLIL::State::S0, logic_xor, arg1, result_len);
 224 }
 225
 226 RTLIL::Const RTLIL::const_reduce_xnor(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 227 {
 228         RTLIL::Const buffer = logic_reduce_wrapper(RTLIL::State::S0, logic_xor, arg1, result_len);
 229         if (!buffer.bits.empty()) {
 230                 if (buffer.bits.front() == RTLIL::State::S0)
 231                         buffer.bits.front() = RTLIL::State::S1;
 232                 else if (buffer.bits.front() == RTLIL::State::S1)
 233                         buffer.bits.front() = RTLIL::State::S0;
 234         }
 235         return buffer;
 236 }
 237
 238 RTLIL::Const RTLIL::const_reduce_bool(const RTLIL::Const &arg1, const RTLIL::Const&, bool, bool, int result_len)
 239 {
 240         return logic_reduce_wrapper(RTLIL::State::S0, logic_or, arg1, result_len);
 241 }
 242
 243 RTLIL::Const RTLIL::const_logic_not(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 244 {
 245         int undef_bit_pos_a = -1;
 246         BigInteger a = const2big(arg1, signed1, undef_bit_pos_a);
 247         RTLIL::Const result(a.isZero() ? undef_bit_pos_a >= 0 ? RTLIL::State::Sx : RTLIL::State::S1 : RTLIL::State::S0);
 248
 249         while (int(result.bits.size()) < result_len)
 250                 result.bits.push_back(RTLIL::State::S0);
 251         return result;
 252 }
 253
 254 RTLIL::Const RTLIL::const_logic_and(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 255 {
 256         int undef_bit_pos_a = -1, undef_bit_pos_b = -1;
 257         BigInteger a = const2big(arg1, signed1, undef_bit_pos_a);
 258         BigInteger b = const2big(arg2, signed2, undef_bit_pos_b);
 259
 260         RTLIL::State bit_a = a.isZero() ? undef_bit_pos_a >= 0 ? RTLIL::State::Sx : RTLIL::State::S0 : RTLIL::State::S1;
 261         RTLIL::State bit_b = b.isZero() ? undef_bit_pos_b >= 0 ? RTLIL::State::Sx : RTLIL::State::S0 : RTLIL::State::S1;
 262         RTLIL::Const result(logic_and(bit_a, bit_b));
 263
 264         while (int(result.bits.size()) < result_len)
 265                 result.bits.push_back(RTLIL::State::S0);
 266         return result;
 267 }
 268
 269 RTLIL::Const RTLIL::const_logic_or(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 270 {
 271         int undef_bit_pos_a = -1, undef_bit_pos_b = -1;
 272         BigInteger a = const2big(arg1, signed1, undef_bit_pos_a);
 273         BigInteger b = const2big(arg2, signed2, undef_bit_pos_b);
 274
 275         RTLIL::State bit_a = a.isZero() ? undef_bit_pos_a >= 0 ? RTLIL::State::Sx : RTLIL::State::S0 : RTLIL::State::S1;
 276         RTLIL::State bit_b = b.isZero() ? undef_bit_pos_b >= 0 ? RTLIL::State::Sx : RTLIL::State::S0 : RTLIL::State::S1;
 277         RTLIL::Const result(logic_or(bit_a, bit_b));
 278
 279         while (int(result.bits.size()) < result_len)
 280                 result.bits.push_back(RTLIL::State::S0);
 281         return result;
 282 }
 283
 284 static RTLIL::Const const_shift_worker(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool sign_ext, int direction, int result_len)
 285 {
 286         int undef_bit_pos = -1;
 287         BigInteger offset = const2big(arg2, false, undef_bit_pos) * direction;
 288
 289         if (result_len < 0)
 290                 result_len = arg1.bits.size();
 291
 292         RTLIL::Const result(RTLIL::State::Sx, result_len);
 293         if (undef_bit_pos >= 0)
 294                 return result;
 295
 296         for (int i = 0; i < result_len; i++) {
 297                 BigInteger pos = BigInteger(i) + offset;
 298                 if (pos < 0)
 299                         result.bits[i] = RTLIL::State::S0;
 300                 else if (pos >= arg1.bits.size())
 301                         result.bits[i] = sign_ext ? arg1.bits.back() : RTLIL::State::S0;
 302                 else
 303                         result.bits[i] = arg1.bits[pos.toInt()];
 304         }
 305
 306         return result;
 307 }
 308
 309 RTLIL::Const RTLIL::const_shl(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool, int result_len)
 310 {
 311         RTLIL::Const arg1_ext = arg1;
 312         extend_u0(arg1_ext, result_len, signed1);
 313         return const_shift_worker(arg1_ext, arg2, false, -1, result_len);
 314 }
 315
 316 RTLIL::Const RTLIL::const_shr(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool, int result_len)
 317 {
 318         RTLIL::Const arg1_ext = arg1;
 319         extend_u0(arg1_ext, std::max(result_len, SIZE(arg1)), signed1);
 320         return const_shift_worker(arg1_ext, arg2, false, +1, result_len);
 321 }
 322
 323 RTLIL::Const RTLIL::const_sshl(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 324 {
 325         if (!signed1)
 326                 return const_shl(arg1, arg2, signed1, signed2, result_len);
 327         return const_shift_worker(arg1, arg2, true, -1, result_len);
 328 }
 329
 330 RTLIL::Const RTLIL::const_sshr(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 331 {
 332         if (!signed1)
 333                 return const_shr(arg1, arg2, signed1, signed2, result_len);
 334         return const_shift_worker(arg1, arg2, true, +1, result_len);
 335 }
 336
 337 static RTLIL::Const const_shift_shiftx(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool, bool signed2, int result_len, RTLIL::State other_bits)
 338 {
 339         int undef_bit_pos = -1;
 340         BigInteger offset = const2big(arg2, signed2, undef_bit_pos);
 341
 342         if (result_len < 0)
 343                 result_len = arg1.bits.size();
 344
 345         RTLIL::Const result(RTLIL::State::Sx, result_len);
 346         if (undef_bit_pos >= 0)
 347                 return result;
 348
 349         for (int i = 0; i < result_len; i++) {
 350                 BigInteger pos = BigInteger(i) + offset;
 351                 if (pos < 0 || pos >= arg1.bits.size())
 352                         result.bits[i] = other_bits;
 353                 else
 354                         result.bits[i] = arg1.bits[pos.toInt()];
 355         }
 356
 357         return result;
 358 }
 359
 360 RTLIL::Const RTLIL::const_shift(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 361 {
 362         return const_shift_shiftx(arg1, arg2, signed1, signed2, result_len, RTLIL::State::S0);
 363 }
 364
 365 RTLIL::Const RTLIL::const_shiftx(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 366 {
 367         return const_shift_shiftx(arg1, arg2, signed1, signed2, result_len, RTLIL::State::Sx);
 368 }
 369
 370 RTLIL::Const RTLIL::const_lt(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 371 {
 372         int undef_bit_pos = -1;
 373         bool y = const2big(arg1, signed1, undef_bit_pos) < const2big(arg2, signed2, undef_bit_pos);
 374         RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0);
 375
 376         while (int(result.bits.size()) < result_len)
 377                 result.bits.push_back(RTLIL::State::S0);
 378         return result;
 379 }
 380
 381 RTLIL::Const RTLIL::const_le(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 382 {
 383         int undef_bit_pos = -1;
 384         bool y = const2big(arg1, signed1, undef_bit_pos) <= const2big(arg2, signed2, undef_bit_pos);
 385         RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0);
 386
 387         while (int(result.bits.size()) < result_len)
 388                 result.bits.push_back(RTLIL::State::S0);
 389         return result;
 390 }
 391
 392 RTLIL::Const RTLIL::const_eq(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 393 {
 394         RTLIL::Const arg1_ext = arg1;
 395         RTLIL::Const arg2_ext = arg2;
 396         RTLIL::Const result(RTLIL::State::S0, result_len);
 397
 398         int width = std::max(arg1_ext.bits.size(), arg2_ext.bits.size());
 399         extend_u0(arg1_ext, width, signed1 && signed2);
 400         extend_u0(arg2_ext, width, signed1 && signed2);
 401
 402         RTLIL::State matched_status = RTLIL::State::S1;
 403         for (size_t i = 0; i < arg1_ext.bits.size(); i++) {
 404                 if (arg1_ext.bits.at(i) == RTLIL::State::S0 && arg2_ext.bits.at(i) == RTLIL::State::S1)
 405                         return result;
 406                 if (arg1_ext.bits.at(i) == RTLIL::State::S1 && arg2_ext.bits.at(i) == RTLIL::State::S0)
 407                         return result;
 408                 if (arg1_ext.bits.at(i) > RTLIL::State::S1 || arg2_ext.bits.at(i) > RTLIL::State::S1)
 409                         matched_status = RTLIL::State::Sx;
 410         }
 411
 412         result.bits.front() = matched_status;
 413         return result;
 414 }
 415
 416 RTLIL::Const RTLIL::const_ne(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 417 {
 418         RTLIL::Const result = RTLIL::const_eq(arg1, arg2, signed1, signed2, result_len);
 419         if (result.bits.front() == RTLIL::State::S0)
 420                 result.bits.front() = RTLIL::State::S1;
 421         else if (result.bits.front() == RTLIL::State::S1)
 422                 result.bits.front() = RTLIL::State::S0;
 423         return result;
 424 }
 425
 426 RTLIL::Const RTLIL::const_eqx(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 427 {
 428         RTLIL::Const arg1_ext = arg1;
 429         RTLIL::Const arg2_ext = arg2;
 430         RTLIL::Const result(RTLIL::State::S0, result_len);
 431
 432         int width = std::max(arg1_ext.bits.size(), arg2_ext.bits.size());
 433         extend_u0(arg1_ext, width, signed1 && signed2);
 434         extend_u0(arg2_ext, width, signed1 && signed2);
 435
 436         for (size_t i = 0; i < arg1_ext.bits.size(); i++) {
 437                 if (arg1_ext.bits.at(i) != arg2_ext.bits.at(i))
 438                         return result;
 439         }
 440
 441         result.bits.front() = RTLIL::State::S1;
 442         return result;
 443 }
 444
 445 RTLIL::Const RTLIL::const_nex(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 446 {
 447         RTLIL::Const result = RTLIL::const_eqx(arg1, arg2, signed1, signed2, result_len);
 448         if (result.bits.front() == RTLIL::State::S0)
 449                 result.bits.front() = RTLIL::State::S1;
 450         else if (result.bits.front() == RTLIL::State::S1)
 451                 result.bits.front() = RTLIL::State::S0;
 452         return result;
 453 }
 454
 455 RTLIL::Const RTLIL::const_ge(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 456 {
 457         int undef_bit_pos = -1;
 458         bool y = const2big(arg1, signed1, undef_bit_pos) >= const2big(arg2, signed2, undef_bit_pos);
 459         RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0);
 460
 461         while (int(result.bits.size()) < result_len)
 462                 result.bits.push_back(RTLIL::State::S0);
 463         return result;
 464 }
 465
 466 RTLIL::Const RTLIL::const_gt(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 467 {
 468         int undef_bit_pos = -1;
 469         bool y = const2big(arg1, signed1, undef_bit_pos) > const2big(arg2, signed2, undef_bit_pos);
 470         RTLIL::Const result(undef_bit_pos >= 0 ? RTLIL::State::Sx : y ? RTLIL::State::S1 : RTLIL::State::S0);
 471
 472         while (int(result.bits.size()) < result_len)
 473                 result.bits.push_back(RTLIL::State::S0);
 474         return result;
 475 }
 476
 477 RTLIL::Const RTLIL::const_add(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 478 {
 479         int undef_bit_pos = -1;
 480         BigInteger y = const2big(arg1, signed1, undef_bit_pos) + const2big(arg2, signed2, undef_bit_pos);
 481         return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), undef_bit_pos);
 482 }
 483
 484 RTLIL::Const RTLIL::const_sub(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 485 {
 486         int undef_bit_pos = -1;
 487         BigInteger y = const2big(arg1, signed1, undef_bit_pos) - const2big(arg2, signed2, undef_bit_pos);
 488         return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), undef_bit_pos);
 489 }
 490
 491 RTLIL::Const RTLIL::const_mul(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 492 {
 493         int undef_bit_pos = -1;
 494         BigInteger y = const2big(arg1, signed1, undef_bit_pos) * const2big(arg2, signed2, undef_bit_pos);
 495         return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
 496 }
 497
 498 RTLIL::Const RTLIL::const_div(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 499 {
 500         int undef_bit_pos = -1;
 501         BigInteger a = const2big(arg1, signed1, undef_bit_pos);
 502         BigInteger b = const2big(arg2, signed2, undef_bit_pos);
 503         if (b.isZero())
 504                 return RTLIL::Const(RTLIL::State::Sx, result_len);
 505         bool result_neg = (a.getSign() == BigInteger::negative) != (b.getSign() == BigInteger::negative);
 506         a = a.getSign() == BigInteger::negative ? -a : a;
 507         b = b.getSign() == BigInteger::negative ? -b : b;
 508         return big2const(result_neg ? -(a / b) : (a / b), result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
 509 }
 510
 511 RTLIL::Const RTLIL::const_mod(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 512 {
 513         int undef_bit_pos = -1;
 514         BigInteger a = const2big(arg1, signed1, undef_bit_pos);
 515         BigInteger b = const2big(arg2, signed2, undef_bit_pos);
 516         if (b.isZero())
 517                 return RTLIL::Const(RTLIL::State::Sx, result_len);
 518         bool result_neg = a.getSign() == BigInteger::negative;
 519         a = a.getSign() == BigInteger::negative ? -a : a;
 520         b = b.getSign() == BigInteger::negative ? -b : b;
 521         return big2const(result_neg ? -(a % b) : (a % b), result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
 522 }
 523
 524 RTLIL::Const RTLIL::const_pow(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
 525 {
 526         int undef_bit_pos = -1;
 527
 528         BigInteger a = const2big(arg1, signed1, undef_bit_pos);
 529         BigInteger b = const2big(arg2, signed2, undef_bit_pos);
 530         BigInteger y = 1;
 531
 532         if (a == 0 && b < 0)
 533                 return RTLIL::Const(RTLIL::State::Sx, result_len);
 534
 535         if (a == 0 && b > 0)
 536                 return RTLIL::Const(RTLIL::State::S0, result_len);
 537
 538         if (b < 0)
 539         {
 540                 if (a < -1 || a > 1)
 541                         y = 0;
 542                 if (a == -1)
 543                         y = (-b % 2) == 0 ? 1 : -1;
 544         }
 545
 546         if (b > 0)
 547         {
 548                 // Power-modulo with 2^result_len as modulus
 549                 BigInteger modulus = 1;
 550                 int modulus_bits = (result_len >= 0 ? result_len : 1024);
 551                 for (int i = 0; i < modulus_bits; i++)
 552                         modulus *= 2;
 553
 554                 bool flip_result_sign = false;
 555                 if (a < 0) {
 556                         a *= -1;
 557                         if (b % 2 == 1)
 558                                 flip_result_sign = true;
 559                 }
 560
 561                 while (b > 0) {
 562                         if (b % 2 == 1)
 563                                 y = (y * a) % modulus;
 564                         b = b / 2;
 565                         a = (a * a) % modulus;
 566                 }
 567
 568                 if (flip_result_sign)
 569                         y *= -1;
 570         }
 571
 572         return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
 573 }
 574
 575 RTLIL::Const RTLIL::const_pos(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 576 {
 577         RTLIL::Const arg1_ext = arg1;
 578         extend(arg1_ext, result_len, signed1);
 579
 580         return arg1_ext;
 581 }
 582
 583 RTLIL::Const RTLIL::const_bu0(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 584 {
 585         RTLIL::Const arg1_ext = arg1;
 586         extend_u0(arg1_ext, result_len, signed1);
 587
 588         return arg1_ext;
 589 }
 590
 591 RTLIL::Const RTLIL::const_neg(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len)
 592 {
 593         RTLIL::Const arg1_ext = arg1;
 594         RTLIL::Const zero(RTLIL::State::S0, 1);
 595
 596         return RTLIL::const_sub(zero, arg1_ext, true, signed1, result_len);
 597 }
 598
 599 YOSYS_NAMESPACE_END
 600