ld/testsuite/ld-mips-elf/mips16e2-pcrel-0.d

   1 #objdump: -dr --prefix-addresses --show-raw-insn
   2 #name: MIPS16e2 link PC-relative operations 0
   3 #source: ../../../gas/testsuite/gas/mips/mips16-pcrel-0.s
   4 #as: -mips32r2 -mmips16e2
   5 #ld: -Ttext 0 -e 0
   6
   7 .*: +file format .*mips.*
   8
   9 Disassembly of section \.text:
  10         \.\.\.
  11 [0-9a-f]+ <[^>]*> 0a00          la      v0,0+010000 <.*>
  12 [0-9a-f]+ <[^>]*> 6500          nop
  13 [0-9a-f]+ <[^>]*> b200          lw      v0,0+010004 <.*>
  14 [0-9a-f]+ <[^>]*> 6500          nop
  15 [0-9a-f]+ <[^>]*> 0aff          la      v0,0+010404 <.*>
  16 [0-9a-f]+ <[^>]*> 6500          nop
  17 [0-9a-f]+ <[^>]*> b2ff          lw      v0,0+010408 <.*>
  18 [0-9a-f]+ <[^>]*> 6500          nop
  19 [0-9a-f]+ <[^>]*> f400 0a00     la      v0,0+010410 <.*>
  20 [0-9a-f]+ <[^>]*> f400 b200     lw      v0,0+010414 <.*>
  21 [0-9a-f]+ <[^>]*> f7ff 0a1c     la      v0,0+010014 <.*>
  22 [0-9a-f]+ <[^>]*> f7ff b21c     lw      v0,0+010018 <.*>
  23 [0-9a-f]+ <[^>]*> f7ef 0a1f     la      v0,0+01801f <.*>
  24 [0-9a-f]+ <[^>]*> f7ef b21f     lw      v0,0+018023 <.*>
  25 [0-9a-f]+ <[^>]*> f010 0a00     la      v0,0+008028 <.*>
  26 [0-9a-f]+ <[^>]*> f010 b200     lw      v0,0+00802c <.*>
  27 [0-9a-f]+ <[^>]*> f000 6a22     lui     v0,0x2
  28 [0-9a-f]+ <[^>]*> f030 4a10     addiu   v0,-32720
  29 [0-9a-f]+ <[^>]*> f000 6a22     lui     v0,0x2
  30 [0-9a-f]+ <[^>]*> f030 9a58     lw      v0,-32712\(v0\)
  31 [0-9a-f]+ <[^>]*> f000 6a21     lui     v0,0x1
  32 [0-9a-f]+ <[^>]*> f030 4a1f     addiu   v0,-32705
  33 [0-9a-f]+ <[^>]*> f000 6a21     lui     v0,0x1
  34 [0-9a-f]+ <[^>]*> f050 9a47     lw      v0,-32697\(v0\)
  35 [0-9a-f]+ <[^>]*> 6500          nop
  36         \.\.\.
  37         \.\.\.