libgcc/config/arm/t-elf

   1 # For most CPUs we have an assembly soft-float implementations.
   2 # However this is not true for ARMv6M.  Here we want to use the soft-fp C
   3 # implementation.  The soft-fp code is only build for ARMv6M.  This pulls
   4 # in the asm implementation for other CPUs.
   5 LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \
   6         _call_via_rX _interwork_call_via_rX \
   7         _lshrdi3 _ashrdi3 _ashldi3 \
   8         _arm_negdf2 _arm_addsubdf3 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \
   9         _arm_fixdfsi _arm_fixunsdfsi \
  10         _arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \
  11         _arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \
  12         _arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \
  13         _clzsi2 _clzdi2
  14
  15 # Currently there is a bug somewhere in GCC's alias analysis
  16 # or scheduling code that is breaking _fpmul_parts in fp-bit.c.
  17 # Disabling function inlining is a workaround for this problem.
  18 HOST_LIBGCC2_CFLAGS += -fno-inline