3b9e5a8dab5e1838f07254fbec2fa2722c220498
1 from migen
.fhdl
.std
import *
2 from migen
.bus
import wishbone
3 from migen
.bus
.transactions
import *
4 from migen
.sim
.generic
import run_simulation
6 from liteeth
.common
import *
7 from liteeth
.mac
.core
import LiteEthMACCore
9 from liteeth
.test
.common
import *
10 from liteeth
.test
.model
import phy
, mac
14 self
.submodules
.phy_model
= phy
.PHY(8, debug
=False)
15 self
.submodules
.mac_model
= mac
.MAC(self
.phy_model
, debug
=True, loopback
=True)
16 self
.submodules
.core
= LiteEthMACCore(phy
=self
.phy_model
, dw
=8, with_hw_preamble_crc
=True)
18 self
.submodules
.streamer
= PacketStreamer(eth_phy_description(8), last_be
=1)
19 self
.submodules
.streamer_randomizer
= AckRandomizer(eth_phy_description(8), level
=50)
21 self
.submodules
.logger_randomizer
= AckRandomizer(eth_phy_description(8), level
=50)
22 self
.submodules
.logger
= PacketLogger(eth_phy_description(8))
24 # use sys_clk for each clock_domain
25 self
.clock_domains
.cd_eth_rx
= ClockDomain()
26 self
.clock_domains
.cd_eth_tx
= ClockDomain()
28 self
.cd_eth_rx
.clk
.eq(ClockSignal()),
29 self
.cd_eth_rx
.rst
.eq(ResetSignal()),
30 self
.cd_eth_tx
.clk
.eq(ClockSignal()),
31 self
.cd_eth_tx
.rst
.eq(ResetSignal()),
35 Record
.connect(self
.streamer
.source
, self
.streamer_randomizer
.sink
),
36 Record
.connect(self
.streamer_randomizer
.source
, self
.core
.sink
),
37 Record
.connect(self
.core
.source
, self
.logger_randomizer
.sink
),
38 Record
.connect(self
.logger_randomizer
.source
, self
.logger
.sink
)
41 def gen_simulation(self
, selfp
):
42 selfp
.cd_eth_rx
.rst
= 1
43 selfp
.cd_eth_tx
.rst
= 1
45 selfp
.cd_eth_rx
.rst
= 0
46 selfp
.cd_eth_tx
.rst
= 0
49 packet
= mac
.MACPacket([i
for i
in range(64)])
50 packet
.destination_mac_address
= 0x010203040506
51 packet
.source_mac_address
= 0x090A0B0C0C0D
52 packet
.ethernet_type
= 0x0800
53 packet
.encode_header()
54 yield from self
.streamer
.send(packet
)
55 yield from self
.logger
.receive()
58 s
, l
, e
= check(packet
, self
.logger
.packet
)
59 print("shift "+ str(s
) + " / length " + str(l
) + " / errors " + str(e
))
61 if __name__
== "__main__":
62 run_simulation(TB(), ncycles
=4000, vcd_name
="my.vcd", keep_files
=True)