1 # This file is Copyright (c) 2015 Sebastien Bourdeauducq <sb@m-labs.hk>
2 # This file is Copyright (c) 2015-2018 Florent Kermarrec <florent@enjoy-digital.fr>
7 from litex
.build
.generic_platform
import GenericPlatform
8 from litex
.build
.xilinx
import common
, vivado
, ise
10 # XilinxPlatform -----------------------------------------------------------------------------------
12 class XilinxPlatform(GenericPlatform
):
13 bitstream_ext
= ".bit"
15 def __init__(self
, *args
, toolchain
="ise", **kwargs
):
16 GenericPlatform
.__init
__(self
, *args
, **kwargs
)
19 if toolchain
== "ise":
20 self
.toolchain
= ise
.XilinxISEToolchain()
21 elif toolchain
== "vivado":
22 self
.toolchain
= vivado
.XilinxVivadoToolchain()
24 raise ValueError("Unknown toolchain")
26 def add_edif(self
, filename
):
27 self
.edifs
.add((os
.path
.abspath(filename
)))
29 def add_ip(self
, filename
):
30 self
.ips
.add((os
.path
.abspath(filename
)))
32 def get_verilog(self
, *args
, special_overrides
=dict(), **kwargs
):
33 so
= dict(common
.xilinx_special_overrides
)
34 if self
.device
[:3] == "xc6":
35 so
.update(common
.xilinx_s6_special_overrides
)
36 if self
.device
[:3] == "xc7":
37 so
.update(common
.xilinx_s7_special_overrides
)
38 if self
.device
[:4] == "xcku":
39 so
.update(common
.xilinx_us_special_overrides
)
40 so
.update(special_overrides
)
41 return GenericPlatform
.get_verilog(self
, *args
, special_overrides
=so
,
42 attr_translate
=self
.toolchain
.attr_translate
, **kwargs
)
44 def get_edif(self
, fragment
, **kwargs
):
45 return GenericPlatform
.get_edif(self
, fragment
, "UNISIMS", "Xilinx", self
.device
, **kwargs
)
47 def build(self
, *args
, **kwargs
):
48 return self
.toolchain
.build(self
, *args
, **kwargs
)
50 def add_period_constraint(self
, clk
, period
):
51 if clk
is None: return
54 self
.toolchain
.add_period_constraint(self
, clk
, period
)
56 def add_false_path_constraint(self
, from_
, to
):
57 if hasattr(from_
, "p"):
61 self
.toolchain
.add_false_path_constraint(self
, from_
, to
)