litex/gen/genlib/misc.py

   1 from litex.gen.fhdl.structure import *
   2 from litex.gen.fhdl.module import Module
   3 from litex.gen.fhdl.bitcontainer import bits_for
   4
   5
   6 def split(v, *counts):
   7     r = []
   8     offset = 0
   9     for n in counts:
  10         if n != 0:
  11             r.append(v[offset:offset+n])
  12         else:
  13             r.append(None)
  14         offset += n
  15     return tuple(r)
  16
  17
  18 def displacer(signal, shift, output, n=None, reverse=False):
  19     if shift is None:
  20         return output.eq(signal)
  21     if n is None:
  22         n = 2**len(shift)
  23     w = len(signal)
  24     if reverse:
  25         r = reversed(range(n))
  26     else:
  27         r = range(n)
  28     l = [Replicate(shift == i, w) & signal for i in r]
  29     return output.eq(Cat(*l))
  30
  31
  32 def chooser(signal, shift, output, n=None, reverse=False):
  33     if shift is None:
  34         return output.eq(signal)
  35     if n is None:
  36         n = 2**len(shift)
  37     w = len(output)
  38     cases = {}
  39     for i in range(n):
  40         if reverse:
  41             s = n - i - 1
  42         else:
  43             s = i
  44         cases[i] = [output.eq(signal[s*w:(s+1)*w])]
  45     return Case(shift, cases).makedefault()
  46
  47
  48 def timeline(trigger, events):
  49     lastevent = max([e[0] for e in events])
  50     counter = Signal(max=lastevent+1)
  51
  52     counterlogic = If(counter != 0,
  53         counter.eq(counter + 1)
  54     ).Elif(trigger,
  55         counter.eq(1)
  56     )
  57     # insert counter reset if it doesn't naturally overflow
  58     # (test if lastevent+1 is a power of 2)
  59     if (lastevent & (lastevent + 1)) != 0:
  60         counterlogic = If(counter == lastevent,
  61             counter.eq(0)
  62         ).Else(
  63             counterlogic
  64         )
  65
  66     def get_cond(e):
  67         if e[0] == 0:
  68             return trigger & (counter == 0)
  69         else:
  70             return counter == e[0]
  71     sync = [If(get_cond(e), *e[1]) for e in events]
  72     sync.append(counterlogic)
  73     return sync
  74
  75
  76 class WaitTimer(Module):
  77     def __init__(self, t):
  78         self.wait = Signal()
  79         self.done = Signal()
  80
  81         # # #
  82
  83         count = Signal(bits_for(t), reset=t)
  84         self.comb += self.done.eq(count == 0)
  85         self.sync += \
  86             If(self.wait,
  87                 If(~self.done, count.eq(count - 1))
  88             ).Else(count.eq(count.reset))
  89
  90
  91 class BitSlip(Module):
  92     def __init__(self, dw):
  93         self.i = Signal(dw)
  94         self.o = Signal(dw)
  95         self.value = Signal(max=dw)
  96
  97         # # #
  98
  99         r = Signal(2*dw)
 100         self.sync += r.eq(Cat(r[dw:], self.i))
 101         cases = {}
 102         for i in range(dw):
 103             cases[i] = self.o.eq(r[i:dw+i])
 104         self.sync += Case(self.value, cases)