litex/soc/misoc/cores/liteeth_mini/mac/core/gap.py

   1 import math
   2
   3 from migen import *
   4 from migen.genlib.fsm import *
   5
   6 from misoc.interconnect.stream import Sink, Source
   7 from misoc.cores.liteeth_mini.common import eth_phy_description, eth_interpacket_gap
   8
   9
  10 class LiteEthMACGap(Module):
  11     def __init__(self, dw, ack_on_gap=False):
  12         self.sink = sink = Sink(eth_phy_description(dw))
  13         self.source = source = Source(eth_phy_description(dw))
  14
  15         # # #
  16
  17         gap = math.ceil(eth_interpacket_gap/(dw//8))
  18         counter = Signal(max=gap)
  19         counter_reset = Signal()
  20         counter_ce = Signal()
  21         self.sync += \
  22             If(counter_reset,
  23                counter.eq(0)
  24             ).Elif(counter_ce,
  25                 counter.eq(counter + 1)
  26             )
  27
  28         self.submodules.fsm = fsm = FSM(reset_state="COPY")
  29         fsm.act("COPY",
  30             counter_reset.eq(1),
  31             Record.connect(sink, source),
  32             If(sink.stb & sink.eop & sink.ack,
  33                 NextState("GAP")
  34             )
  35         )
  36         fsm.act("GAP",
  37             counter_ce.eq(1),
  38             sink.ack.eq(int(ack_on_gap)),
  39             If(counter == (gap-1),
  40                 NextState("COPY")
  41             )
  42         )