lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7
   8 # Status tracking
   9
  10 move things along from one stage to the next
  11
  12 ## Currently working on
  13
  14  - Project Management
  15  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  16  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  17  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder with [[mnolan]]
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
  19     - functions needed for simulator
  20     - Shared 10% with [[mnolan]]
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> test core to regfiles
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=315> SPR pipe
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
  43
  44 ## Completed but not yet submitted:
  45
  46
  47 ## Submitted for NLNet RFP
  48
  49 submitted but not confirmed paid:
  50
  51 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
  52
  53 ## Paid
  54
  55 donation from NLNet confirmed received:
  56
  57 ### Project 2019-02-012 28-apr-2020
  58
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
  60    - 6600 scoreboard multi-read/write
  61    - EUR 600
  62  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
  63    - Partitioned equals and greater than comparison
  64    - Shared 50% with [[mnolan]]
  65    - EUR 200 (each)
  66  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
  67    - partitioned scalar/vector shift
  68    - Shared 50% with [[lkcl]]
  69    - EUR 350 (each)
  70
  71 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
  72
  73  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
  74     - auto-parser of POWER9
  75     - Shared 50% with [[mnolan]]
  76     - EUR 500 (each)
  77
  78 ### Project 2019-10-029 Date 14mar2020
  79
  80 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
  81
  82 ### Project 2019-02-012 Date 12mar2020
  83
  84 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
  85 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
  86 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
  87 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
  88
  89 ### Project 2019-02-012 Date 28jan2020
  90
  91 * admin tasks
  92 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
  93